Searched refs:SUB (Results 176 - 200 of 268) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp109 case ISD::SUB:
475 case ISD::SUB:
1267 case ISD::SUB:
H A DSelectionDAG.cpp1957 case ISD::SUB: {
2227 case ISD::SUB:
2247 // Otherwise, we treat this like a SUB.
2647 case ISD::SUB: return getConstant(C1 - C2, VT);
2714 case ISD::SUB:
3018 case ISD::SUB:
3051 case ISD::SUB:
5973 case ISD::SUB: return "sub";
H A DSelectionDAGBuilder.cpp1568 SDValue SUB = DAG.getNode(ISD::SUB, dl, local
1570 Cond = DAG.getSetCC(dl, MVT::i1, SUB,
1631 SDValue Sub = DAG.getNode(ISD::SUB, getCurDebugLoc(), VT, SwitchOp,
1680 SDValue Sub = DAG.getNode(ISD::SUB, getCurDebugLoc(), VT, SwitchOp,
3589 SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1,
H A DFastISel.cpp887 return SelectBinaryOp(I, ISD::SUB);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp2334 case ISD::SUB: {
2679 case ISD::SUB:
2698 // Otherwise, we treat this like a SUB.
3233 case ISD::SUB: return std::make_pair(C1 - C2, true);
3293 case ISD::SUB: Offset = -uint64_t(Offset); break;
3510 case ISD::SUB:
3844 case ISD::SUB:
3877 case ISD::SUB:
H A DLegalizeVectorTypes.cpp126 case ISD::SUB:
668 case ISD::SUB:
2089 case ISD::SUB:
H A DSelectionDAGBuilder.cpp1904 SDValue SUB = DAG.getNode(ISD::SUB, dl,
1906 Cond = DAG.getSetCC(dl, MVT::i1, SUB,
1966 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, SwitchOp,
2096 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, Guard, StackSlot);
2142 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, SwitchOp,
4143 SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1,
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86GenFastISel.inc2168 // FastEmit functions for ISD::SUB.
3680 case ISD::SUB: return FastEmit_ISD_SUB_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4412 // FastEmit functions for ISD::SUB.
4697 case ISD::SUB: return FastEmit_ISD_SUB_ri(VT, RetVT, Op0, Op0IsKill, imm1);
4796 // FastEmit functions for ISD::SUB.
4849 case ISD::SUB: return FastEmit_ISD_SUB_ri_Predicate_i64immSExt32(VT, RetVT, Op0, Op0IsKill, imm1);
/external/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h941 case ISD::SUB:
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp757 } else if (Shl_0.getOpcode() == ISD::SUB) {
/external/llvm/test/MC/ARM/
H A Dv8_IT_manual.s54 @ SUB reg, encoding T1
58 @ SUB reg, encoding T2 (32-bit)
62 @ SUB imm, encoding T1
66 @ SUB imm, encoding T2
70 @ SUB imm, encoding T3 (32-bit)
74 @ SUB imm, encoding T4 (32-bit)
78 @ SUB SP-imm, encoding T1
82 @ SUB SP-imm, encoding T3 (32-bit)
86 @ SUB SP-imm, encoding T4 (32-bit)
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp728 } else if (Opc == ISD::SUB && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) {
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
H A DSparcISelLowering.cpp1062 SDValue NewSP = DAG.getNode(ISD::SUB, dl, MVT::i32, SP, Size); // Value
/external/doclava/src/com/google/doclava/parser/
H A DJavaLexer.java127 public static final int SUB=99; field in class:JavaLexer
3197 // $ANTLR start "SUB"
3200 int _type = SUB;
3215 // $ANTLR end "SUB"
10531 // src/com/google/doclava/parser/Java.g:1:8: ( LONGLITERAL | INTLITERAL | FLOATLITERAL | DOUBLELITERAL | CHARLITERAL | STRINGLITERAL | WS | COMMENT | LINE_COMMENT | ABSTRACT | ASSERT | BOOLEAN | BREAK | BYTE | CASE | CATCH | CHAR | CLASS | CONST | CONTINUE | DEFAULT | DO | DOUBLE | ELSE | ENUM | EXTENDS | FINAL | FINALLY | FLOAT | FOR | GOTO | IF | IMPLEMENTS | IMPORT | INSTANCEOF | INT | INTERFACE | LONG | NATIVE | NEW | PACKAGE | PRIVATE | PROTECTED | PUBLIC | RETURN | SHORT | STATIC | STRICTFP | SUPER | SWITCH | SYNCHRONIZED | THIS | THROW | THROWS | TRANSIENT | TRY | VOID | VOLATILE | WHILE | TRUE | FALSE | NULL | LPAREN | RPAREN | LBRACE | RBRACE | LBRACKET | RBRACKET | SEMI | COMMA | DOT | ELLIPSIS | EQ | BANG | TILDE | QUES | COLON | EQEQ | AMPAMP | BARBAR | PLUSPLUS | SUBSUB | PLUS | SUB | STAR | SLASH | AMP | BAR | CARET | PERCENT | PLUSEQ | SUBEQ | STAREQ | SLASHEQ | AMPEQ | BAREQ | CARETEQ | PERCENTEQ | MONKEYS_AT | BANGEQ | GT | LT | IDENTIFIER )
11117 // src/com/google/doclava/parser/Java.g:1:600: SUB
16736 return "1:1: Tokens : ( LONGLITERAL | INTLITERAL | FLOATLITERAL | DOUBLELITERAL | CHARLITERAL | STRINGLITERAL | WS | COMMENT | LINE_COMMENT | ABSTRACT | ASSERT | BOOLEAN | BREAK | BYTE | CASE | CATCH | CHAR | CLASS | CONST | CONTINUE | DEFAULT | DO | DOUBLE | ELSE | ENUM | EXTENDS | FINAL | FINALLY | FLOAT | FOR | GOTO | IF | IMPLEMENTS | IMPORT | INSTANCEOF | INT | INTERFACE | LONG | NATIVE | NEW | PACKAGE | PRIVATE | PROTECTED | PUBLIC | RETURN | SHORT | STATIC | STRICTFP | SUPER | SWITCH | SYNCHRONIZED | THIS | THROW | THROWS | TRANSIENT | TRY | VOID | VOLATILE | WHILE | TRUE | FALSE | NULL | LPAREN | RPAREN | LBRACE | RBRACE | LBRACKET | RBRACKET | SEMI | COMMA | DOT | ELLIPSIS | EQ | BANG | TILDE | QUES | COLON | EQEQ | AMPAMP | BARBAR | PLUSPLUS | SUBSUB | PLUS | SUB | STAR | SLASH | AMP | BAR | CARET | PERCENT | PLUSEQ | SUBEQ | STAREQ | SLASHEQ | AMPEQ | BAREQ | CARETEQ | PERCENTEQ | MONKEYS_AT | BANGEQ | GT | LT | IDENTIFIER );";
/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1753 case ISD::SUB:
2833 return SelectBinaryIntOp(I, ISD::SUB);
/external/llvm/lib/Target/X86/
H A DX86FastISel.cpp2734 BaseOpc = UseIncDec ? unsigned(X86ISD::DEC) : unsigned(ISD::SUB);
2738 BaseOpc = ISD::SUB; CondOpc = X86::SETBr; break;
/external/pcre/dist2/src/sljit/
H A DsljitNativeX86_common.c230 #define SUB (/* BINARY */ 5 << 3) macro
2209 return emit_non_cum_binary(compiler, SUB_r_rm, SUB_rm_r, SUB, SUB_EAX_i32,
/external/swiftshader/src/Shader/
H A DPixelPipeline.cpp122 case Shader::OPCODE_SUB: SUB(d, s0, s1); break;
1461 void PixelPipeline::SUB(Vector4s &dst, Vector4s &src0, Vector4s &src1)
/external/v8/src/arm64/
H A Dassembler-arm64.cc1112 AddSub(rd, rn, operand, LeaveFlags, SUB);
1119 AddSub(rd, rn, operand, SetFlags, SUB);
H A Dsimulator-arm64.cc931 if ((instr->Mask(AddSubOpMask) == SUB) || instr->Mask(AddSubOpMask) == SUBS) {
1435 case SUB:
/external/robolectric/v3/libs/
H A Dvtd-xml-2.11.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/ximpleware/ com/ximpleware/extended/ com/ximpleware/extended/parser/ ...
/external/valgrind/none/tests/arm64/
H A Dinteger.stdout.exp235 SUB imm12
450 ADD/SUB(reg,64)
506 ADD/SUB(reg,32)
916 ADD/SUB(extended reg)(64)
1077 ADD/SUB(extended reg)(32)
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp422 setOperationAction(ISD::SUB, VT, Legal);
634 setOperationAction(ISD::SUB, MVT::v2i64, Expand);
6190 SDValue NegSize = DAG.getNode(ISD::SUB, dl, PtrVT,
6939 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
6968 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
6996 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
11225 Op = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Op);
/external/v8/src/parsing/
H A Dparser.cc330 case Token::SUB:
402 case Token::SUB:
418 if (op == Token::SUB) {
/external/icu/android_icu4j/src/main/java/android/icu/lang/
H A DUCharacter.java2279 public static final int SUB = 14; field in interface:UCharacter.DecompositionType

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