/art/compiler/utils/mips/ |
H A D | assembler_mips_test.cc | 812 TEST_F(AssemblerMIPSTest, LoadFromOffset) { 813 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, -0x8000); 814 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0); 815 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0x7FF8); 816 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0x7FFB); 817 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0x7FFC); 818 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, +0x7FFF); 819 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, -0xFFF0); 820 __ LoadFromOffset(mips::kLoadSignedByte, mips::A3, mips::A1, -0x8008); 821 __ LoadFromOffset(mip [all...] |
H A D | assembler_mips.cc | 3248 void MipsAssembler::LoadFromOffset(LoadOperandType type, function in class:art::mips::MipsAssembler 3252 LoadFromOffset<>(type, reg, base, offset); 3270 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), src_register, src_offset); 3273 LoadFromOffset(kLoadDoubleword, dst.AsRegisterPairLow(), src_register, src_offset); 3362 LoadFromOffset(kLoadWord, reg, SP, stack_offset); 3366 LoadFromOffset(kLoadWord, RA, SP, stack_offset); 3473 LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, in_off.Int32Value()); 3488 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), SP, src.Int32Value()); 3495 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), 3505 LoadFromOffset(kLoadWor [all...] |
H A D | assembler_mips.h | 572 void LoadFromOffset(LoadOperandType type, function in class:art::mips::FINAL 718 void LoadFromOffset(LoadOperandType type, Register reg, Register base, int32_t offset);
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/art/compiler/utils/mips64/ |
H A D | assembler_mips64_test.cc | 1598 TEST_F(AssemblerMIPS64Test, LoadFromOffset) { 1599 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A0, 0); 1600 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0); 1601 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1); 1602 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 256); 1603 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1000); 1604 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x7FFF); 1605 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x8000); 1606 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0x8001); 1607 __ LoadFromOffset(mips6 [all...] |
H A D | assembler_mips64.cc | 2705 void Mips64Assembler::LoadFromOffset(LoadOperandType type, 2709 LoadFromOffset<>(type, reg, base, offset); 2726 LoadFromOffset(kLoadWord, dst.AsGpuRegister(), src_register, src_offset); 2729 LoadFromOffset(kLoadDoubleword, dst.AsGpuRegister(), src_register, src_offset); 2821 LoadFromOffset(kLoadDoubleword, reg, SP, stack_offset); 2825 LoadFromOffset(kLoadDoubleword, RA, SP, stack_offset); 2917 LoadFromOffset(kLoadDoubleword, scratch.AsGpuRegister(), SP, in_off.Int32Value()); 2932 LoadFromOffset(kLoadUnsignedWord, dest.AsGpuRegister(), SP, src.Int32Value()); 2939 LoadFromOffset(kLoadUnsignedWord, dest.AsGpuRegister(), 2950 LoadFromOffset(kLoadDoublewor [all...] |
H A D | assembler_mips64.h | 962 void LoadFromOffset(LoadOperandType type, function in class:art::mips64::FINAL 1112 void LoadFromOffset(LoadOperandType type, GpuRegister reg, GpuRegister base, int32_t offset);
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/art/compiler/utils/arm/ |
H A D | jni_macro_assembler_arm.cc | 231 __ LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, in_off.Int32Value()); 237 __ LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, src.Int32Value()); 249 __ LoadFromOffset(kLoadWord, 261 __ LoadFromOffset(kLoadWord, dst.AsCoreRegister(), SP, src.Int32Value()); 271 __ LoadFromOffset(kLoadWord, 296 assembler->LoadFromOffset(kLoadWord, dst.AsCoreRegister(), src_register, src_offset); 299 assembler->LoadFromOffset(kLoadWord, dst.AsRegisterPairLow(), src_register, src_offset); 300 assembler->LoadFromOffset(kLoadWord, dst.AsRegisterPairHigh(), src_register, src_offset + 4); 320 __ LoadFromOffset(kLoadWord, dst.AsCoreRegister(), TR, offs.Int32Value()); 328 __ LoadFromOffset(kLoadWor [all...] |
H A D | assembler_thumb2_test.cc | 295 __ LoadFromOffset(type, arm::R0, arm::R7, 0); 296 __ LoadFromOffset(type, arm::R1, arm::R7, 31); 297 __ LoadFromOffset(type, arm::R2, arm::R7, 32); 298 __ LoadFromOffset(type, arm::R3, arm::R7, 4095); 299 __ LoadFromOffset(type, arm::R4, arm::SP, 0); 331 __ LoadFromOffset(type, arm::R0, arm::R7, 0); 332 __ LoadFromOffset(type, arm::R1, arm::R7, 62); 333 __ LoadFromOffset(type, arm::R2, arm::R7, 64); 334 __ LoadFromOffset(type, arm::R3, arm::R7, 4094); 335 __ LoadFromOffset(typ [all...] |
H A D | jni_macro_assembler_arm_vixl.cc | 216 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), sp, in_off.Int32Value()); 226 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), sp, src.Int32Value()); 238 asm_.LoadFromOffset(kLoadWord, 285 asm_.LoadFromOffset(kLoadWord, dst.AsVIXLRegister(), tr, offs.Int32Value()); 295 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), tr, thr_offs.Int32Value()); 382 asm_.LoadFromOffset(kLoadWord, temp.AsVIXLRegister(), sp, src.Int32Value()); 385 asm_.LoadFromOffset(kLoadWord, temp.AsVIXLRegister(), sp, src.Int32Value()); 387 asm_.LoadFromOffset(kLoadWord, temp.AsVIXLRegister(), sp, src.Int32Value() + 4); 449 asm_.LoadFromOffset(kLoadWord, 492 asm_.LoadFromOffset(kLoadWor [all...] |
H A D | assembler_arm_vixl.h | 198 void LoadFromOffset(LoadOperandType type,
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H A D | assembler_arm_vixl.cc | 281 void ArmVIXLAssembler::LoadFromOffset(LoadOperandType type, function in class:art::arm::ArmVIXLAssembler
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H A D | assembler_arm.h | 727 virtual void LoadFromOffset(LoadOperandType type,
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H A D | assembler_thumb2.h | 329 void LoadFromOffset(LoadOperandType type,
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/art/compiler/trampolines/ |
H A D | trampoline_compiler.cc | 145 __ LoadFromOffset(kLoadWord, T9, A0, offset.Int32Value()); 148 __ LoadFromOffset(kLoadWord, T9, A0, JNIEnvExt::SelfOffset(4).Int32Value()); 149 __ LoadFromOffset(kLoadWord, T9, T9, offset.Int32Value()); 152 __ LoadFromOffset(kLoadWord, T9, S1, offset.Int32Value()); 177 __ LoadFromOffset(kLoadDoubleword, T9, A0, offset.Int32Value()); 180 __ LoadFromOffset(kLoadDoubleword, T9, A0, JNIEnvExt::SelfOffset(8).Int32Value()); 181 __ LoadFromOffset(kLoadDoubleword, T9, T9, offset.Int32Value()); 184 __ LoadFromOffset(kLoadDoubleword, T9, S1, offset.Int32Value());
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/art/compiler/utils/ |
H A D | assembler_thumb_test.cc | 842 TEST_F(Thumb2AssemblerTest, LoadFromOffset) { 843 __ LoadFromOffset(kLoadWord, R2, R4, 12); 844 __ LoadFromOffset(kLoadWord, R2, R4, 0xfff); 845 __ LoadFromOffset(kLoadWord, R2, R4, 0x1000); 846 __ LoadFromOffset(kLoadWord, R2, R4, 0x1000a4); 847 __ LoadFromOffset(kLoadWord, R2, R4, 0x101000); 848 __ LoadFromOffset(kLoadWord, R4, R4, 0x101000); 849 __ LoadFromOffset(kLoadUnsignedHalfword, R2, R4, 12); 850 __ LoadFromOffset(kLoadUnsignedHalfword, R2, R4, 0xfff); 851 __ LoadFromOffset(kLoadUnsignedHalfwor [all...] |
/art/compiler/utils/arm64/ |
H A D | jni_macro_assembler_arm64.cc | 191 LoadFromOffset(scratch.AsXRegister(), SP, in_off.Int32Value()); 241 void Arm64JNIMacroAssembler::LoadFromOffset(XRegister dest, XRegister base, int32_t offset) { function in class:art::arm64::Arm64JNIMacroAssembler 328 LoadFromOffset(dst.AsXRegister(), TR, offs.Int32Value()); 366 LoadFromOffset(scratch.AsXRegister(), TR, tr_offs.Int32Value()); 375 LoadFromOffset(scratch.AsXRegister(), SP, fr_offs.Int32Value()); 399 LoadFromOffset(scratch.AsXRegister(), SP, src.Int32Value()); 421 LoadFromOffset(scratch.AsXRegister(), base.AsXRegister(), src_offset.Int32Value()); 443 LoadFromOffset(scratch.AsXRegister(), SP, src.Int32Value()); 484 LoadFromOffset(scratch.AsXRegister(), src.AsXRegister(), src_offset.Int32Value()); 540 LoadFromOffset(scratc [all...] |
H A D | jni_macro_assembler_arm64.h | 219 void LoadFromOffset(XRegister dest, XRegister base, int32_t offset);
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/art/compiler/optimizing/ |
H A D | code_generator_mips64.cc | 725 // __ LoadFromOffset(kLoadWord, out, out, offset); 1048 __ LoadFromOffset(load_type, 1052 __ LoadFromOffset(load_type, 1077 __ LoadFromOffset(kLoadWord, 1141 __ LoadFromOffset(kLoadDoubleword, reg, SP, ofs); 1210 __ LoadFromOffset(load_type, 1321 __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex()); 1324 __ LoadFromOffset(kLoadDoubleword, TMP, SP, source.GetStackIndex()); 1372 __ LoadFromOffset(load_type, TMP, SP, mem_loc.GetStackIndex()); 1419 __ LoadFromOffset(kLoadDoublewor [all...] |
H A D | code_generator_mips.cc | 790 // __ LoadFromOffset(kLoadWord, out, out, offset); 1166 __ LoadFromOffset(kLoadWord, reg, SP, offset); 1178 __ LoadFromOffset(kLoadWord, reg_l, SP, offset_l); 1181 __ LoadFromOffset(kLoadWord, reg_h, SP, offset_h); 1218 __ LoadFromOffset(kLoadWord, 1222 __ LoadFromOffset(kLoadWord, 1266 __ LoadFromOffset(kLoadWord, 1336 __ LoadFromOffset(kLoadWord, reg, SP, ofs); 1403 __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex()); 1422 __ LoadFromOffset(kLoadWor [all...] |
H A D | code_generator_arm.cc | 843 __ LoadFromOffset(kLoadWord, temp_, obj_, monitor_offset); 964 __ LoadFromOffset(kLoadWord, temp1_, obj_, monitor_offset); 1122 // __ LoadFromOffset(kLoadWord, out, out, offset); 1926 __ LoadFromOffset(kLoadWord, static_cast<Register>(reg_id), SP, stack_index); 2074 __ LoadFromOffset(kLoadWord, IP, IP, 0); 2254 __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex()); 2272 __ LoadFromOffset(kLoadWord, IP, SP, source.GetStackIndex()); 2300 __ LoadFromOffset(kLoadWordPair, destination.AsRegisterPairLow<Register>(), 2385 __ LoadFromOffset(kLoadWord, LR, TR, entry_point_offset); 2711 __ LoadFromOffset(kLoadWor [all...] |
H A D | code_generator_arm_vixl.cc | 872 arm_codegen->GetAssembler()->LoadFromOffset(kLoadWord, temp_, obj_, monitor_offset); 1000 arm_codegen->GetAssembler()->LoadFromOffset(kLoadWord, temp1_, obj_, monitor_offset); 1164 // __ LoadFromOffset(kLoadWord, out, out, offset); 2345 GetAssembler()->LoadFromOffset(kLoadWord, 2371 GetAssembler()->LoadFromOffset(kLoadWord, temp, sp, source.GetStackIndex()); 2745 GetAssembler()->LoadFromOffset(kLoadWord, 3261 GetAssembler()->LoadFromOffset(kLoadWord, 3268 GetAssembler()->LoadFromOffset(kLoadWord, temp, temp, method_offset); 3272 GetAssembler()->LoadFromOffset(kLoadWord, lr, temp, entry_point); 3646 GetAssembler()->LoadFromOffset(kLoadWor [all...] |
H A D | intrinsics_arm.cc | 629 __ LoadFromOffset(kLoadWord, 1669 __ LoadFromOffset(kLoadWord, temp, input, length_offset); 1679 __ LoadFromOffset(kLoadWord, temp, input, length_offset); 1702 __ LoadFromOffset(kLoadWord, temp, input, length_offset); 1845 __ LoadFromOffset(kLoadUnsignedHalfword, temp1, temp1, primitive_offset); 1869 __ LoadFromOffset(kLoadUnsignedHalfword, temp2, temp2, primitive_offset); 1893 __ LoadFromOffset(kLoadWord, temp1, temp1, super_offset); 1903 __ LoadFromOffset(kLoadWord, temp1, dest, class_offset); 1905 __ LoadFromOffset(kLoadWord, temp2, src, class_offset); 1919 __ LoadFromOffset(kLoadWor [all...] |
H A D | intrinsics_mips.cc | 1511 __ LoadFromOffset(kLoadWord, 2710 __ LoadFromOffset(kLoadWord, TMP, srcObj, count_offset); 2719 __ LoadFromOffset(kLoadUnsignedByte, TMP, srcPtr, value_offset); 3018 __ LoadFromOffset(kLoadWord, AT, input, length_offset); 3023 __ LoadFromOffset(kLoadWord, AT, input, length_offset); 3041 __ LoadFromOffset(kLoadWord, AT, input, length_offset);
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H A D | intrinsics_mips64.cc | 1154 __ LoadFromOffset(kLoadUnsignedWord, 2061 __ LoadFromOffset(kLoadWord, TMP, srcObj, count_offset); 2070 __ LoadFromOffset(kLoadUnsignedByte, TMP, srcPtr, value_offset); 2171 __ LoadFromOffset(kLoadWord, AT, input, length_offset); 2176 __ LoadFromOffset(kLoadWord, AT, input, length_offset); 2194 __ LoadFromOffset(kLoadWord, AT, input, length_offset);
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/art/compiler/linker/arm/ |
H A D | relative_patcher_thumb2.cc | 106 assembler.LoadFromOffset(
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