Searched refs:bits (Results 1 - 20 of 20) sorted by relevance

/art/runtime/interpreter/mterp/x86/
H A Dop_const.S2 movl 2(rPC), %eax # grab all 32 bits at once
/art/runtime/interpreter/mterp/x86_64/
H A Dop_const.S2 movl 2(rPC), %eax # grab all 32 bits at once
/art/runtime/interpreter/mterp/mips/
H A Dop_iput_wide_quick.S11 addu a2, a2, a3 # obj.field (64 bits, aligned) <- a0/a1
14 STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0/a1
H A Dop_iput_quick.S14 $store a0, 0(t0) # obj.field (8/16/32 bits) <- a0
/art/runtime/base/
H A Dbit_utils.h30 // Like sizeof, but count how many bits a type takes. Pass type explicitly.
40 // Like sizeof, but count how many bits a type takes. Infers type from parameter.
83 // Return the number of 1-bits in `x`.
101 // Find the bit position of the most significant bit (0-based), or -1 if there were no bits set.
110 // Find the bit position of the least significant bit (0-based), or -1 if there were no bits set.
118 // How many bits (minimally) does it take to store the constant 'value'? i.e. 1 for 1, 3 for 5, etc.
246 constexpr T GetIntLimit(size_t bits) { argument
247 DCHECK_NE(bits, 0u);
248 DCHECK_LT(bits, BitSizeOf<T>());
249 return static_cast<T>(1) << (bits
293 MaxInt(size_t bits) argument
305 MinInt(size_t bits) argument
327 BitIteratorBase(T bits) argument
383 LowToHighBits(T bits) argument
389 HighToLowBits(T bits) argument
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H A Dbit_vector_test.cc71 uint32_t bits[kWords]; local
72 memset(bits, 0, sizeof(bits));
74 BitVector bv(false, Allocator::GetNoopAllocator(), kWords, bits);
77 EXPECT_EQ(bits, bv.GetRawStorage());
128 uint32_t bits[kWords]; local
129 memset(bits, 0, sizeof(bits));
131 BitVector bv(false, Allocator::GetNoopAllocator(), kWords, bits);
241 // `buf` is long enough to hold all set bits, copyin
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H A Dbit_vector.h39 * @brief Convenient iterator across the indexes of the BitVector's set bits.
42 * to the highest index of the BitVector's set bits. Instances can be retrieved
90 uint32_t bit_index_; // Current index (size in bits).
96 * @brief BitVector wrapper class for iteration across indexes of set bits.
143 // The number of words necessary to encode bits.
144 static constexpr uint32_t BitsToWords(uint32_t bits) { argument
145 return RoundUp(bits, kWordBits) / kWordBits;
176 // Mark all bits bit as "clear".
179 // Mark specified number of bits as "set". Cannot set all bits lik
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/art/runtime/interpreter/mterp/mips64/
H A Dop_int_to_long.S3 GET_VREG a0, a3 # a0 <- vB (sign-extended to 64 bits)
/art/runtime/
H A Dart_field-inl.h231 JValue bits; local
232 bits.SetI(Get32(object));
233 return bits.GetF();
239 JValue bits; local
240 bits.SetF(f);
241 Set32<kTransactionActive>(object, bits.GetI());
246 JValue bits; local
247 bits.SetJ(Get64(object));
248 return bits.GetD();
254 JValue bits; local
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H A Ddex_file_verifier_test.cc813 uint32_t bits = POPCOUNT(kInterfaceDisallowed); local
814 for (uint32_t i = 1; i < (1u << bits); ++i) {
977 uint32_t bits = POPCOUNT(kAccFlags); local
978 for (uint32_t j = 1; j < (1u << bits); ++j) {
1187 uint32_t bits = POPCOUNT(kInterfaceDisallowed); local
1188 for (uint32_t i = 1; i < (1u << bits); ++i) {
/art/runtime/interpreter/mterp/
H A Dgen_mterp.py88 bits = -1
91 bits += 1
93 if handler_size_bytes == 0 or handler_size_bytes != (1 << bits):
96 handler_size_bits = bits
/art/oatdump/
H A Doatdump.cc611 int64_t bits[kByteKindCount] = {}; member in struct:art::OatDumper::Stats
627 bits[kind] += count;
631 const int64_t sum = std::accumulate(bits, bits + kByteKindCount, 0u);
634 Dump(os, "Code ", bits[kByteKindCode], sum);
635 Dump(os, "QuickMethodHeader ", bits[kByteKindQuickMethodHeader], sum);
636 Dump(os, "CodeInfoEncoding ", bits[kByteKindCodeInfoEncoding], sum);
637 Dump(os, "CodeInfoLocationCatalog ", bits[kByteKindCodeInfoLocationCatalog], sum);
638 Dump(os, "CodeInfoDexRegisterMap ", bits[kByteKindCodeInfoDexRegisterMap], sum);
639 Dump(os, "CodeInfoStackMasks ", bits[kByteKindCodeInfoStackMask
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/art/runtime/arch/arm/
H A Dquick_entrypoints_arm.S649 and r3, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ zero the gc bits
651 @ unlocked case - r1: original lock word that's zero except for the read barrier bits.
652 orr r2, r1, r2 @ r2 holds thread id with count of 0 with preserved read barrier bits
657 .Lnot_unlocked: @ r1: original lock word, r2: thread_id with count of 0 and zero read barrier bits
659 cbnz r3, .Lslow_lock @ if either of the top two bits are set, go slow path
661 uxth r2, r2 @ zero top 16 bits
665 and r3, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ zero the gc bits.
670 strex r3, r2, [r0, #MIRROR_OBJECT_LOCK_WORD_OFFSET] @ strex necessary for read barrier bits
707 cbnz r2, .Lslow_unlock @ if either of the top two bits are set, go slow path
710 and r3, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ zero the gc bits
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/art/compiler/optimizing/
H A Dcode_generator_arm64.cc3328 int bits = instruction->GetResultType() == Primitive::kPrimInt ? 32 : 64; local
3329 __ Asr(temp, dividend, bits - 1);
3330 __ Lsr(temp, temp, bits - ctz_imm);
5697 // bits, so we don't need to sign-extend and can just perform a move.
5699 // top 32 bits of the target register. We theoretically could leave those
5700 // bits unchanged, but we would have to make sure that no code uses a
5701 // 32bit input value as a 64bit value assuming that the top 32 bits are
/art/runtime/arch/mips64/
H A Dquick_entrypoints_mips64.S2275 lwu $v0, 0($sp) # Move zero extended lower 32-bits to return value register.
/art/runtime/interpreter/mterp/out/
H A Dmterp_mips.S2223 * Array get, 32 bits or less. vAA <- vBB[vCC].
2255 * Array get, 64 bits. vAA <- vBB[vCC].
2307 * Array get, 32 bits or less. vAA <- vBB[vCC].
2341 * Array get, 32 bits or less. vAA <- vBB[vCC].
2375 * Array get, 32 bits or less. vAA <- vBB[vCC].
2409 * Array get, 32 bits or less. vAA <- vBB[vCC].
2443 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2473 * Array put, 64 bits. vBB[vCC] <- vAA.
2523 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2556 * Array put, 32 bits o
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H A Dmterp_arm.S199 * bits that hold the shift distance are used for the half/byte/sign flags.
1785 * Array get, 32 bits or less. vAA <- vBB[vCC].
1818 * Array get, 64 bits. vAA <- vBB[vCC].
1875 * Array get, 32 bits or less. vAA <- vBB[vCC].
1910 * Array get, 32 bits or less. vAA <- vBB[vCC].
1945 * Array get, 32 bits or less. vAA <- vBB[vCC].
1980 * Array get, 32 bits or less. vAA <- vBB[vCC].
2014 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2047 * Array put, 64 bits. vBB[vCC] <- vAA.
2096 * Array put, 32 bits o
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H A Dmterp_x86.S84 o High order 16 bits of ebx must be zero on entry to handler
716 movl 2(rPC), %eax # grab all 32 bits at once
1761 * Array get, 32 bits or less. vAA <- vBB[vCC].
1784 * Array get, 64 bits. vAA <- vBB[vCC].
1831 * Array get, 32 bits or less. vAA <- vBB[vCC].
1856 * Array get, 32 bits or less. vAA <- vBB[vCC].
1881 * Array get, 32 bits or less. vAA <- vBB[vCC].
1906 * Array get, 32 bits or less. vAA <- vBB[vCC].
1930 * Array put, 32 bits or less. vBB[vCC] <- vAA.
1954 * Array put, 64 bits
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H A Dmterp_x86_64.S80 o High order 16 bits of ebx must be zero on entry to handler
683 movl 2(rPC), %eax # grab all 32 bits at once
1655 * Array get, 32 bits or less. vAA <- vBB[vCC].
1684 * Array get, 32 bits or less. vAA <- vBB[vCC].
1736 * Array get, 32 bits or less. vAA <- vBB[vCC].
1766 * Array get, 32 bits or less. vAA <- vBB[vCC].
1796 * Array get, 32 bits or less. vAA <- vBB[vCC].
1826 * Array get, 32 bits or less. vAA <- vBB[vCC].
1855 * Array put, 32 bits or less. vBB[vCC] <- vAA.
1883 * Array put, 32 bits o
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H A Dmterp_mips64.S185 * Note, GET_VREG does sign extension to 64 bits while
186 * GET_VREG_U does zero extension to 64 bits.
1755 * Array get, 32 bits or less. vAA <- vBB[vCC].
1788 * Array get, 64 bits. vAA <- vBB[vCC].
1841 * Array get, 32 bits or less. vAA <- vBB[vCC].
1876 * Array get, 32 bits or less. vAA <- vBB[vCC].
1911 * Array get, 32 bits or less. vAA <- vBB[vCC].
1946 * Array get, 32 bits or less. vAA <- vBB[vCC].
1980 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2013 * Array put, 64 bits
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