Searched refs:IoLimit (Results 1 - 21 of 21) sorted by relevance

/device/linaro/bootloader/edk2/QuarkPlatformPkg/Pci/Dxe/PciHostBridge/
H A DPciHostResource.h37 UINTN IoLimit; member in struct:__anon8828
H A DPciHostBridge.c165 PrivateData->Aperture.IoLimit = PcdGet16 (PcdPciHostBridgeIoBase) + (PcdGet16 (PcdPciHostBridgeIoSize) - 1);
411 if (RootBridgeInstance->Aperture.IoBase < RootBridgeInstance->Aperture.IoLimit) {
426 while((BaseAddress + AddrLen) <= RootBridgeInstance->Aperture.IoLimit + 1) {
H A DPciRootBridgeIo.c577 if (Address > PrivateData->Aperture.IoLimit) {
653 if (Address > PrivateData->Aperture.IoLimit) {
/device/linaro/bootloader/edk2/MdeModulePkg/Library/BaseSerialPortLib16550/
H A DBaseSerialPortLib16550.c198 UINT32 IoLimit; local
268 IoLimit = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimit));
269 if ((IoLimit & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) {
270 IoLimit = IoLimit >> 4;
272 IoLimit = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimitUpper16)) << 4) | (IoLimit >> 4);
284 if (IoLimit < IoBase) {
291 if (IoBase < ParentIoBase || IoBase > ParentIoLimit || IoLimit > ParentIoLimi
[all...]
/device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/
H A DPcatPciRootBridge.c253 Limit = (((UINT32)PciConfigurationHeader.Bridge.IoLimit & 0xf0) << 8) | 0x0fff;
262 if (PrivateData->IoLimit < Limit) {
263 PrivateData->IoLimit = Limit;
435 if (PrivateData->IoLimit < 0xffff) {
436 PrivateData->IoLimit = 0xffff;
572 if (PrivateData->IoLimit >= PrivateData->IoBase) {
651 if (PrivateData->IoLimit >= PrivateData->IoBase) {
657 Configuration->AddrRangeMax = PrivateData->IoLimit;
869 if (PrivateData->IoLimit < Limit) {
870 PrivateData->IoLimit
[all...]
H A DPcatPciRootBridge.h67 UINT64 IoLimit; // Max allowable io access member in struct:__anon3836
/device/linaro/bootloader/edk2/ArmVirtPkg/PciHostBridgeDxe/
H A DPciHostBridge.h406 UINT64 IoLimit; member in struct:__anon3402
459 UINT64 IoLimit; member in struct:__anon3406
H A DPciRootBridgeIo.c656 PrivateData->IoLimit = ResAperture->IoLimit;
816 Limit = PrivateData->IoLimit;
H A DPciHostBridge.c122 mResAperture[0][0].IoLimit = PcdGet64 (PcdPciIoBase) +
392 BaseAddress = mResAperture[0][0].IoLimit;
/device/linaro/bootloader/edk2/OvmfPkg/PciHostBridgeDxe/
H A DPciHostBridge.h554 UINT64 IoLimit; member in struct:__anon8714
613 UINT64 IoLimit; member in struct:__anon8719
H A DPciRootBridgeIo.c847 PrivateData->IoLimit = ResAperture->IoLimit;
1024 Limit = PrivateData->IoLimit;
H A DPciHostBridge.c139 ResAperture.IoLimit = MAX_UINT16;
/device/linaro/bootloader/edk2/PcAtChipsetPkg/PciHostBridgeDxe/
H A DPciHostBridge.h560 UINT64 IoLimit; member in struct:__anon8782
612 UINT64 IoLimit; member in struct:__anon8786
H A DPciRootBridgeIo.c847 PrivateData->IoLimit = ResAperture->IoLimit;
1024 Limit = PrivateData->IoLimit;
/device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/
H A DPciDeviceSupport.c495 (PciData.Bridge.IoBase != 0 || PciData.Bridge.IoLimit != 0)) ||
497 ((PciData.Bridge.IoBase & 0xF0) != 0 || (PciData.Bridge.IoLimit & 0xF0) != 0 || PciData.Bridge.IoBaseUpper16 != 0 || PciData.Bridge.IoLimitUpper16 != 0))) {
/device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/Ipf/
H A DPcatIo.c80 if ( Address < PrivateData->IoBase || Address > PrivateData->IoLimit ) {
183 if ( Address < PrivateData->IoBase || Address > PrivateData->IoLimit ) {
/device/linaro/bootloader/edk2/BaseTools/Source/C/Include/IndustryStandard/
H A Dpci22.h72 UINT8 IoLimit; member in struct:__anon3654
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/
H A Dpci22.h79 UINT8 IoLimit; member in struct:__anon4771
/device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellDebug1CommandsLib/
H A DPci.h372 UINT8 IoLimit; // I/O Limit member in struct:__anon9318
H A DPci.c3531 IoAddress32 = (Bridge->IoLimitUpper << 16 | Bridge->IoLimit << 8);
/device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
H A DPci22.h88 UINT8 IoLimit; member in struct:__anon7295

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