Searched refs:High (Results 1 - 25 of 65) sorted by relevance

123

/external/syslinux/gnu-efi/gnu-efi-3.0/lib/runtime/
H A Drtstr.c114 UINTN High, Low; local
116 High = BcdValue >> 4;
117 Low = BcdValue - (High << 4);
119 return ((UINT8)(Low + (High * 10)));
132 UINTN High, Low; local
134 High = DecValue / 10;
135 Low = DecValue - (High * 10);
137 return ((UINT8)(Low + (High << 4)));
/external/llvm/lib/IR/
H A DIntrinsicInst.cpp63 const char *const *High = NameTable.end(); local
65 while (CmpEnd < Name.size() && High - Low > 0) {
73 std::tie(Low, High) = std::equal_range(Low, High, Name.data(), Cmp);
75 if (High - Low > 0)
H A DMetadata.cpp923 ConstantInt *Low, ConstantInt *High) {
924 ConstantRange NewRange(Low->getValue(), High->getValue());
931 Type *Ty = High->getType();
942 ConstantInt *Low, ConstantInt *High) {
944 if (tryMergeRange(EndPoints, Low, High))
948 EndPoints.push_back(High);
/external/clang/test/Index/
H A Dcomplete-type-factors.m9 High
31 [a method:Red priority:High];
41 // CHECK-CC1: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (32)
56 // CHECK-CC2: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
72 // CHECK-CC3: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (16)
88 // CHECK-CC4: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
106 // CHECK-CC6: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
122 // CHECK-CC7: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
134 // CHECK-CC8: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (16)
/external/llvm/lib/Transforms/Utils/
H A DLowerSwitch.cpp36 int64_t Low, High; member in struct:__anon13437::IntRange
43 // Find the first range whose High field is >= R.High,
48 [](const IntRange &A, const IntRange &B) { return A.High < B.High; });
64 ConstantInt* High; member in struct:__anon13437::LowerSwitch::CaseRange
68 : Low(low), High(high), BB(bb) {}
93 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High);
145 O << *B->Low << " -" << *B->High;
212 if (Begin->Low == LowerBound && Begin->High
441 int64_t High = I.High->getSExtValue(); local
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/external/swiftshader/third_party/LLVM/lib/Transforms/Utils/
H A DLowerSwitch.cpp51 Constant* High; member in struct:__anon18996::LowerSwitch::CaseRange
55 Low(low), High(high), BB(bb) { }
77 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High);
120 O << *B->Low << " -" << *B->High;
148 << cast<ConstantInt>(Pivot.High)->getValue() << "\n");
186 if (Leaf.Low == Leaf.High) {
194 Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_SLE, Val, Leaf.High,
198 Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_ULE, Val, Leaf.High,
206 Constant *UpperBound = ConstantExpr::getAdd(NegLo, Leaf.High);
221 uint64_t Range = cast<ConstantInt>(Leaf.High)
[all...]
/external/gemmlowp/meta/generators/
H A Dqnt_Nx8_neon.py42 emitter.AllLanes(registers.High(register))],
135 registers.High(lane.load_1),
137 registers.High(lane.load_2)],
146 quantize_setup.append([lane.load_2, lane.offset, registers.High(lane_temp)])
184 emitter.Lane(registers.High(lane.load_1), 0),
190 registers.High(lane.load_1)],
196 registers.High(lane.load_1)],
206 registers.High(lane.load_1),
213 registers.High(lane.load_1),
218 emitter.Lane(registers.High(lan
[all...]
H A Dmul_Nx8_Mx8_neon.py43 lanes.AddLane(registers.High(quad_register))
201 registers.High(values), 0))
233 emitter.EmitVPadd('u32', registers.High(register),
255 registers.High(aggregator),
298 registers.Low(aggregator), registers.High(aggregator))
H A Dneon_emitter.py36 def High(register): function
96 def High(self, register): member in class:NeonRegisters
97 return High(register)
H A Dzip_Nx8_neon.py200 registers.High(lane.aggregator))
204 high = registers.High(temp)
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.h99 unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false);
104 bool High = false);
H A DX86MCTargetDesc.cpp278 bool High) {
282 if (High) {
450 unsigned llvm::getX86SubSuperRegister(unsigned Reg, unsigned Size, bool High) { argument
451 unsigned Res = getX86SubSuperRegisterOrZero(Reg, Size, High);
277 getX86SubSuperRegisterOrZero(unsigned Reg, unsigned Size, bool High) argument
/external/llvm/unittests/ADT/
H A DVariadicFunctionTest.cpp88 void CountInRangeImpl(int *NumInRange, int Low, int High, argument
92 if (Low <= *Args[i] && *Args[i] <= High)
/external/swiftshader/third_party/LLVM/include/llvm/
H A DInlineAsm.h232 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
245 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
283 unsigned High = Flag >> 16; local
286 if (!High)
288 RC = High - 1;
/external/libvpx/libvpx/test/
H A Dregister_state_check.h42 return (lhs.Low == rhs.Low && lhs.High == rhs.High);
/external/llvm/lib/Target/NVPTX/
H A DNVVMIntrRange.cpp65 // Adds the passed-in [Low,High) range information as metadata to the
67 static bool addRangeMetadata(uint64_t Low, uint64_t High, CallInst *C) { argument
72 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, High))};
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86RegisterInfo.h134 unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false);
/external/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp413 unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::subreg_hireg); local
416 TmpInst.addOperand(MCOperand::createReg(High));
501 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); local
503 MO.setReg(High);
513 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); local
515 MO.setReg(High);
526 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); local
528 MO.setReg(High);
/external/skia/src/sfnt/
H A DSkPanose.h84 High = 8, member in class:SkPanose::Data::TextAndDisplay::Contrast
238 High = 8, member in class:SkPanose::Data::Script::Contrast
296 High = 5, member in class:SkPanose::Data::Script::XAscent
355 High = 8, member in class:SkPanose::Data::Decorative::Contrast
/external/llvm/include/llvm/IR/
H A DInlineAsm.h281 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
294 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
303 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
351 unsigned High = Flag >> 16; local
354 if (!High)
356 RC = High - 1;
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.h151 const ConstantInt *Low, *High; member in struct:llvm::SelectionDAGBuilder::CaseCluster
159 static CaseCluster range(const ConstantInt *Low, const ConstantInt *High, argument
164 C.High = High;
171 const ConstantInt *High, unsigned JTCasesIndex,
176 C.High = High;
182 static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High, argument
187 C.High = High;
170 jumpTable(const ConstantInt *Low, const ConstantInt *High, unsigned JTCasesIndex, BranchProbability Prob) argument
[all...]
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.h133 Constant* High; member in struct:llvm::SelectionDAGBuilder::Case
137 Case() : Low(0), High(0), BB(0), ExtraWeight(0) { }
139 uint32_t extraweight) : Low(low), High(high), BB(bb),
143 const APInt &rHigh = cast<ConstantInt>(High)->getValue();
187 assert(isa<ConstantInt>(C1.Low) && isa<ConstantInt>(C2.High));
189 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High);
/external/lzma/C/
H A D7z.h72 UInt32 High; member in struct:__anon13985
/external/vixl/test/aarch64/examples/
H A Dtest-examples.cc511 #define CHECKBOUNDS_DOTEST(Value, Low, High) \
516 simulator.WriteXRegister(2, High); \
518 VIXL_CHECK(regs.xreg(0) == ((Low <= Value) && (Value <= High))); \
/external/llvm/include/llvm/Analysis/
H A DLoopAccessAnalysis.h386 : RtCheck(RtCheck), High(RtCheck.Pointers[Index].End),
404 const SCEV *High; member in struct:llvm::RuntimePointerChecking::CheckingPtrGroup

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