| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1040 MCInst TmpInst; local
1043 LowerARMMachineInstrToMCInst(MI, TmpInst, *this);
1044 TmpInst.setOpcode(Opcode);
1045 OutStreamer.EmitInstruction(TmpInst);
1212 MCInst TmpInst; local
1213 TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrel ? ARM::t2ADR
1216 populateADROperands(TmpInst, MI->getOperand(0).getReg(),
1220 OutStreamer.EmitInstruction(TmpInst);
1226 MCInst TmpInst; local
1227 TmpInst
1243 MCInst TmpInst; local
1255 MCInst TmpInst; local
1265 MCInst TmpInst; local
1275 MCInst TmpInst; local
1288 MCInst TmpInst; local
1300 MCInst TmpInst; local
1315 MCInst TmpInst; local
1351 MCInst TmpInst; local
1504 MCInst TmpInst; local
1518 MCInst TmpInst; local
1535 MCInst TmpInst; local
1552 MCInst TmpInst; local
1577 MCInst TmpInst; local
1603 MCInst TmpInst; local
1658 MCInst TmpInst; local
1669 MCInst TmpInst; local
1682 MCInst TmpInst; local
1695 MCInst TmpInst; local
1707 MCInst TmpInst; local
1715 MCInst TmpInst; local
1742 MCInst TmpInst; local
1756 MCInst TmpInst; local
1767 MCInst TmpInst; local
1779 MCInst TmpInst; local
1792 MCInst TmpInst; local
1814 MCInst TmpInst; local
1825 MCInst TmpInst; local
1836 MCInst TmpInst; local
1847 MCInst TmpInst; local
1866 MCInst TmpInst; local
1879 MCInst TmpInst; local
1889 MCInst TmpInst; local
1900 MCInst TmpInst; local
1911 MCInst TmpInst; local
1923 MCInst TmpInst; local
[all...] |
| /external/llvm/lib/Target/BPF/ |
| H A D | BPFAsmPrinter.cpp | 51 MCInst TmpInst; local
52 MCInstLowering.Lower(MI, TmpInst);
53 EmitToStreamer(*OutStreamer, TmpInst);
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonAsmPrinter.cpp | 287 MCInst TmpInst; local
289 TmpInst.setOpcode(Hexagon::L2_loadrdgp);
290 TmpInst.addOperand(Reg);
291 TmpInst.addOperand(MCOperand::createExpr(
293 MappedInst = TmpInst;
306 MCInst TmpInst; local
308 TmpInst.setOpcode(Hexagon::L2_loadrigp);
309 TmpInst.addOperand(Reg);
310 TmpInst.addOperand(MCOperand::createExpr(HexagonMCExpr::create(
312 MappedInst = TmpInst;
382 MCInst TmpInst; local
408 MCInst TmpInst; local
443 MCInst TmpInst; local
479 MCInst TmpInst; local
566 MCInst TmpInst; local
[all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 847 MCInst TmpInst; local
848 TmpInst.setOpcode((Opcode == PPC::DCBTx || Opcode == PPC::DCBTT) ?
850 TmpInst.addOperand(MCOperand::createImm(
852 TmpInst.addOperand(Inst.getOperand(0));
853 TmpInst.addOperand(Inst.getOperand(1));
854 Inst = TmpInst;
859 MCInst TmpInst; local
860 TmpInst.setOpcode(PPC::DCBT);
861 TmpInst.addOperand(Inst.getOperand(2));
862 TmpInst
869 MCInst TmpInst; local
878 MCInst TmpInst; local
887 MCInst TmpInst; local
896 MCInst TmpInst; local
905 MCInst TmpInst; local
914 MCInst TmpInst; local
924 MCInst TmpInst; local
938 MCInst TmpInst; local
952 MCInst TmpInst; local
967 MCInst TmpInst; local
982 MCInst TmpInst; local
995 MCInst TmpInst; local
1008 MCInst TmpInst; local
1021 MCInst TmpInst; local
1034 MCInst TmpInst; local
1048 MCInst TmpInst; local
1061 MCInst TmpInst; local
1074 MCInst TmpInst; local
1088 MCInst TmpInst; local
1100 MCInst TmpInst; local
1112 MCInst TmpInst; local
1124 MCInst TmpInst; local
1136 MCInst TmpInst; local
1154 MCInst TmpInst; local
1171 MCInst TmpInst; local
1189 MCInst TmpInst; local
1208 MCInst TmpInst; local
1219 MCInst TmpInst; local
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 6832 MCInst TmpInst; local
6833 TmpInst.setOpcode(Opcode);
6834 TmpInst.addOperand(Inst.getOperand(0));
6835 TmpInst.addOperand(Inst.getOperand(1));
6836 TmpInst.addOperand(Inst.getOperand(1));
6837 TmpInst.addOperand(MCOperand::createReg(0));
6838 TmpInst.addOperand(MCOperand::createImm(0));
6839 TmpInst.addOperand(Inst.getOperand(2));
6840 TmpInst.addOperand(Inst.getOperand(3));
6841 Inst = TmpInst;
6850 MCInst TmpInst; local
6928 MCInst TmpInst; local
7010 MCInst TmpInst; local
7032 MCInst TmpInst; local
7056 MCInst TmpInst; local
7082 MCInst TmpInst; local
7108 MCInst TmpInst; local
7130 MCInst TmpInst; local
7154 MCInst TmpInst; local
7180 MCInst TmpInst; local
7206 MCInst TmpInst; local
7226 MCInst TmpInst; local
7248 MCInst TmpInst; local
7272 MCInst TmpInst; local
7297 MCInst TmpInst; local
7320 MCInst TmpInst; local
7347 MCInst TmpInst; local
7378 MCInst TmpInst; local
7411 MCInst TmpInst; local
7434 MCInst TmpInst; local
7461 MCInst TmpInst; local
7492 MCInst TmpInst; local
7525 MCInst TmpInst; local
7546 MCInst TmpInst; local
7571 MCInst TmpInst; local
7600 MCInst TmpInst; local
7635 MCInst TmpInst; local
7657 MCInst TmpInst; local
7681 MCInst TmpInst; local
7706 MCInst TmpInst; local
7728 MCInst TmpInst; local
7752 MCInst TmpInst; local
7777 MCInst TmpInst; local
7801 MCInst TmpInst; local
7827 MCInst TmpInst; local
7854 MCInst TmpInst; local
7878 MCInst TmpInst; local
7904 MCInst TmpInst; local
7931 MCInst TmpInst; local
7953 MCInst TmpInst; local
7977 MCInst TmpInst; local
8002 MCInst TmpInst; local
8026 MCInst TmpInst; local
8052 MCInst TmpInst; local
8089 MCInst TmpInst; local
8116 MCInst TmpInst; local
8150 MCInst TmpInst; local
8192 MCInst TmpInst; local
8223 MCInst TmpInst; local
8237 MCInst TmpInst; local
8285 MCInst TmpInst; local
8303 MCInst TmpInst; local
8366 MCInst TmpInst; local
8396 MCInst TmpInst; local
8519 MCInst TmpInst; local
8541 MCInst TmpInst; local
8572 MCInst TmpInst; local
8590 MCInst TmpInst; local
8624 MCInst TmpInst; local
8688 MCInst TmpInst; local
8726 MCInst TmpInst; local
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUMCInstLower.cpp | 78 MCInst TmpInst; local
79 MCInstLowering.lower(MI, TmpInst);
80 OutStreamer.EmitInstruction(TmpInst);
|
| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1462 MCInst TmpInst; local
1463 TmpInst.setOpcode(opCode);
1464 TmpInst.addOperand(Rdd);
1465 TmpInst.addOperand(MO1);
1466 TmpInst.addOperand(MO2);
1468 return TmpInst;
1582 MCInst TmpInst; local
1585 TmpInst.setOpcode(Hexagon::C2_cmpeq);
1586 TmpInst.addOperand(Pd);
1587 TmpInst
1755 MCInst TmpInst; local
1841 MCInst TmpInst; local
1860 MCInst TmpInst; local
1879 MCInst TmpInst; local
1902 MCInst TmpInst; local
1935 MCInst TmpInst; local
1971 MCInst TmpInst; local
2052 MCInst TmpInst; local
2125 MCInst TmpInst; local
2149 MCInst TmpInst; local
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 131 MCInst TmpInst; local
132 TmpInst.setOpcode(Opcode);
133 TmpInst.addOperand(MCOperand::createReg(Reg0));
134 TmpInst.setLoc(IDLoc);
135 getStreamer().EmitInstruction(TmpInst, *STI);
140 MCInst TmpInst; local
141 TmpInst.setOpcode(Opcode);
142 TmpInst.addOperand(MCOperand::createReg(Reg0));
143 TmpInst.addOperand(Op1);
144 TmpInst
160 MCInst TmpInst; local
171 MCInst TmpInst; local
1016 MCInst TmpInst; local
[all...] |
| H A D | MipsMCCodeEmitter.cpp | 193 MCInst TmpInst = MI; local
204 LowerLargeShift(TmpInst);
208 LowerDins(TmpInst);
217 LowerCompactBranch(TmpInst);
221 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI);
226 unsigned Opcode = TmpInst.getOpcode();
250 TmpInst.setOpcode (NewOpcode);
251 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI);
255 const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode());
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCAsmPrinter.cpp | 479 MCInst TmpInst; local
539 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
542 TmpInst.setOpcode(PPC::LWZ);
549 const MCOperand TR = TmpInst.getOperand(1);
550 const MCOperand PICR = TmpInst.getOperand(0);
553 TmpInst.getOperand(1) =
555 TmpInst.getOperand(0) = TR;
556 TmpInst.getOperand(2) = PICR;
557 EmitToStreamer(*OutStreamer, TmpInst);
559 TmpInst
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| H A D | LanaiAsmPrinter.cpp | 177 MCInst TmpInst; local
178 MCInstLowering.Lower(MI, TmpInst);
179 TmpInst.setOpcode(Lanai::BT);
180 OutStreamer->EmitInstruction(TmpInst, STI);
194 MCInst TmpInst; local
195 MCInstLowering.Lower(MI, TmpInst);
196 OutStreamer->EmitInstruction(TmpInst, STI);
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430AsmPrinter.cpp | 153 MCInst TmpInst; local
154 MCInstLowering.Lower(MI, TmpInst);
155 EmitToStreamer(*OutStreamer, TmpInst);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| H A D | MSP430AsmPrinter.cpp | 159 MCInst TmpInst; local
160 MCInstLowering.Lower(MI, TmpInst);
161 OutStreamer.EmitInstruction(TmpInst);
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1425 MCInst TmpInst; local
1426 TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16);
1427 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg()));
1444 TmpInst.addOperand(MCOperand::createExpr(PCRelExpr));
1447 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL));
1448 TmpInst.addOperand(MCOperand::createReg(0));
1450 TmpInst.addOperand(MCOperand::createReg(0));
1451 EmitToStreamer(*OutStreamer, TmpInst);
1456 MCInst TmpInst; local
1457 TmpInst
1635 MCInst TmpInst; local
1653 MCInst TmpInst; local
1966 MCInst TmpInst; local
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| H A D | PPCAsmPrinter.cpp | 296 MCInst TmpInst; local
332 TmpInst.setOpcode(PPC::BL_Darwin); // Darwin vs SVR4 doesn't matter here.
337 TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::
339 OutStreamer.EmitInstruction(TmpInst);
347 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
351 TmpInst.setOpcode(PPC::LD);
363 TmpInst.getOperand(1) = MCOperand::CreateExpr(Exp);
364 OutStreamer.EmitInstruction(TmpInst);
373 TmpInst.setOpcode(PPC::MFCR);
374 TmpInst
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUMCInstLower.cpp | 140 MCInst TmpInst; local
141 MCInstLowering.lower(MI, TmpInst);
142 EmitToStreamer(*OutStreamer, TmpInst);
153 InstPrinter.printInst(&TmpInst, DisasmStream, StringRef(), STI);
162 InstEmitter.encodeInstruction(TmpInst, CodeStream, Fixups,
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.cpp | 492 MCInst TmpInst; local
493 TmpInst.setOpcode(AArch64::BR);
494 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg()));
495 EmitToStreamer(*OutStreamer, TmpInst);
501 MCInst TmpInst; local
502 TmpInst.setOpcode(AArch64::B);
503 TmpInst.addOperand(Dest);
504 EmitToStreamer(*OutStreamer, TmpInst);
575 MCInst TmpInst; local
576 MCInstLowering.Lower(MI, TmpInst);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 635 MCInst TmpInst; local
644 TmpInst.setOpcode(X86::CALLpcrel32);
647 TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::Create(PICBase,
649 OutStreamer.EmitInstruction(TmpInst);
655 TmpInst.setOpcode(X86::POP32r);
656 TmpInst.getOperand(0) = MCOperand::CreateReg(MI->getOperand(0).getReg());
657 OutStreamer.EmitInstruction(TmpInst);
687 MCInst TmpInst; local
688 TmpInst.setOpcode(X86::ADD32ri);
689 TmpInst
697 MCInst TmpInst; local
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| H A D | MBlazeAsmPrinter.cpp | 194 MCInst TmpInst; local
195 MCInstLowering.Lower(MI, TmpInst);
196 OutStreamer.EmitInstruction(TmpInst);
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 506 MCInst TmpInst; local
508 TmpInst.setLoc(IDLoc);
509 TmpInst.setOpcode(SP::SETHIi);
510 TmpInst.addOperand(MCRegOp);
511 TmpInst.addOperand(MCOperand::createExpr(Expr));
512 Instructions.push_back(TmpInst);
527 MCInst TmpInst; local
533 TmpInst.setLoc(IDLoc);
534 TmpInst.setOpcode(SP::ORri);
535 TmpInst
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyAsmPrinter.cpp | 257 MCInst TmpInst; local
258 MCInstLowering.Lower(MI, TmpInst);
259 EmitToStreamer(*OutStreamer, TmpInst);
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreAsmPrinter.cpp | 295 MCInst TmpInst; local
296 MCInstLowering.Lower(MI, TmpInst);
298 EmitToStreamer(*OutStreamer, TmpInst);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 4153 MCInst TmpInst; local
4154 TmpInst.setOpcode(ARM::LDR_POST_IMM);
4155 TmpInst.addOperand(Inst.getOperand(4)); // Rt
4156 TmpInst.addOperand(Inst.getOperand(0)); // Rn_wb
4157 TmpInst.addOperand(Inst.getOperand(1)); // Rn
4158 TmpInst.addOperand(MCOperand::CreateReg(0)); // am2offset
4159 TmpInst.addOperand(MCOperand::CreateImm(4));
4160 TmpInst.addOperand(Inst.getOperand(2)); // CondCode
4161 TmpInst.addOperand(Inst.getOperand(3));
4162 Inst = TmpInst;
4170 MCInst TmpInst; local
4265 MCInst TmpInst; local
4286 MCInst TmpInst; local
4316 MCInst TmpInst; local
[all...] |
| /external/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 100 MCInst TmpInst; local
102 if (decodeInstruction(Table, TmpInst, Inst, Address, this, STI)) {
103 MI = TmpInst;
|
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| H A D | PTXAsmPrinter.cpp | 284 MCInst TmpInst; local
285 LowerPTXMachineInstrToMCInst(MI, TmpInst, *this);
286 OutStreamer.EmitInstruction(TmpInst);
|