/external/valgrind/none/tests/x86/ |
H A D | insn_basic.def | 49 adcl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999] 50 adcl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000] 51 adcl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999] 52 adcl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000] 53 adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999] 54 adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000] 75 addl imm32[12345678] eax.ud[87654321] => 1.ud[99999999] 76 addl imm32[12345678] ebx.ud[87654321] => 1.ud[99999999] 77 addl imm32[12345678] m32.ud[87654321] => 1.ud[99999999] 95 andl imm32[ [all...] |
H A D | gen_insn_test.pl | 405 elsif ($arg =~ /^(imm8|imm16|imm32)\[([^\]]+)\]$/)
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/external/valgrind/VEX/priv/ |
H A D | host_x86_defs.c | 160 X86AMode* X86AMode_IR ( UInt imm32, HReg reg ) { argument 163 am->Xam.IR.imm = imm32; 167 X86AMode* X86AMode_IRRS ( UInt imm32, HReg base, HReg indEx, Int shift ) { argument 170 am->Xam.IRRS.imm = imm32; 242 X86RMI* X86RMI_Imm ( UInt imm32 ) { 245 op->Xrmi.Imm.imm32 = imm32; 264 vex_printf("$0x%x", op->Xrmi.Imm.imm32); 313 X86RI* X86RI_Imm ( UInt imm32 ) { 316 op->Xri.Imm.imm32 589 X86Instr_Test32( UInt imm32, X86RM* dst ) argument 3462 UInt imm32 = (UInt)(Addr)location_of_counter; local [all...] |
H A D | host_amd64_defs.c | 186 AMD64AMode* AMD64AMode_IR ( UInt imm32, HReg reg ) { argument 189 am->Aam.IR.imm = imm32; 193 AMD64AMode* AMD64AMode_IRRS ( UInt imm32, HReg base, HReg indEx, Int shift ) { argument 196 am->Aam.IRRS.imm = imm32; 256 AMD64RMI* AMD64RMI_Imm ( UInt imm32 ) { 259 op->Armi.Imm.imm32 = imm32; 278 vex_printf("$0x%x", op->Armi.Imm.imm32); 336 AMD64RI* AMD64RI_Imm ( UInt imm32 ) { 339 op->Ari.Imm.imm32 621 AMD64Instr_Test64( UInt imm32, HReg dst ) argument [all...] |
H A D | host_amd64_defs.h | 172 UInt imm32; member in struct:__anon22038::__anon22039::__anon22040 207 UInt imm32; member in struct:__anon22044::__anon22045::__anon22046 437 UInt imm32; member in struct:__anon22059::__anon22060::__anon22065 729 extern AMD64Instr* AMD64Instr_Test64 ( UInt imm32, HReg dst );
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H A D | host_x86_defs.h | 165 UInt imm32; member in struct:__anon22586::__anon22587::__anon22588 199 UInt imm32; member in struct:__anon22592::__anon22593::__anon22594 349 Xin_Test32, /* 32-bit test of REG or MEM against imm32 (AND, set 417 UInt imm32; member in struct:__anon22607::__anon22608::__anon22612 666 extern X86Instr* X86Instr_Test32 ( UInt imm32, X86RM* dst );
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H A D | host_arm_defs.c | 1129 ARMInstr* ARMInstr_Imm32 ( HReg dst, UInt imm32 ) { 1133 i->ARMin.Imm32.imm32 = imm32; 1504 ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 ) { 1508 if (fitsIn8x4(&u8, &u4, imm32)) { 1518 i->ARMin.Add32.imm32 = imm32; 1579 vex_printf(", 0x%x", i->ARMin.Imm32.imm32); 1976 vex_printf("%u", i->ARMin.Add32.imm32); 2799 static UInt* imm32_to_ireg ( UInt* p, Int rD, UInt imm32 ) 4596 UInt imm32 = i->ARMin.Add32.imm32; local [all...] |
H A D | host_arm_defs.h | 665 UInt imm32; member in struct:__anon22250::__anon22251::__anon22257 945 UInt imm32; member in struct:__anon22250::__anon22251::__anon22297 1017 extern ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 );
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H A D | guest_arm_toIR.c | 18472 UInt imm32 = (INSN0(9,9) << 6) | (INSN0(7,3) << 1); local 18483 UInt dst = (guest_R15_curr_instr_notENC + 4 + imm32) | 1; 19394 UInt imm32 = thumbExpandImm_from_I0_I1(NULL, insn0, insn1); local 19396 assign(argR, mkU32(imm32)); 19402 bS == 1 ? "s" : "", rD, rN, imm32); 19443 UInt imm32 = thumbExpandImm_from_I0_I1(NULL, insn0, insn1); local 19445 assign(argR, mkU32(imm32)); 19448 DIP("%s.w r%u, #%u\n", isCMN ? "cmn" : "cmp", rN, imm32); 19469 UInt imm32 = thumbExpandImm_from_I0_I1(&updC, insn0, insn1); local 19471 assign(argR, mkU32(imm32)); 19503 UInt imm32 = thumbExpandImm_from_I0_I1(NULL, insn0, insn1); local 19562 UInt imm32 = thumbExpandImm_from_I0_I1(NULL, insn0, insn1); local 19631 UInt imm32 = thumbExpandImm_from_I0_I1(&updC, insn0, insn1); local 20031 UInt imm32 = thumbExpandImm_from_I0_I1(&updC, insn0, insn1); local 21028 UInt imm32 = (INSN0(10,10) << 11) local 21160 UInt imm32 = (INSN0(10,10) << 11) local [all...] |
/external/v8/src/x87/ |
H A D | assembler-x87.cc | 321 void Assembler::push_imm32(int32_t imm32) { argument 324 emit(imm32); 437 void Assembler::mov(Register dst, int32_t imm32) { argument 440 emit(imm32); 610 void Assembler::adc(Register dst, int32_t imm32) { argument 612 emit_arith(2, Operand(dst), Immediate(imm32)); 644 void Assembler::and_(Register dst, int32_t imm32) { argument 645 and_(dst, Immediate(imm32)); 726 void Assembler::cmp(Register reg, int32_t imm32) { argument 728 emit_arith(7, Operand(reg), Immediate(imm32)); 840 imul(Register dst, Register src, int32_t imm32) argument 845 imul(Register dst, const Operand& src, int32_t imm32) argument 914 or_(Register dst, int32_t imm32) argument 1219 xor_(Register dst, int32_t imm32) argument 1364 int imm32 = pos - (fixup_pos + sizeof(int32_t)); local [all...] |
H A D | assembler-x87.h | 540 static const int kPatchDebugBreakSlotAddressOffset = 1; // JMP imm32. 596 void push_imm32(int32_t imm32); 620 void mov(Register dst, int32_t imm32); 664 void adc(Register dst, int32_t imm32); 673 void and_(Register dst, int32_t imm32); 692 void cmp(Register reg, int32_t imm32); 718 void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32. 719 void imul(Register dst, const Operand& src, int32_t imm32); 735 void or_(Register dst, int32_t imm32); [all...] |
/external/v8/src/ia32/ |
H A D | assembler-ia32.cc | 459 void Assembler::push_imm32(int32_t imm32) { argument 462 emit(imm32); 557 void Assembler::mov(Register dst, int32_t imm32) { argument 560 emit(imm32); 739 void Assembler::adc(Register dst, int32_t imm32) { argument 741 emit_arith(2, Operand(dst), Immediate(imm32)); 773 void Assembler::and_(Register dst, int32_t imm32) { argument 774 and_(dst, Immediate(imm32)); 855 void Assembler::cmp(Register reg, int32_t imm32) { argument 857 emit_arith(7, Operand(reg), Immediate(imm32)); 969 imul(Register dst, Register src, int32_t imm32) argument 974 imul(Register dst, const Operand& src, int32_t imm32) argument 1043 or_(Register dst, int32_t imm32) argument 1348 xor_(Register dst, int32_t imm32) argument 1493 int imm32 = pos - (fixup_pos + sizeof(int32_t)); local [all...] |
H A D | assembler-ia32.h | 542 static const int kPatchDebugBreakSlotAddressOffset = 1; // JMP imm32. 598 void push_imm32(int32_t imm32); 621 void mov(Register dst, int32_t imm32); 671 void adc(Register dst, int32_t imm32); 680 void and_(Register dst, int32_t imm32); 699 void cmp(Register reg, int32_t imm32); 725 void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32. 726 void imul(Register dst, const Operand& src, int32_t imm32); 742 void or_(Register dst, int32_t imm32); [all...] |
/external/vixl/src/aarch32/ |
H A D | macro-assembler-aarch32.cc | 1564 static inline bool CanBeInverted(uint32_t imm32) { argument 1567 if ((imm32 & 0xffffff00) == 0xffffff00) { 1571 if (((imm32 & 0xff) == 0) || ((imm32 & 0xff) == 0xff)) { 1572 fill8 = imm32 & 0xff; 1573 imm32 >>= 8; 1574 if ((imm32 >> 8) == 0xffff) { 1579 if ((imm32 & 0xff) == fill8) { 1580 imm32 >>= 8; 1581 if ((imm32 >> [all...] |
/external/v8/src/arm/ |
H A D | assembler-arm.cc | 1116 static bool fits_shifter(uint32_t imm32, argument 1120 // imm32 must be unsigned. 1122 uint32_t imm8 = base::bits::RotateLeft32(imm32, 2 * rot); 1133 if (fits_shifter(~imm32, rotate_imm, immed_8, NULL)) { 1138 if (imm32 < 0x10000) { 1140 *instr |= Assembler::EncodeMovwImmediate(imm32); 1147 if (fits_shifter(-static_cast<int>(imm32), rotate_imm, immed_8, NULL)) { 1155 if (fits_shifter(-static_cast<int>(imm32), rotate_imm, immed_8, NULL)) { 1161 if (fits_shifter(~imm32, rotate_imm, immed_8, NULL)) { 1243 uint32_t imm32 local [all...] |
H A D | assembler-arm.h | 1375 static bool ImmediateFitsAddrMode1Instruction(int32_t imm32); 1378 bool ImmediateFitsAddrMode2Instruction(int32_t imm32);
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/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.c | 1396 uint32_t imm32; local 1423 if (consumeUInt32(insn, &imm32)) 1425 insn->immediates[insn->numImmediatesConsumed] = imm32;
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/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.cpp | 1640 uint32_t imm32; local 1668 if (consumeUInt32(insn, &imm32)) 1670 insn->immediates[insn->numImmediatesConsumed] = imm32;
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/external/v8/src/s390/ |
H A D | assembler-s390.cc | 368 int32_t imm32 = local 371 imm32 <<= 1; // BR* + LARL treat immediate in # of halfwords 372 if (imm32 == 0) return kEndOfChain; 373 return pos + imm32; 399 int32_t imm32 = target_pos - pos; local 401 instr_at_put<SixByteInstr>(pos, instr | (imm32 >> 1)); 407 int32_t imm32 = target_pos + (Code::kHeaderSize - kHeapObjectTag); local 409 instr_at_put<SixByteInstr>(pos, instr | imm32);
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/external/v8/src/mips/ |
H A D | assembler-mips.cc | 3142 uint32_t imm32; local 3143 imm32 = jump_address(&after_pool); 3145 UnpackTargetAddressUnsigned(imm32, lui_offset, jic_offset); 3159 uint32_t imm32; local 3160 imm32 = jump_address(&after_pool); 3167 lui(at, (imm32 & kHiMask) >> kLuiShift); 3168 ori(at, at, (imm32 & kImm16Mask));
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H A D | macro-assembler-mips.cc | 3876 uint32_t imm32; local 3877 imm32 = jump_address(L); 3880 UnpackTargetAddressUnsigned(imm32, lui_offset, jic_offset); 3899 lui(at, (imm32 & kHiMask) >> kLuiShift); 3900 ori(at, at, (imm32 & kImm16Mask)); 3917 uint32_t imm32; local 3918 imm32 = jump_address(L); 3921 UnpackTargetAddressUnsigned(imm32, lui_offset, jic_offset); 3940 lui(at, (imm32 & kHiMask) >> kLuiShift); 3941 ori(at, at, (imm32 [all...] |
/external/valgrind/none/tests/amd64/ |
H A D | gen_insn_test.pl | 428 elsif ($arg =~ /^(imm8|imm16|imm32|imm64)\[([^\]]+)\]$/)
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/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 2268 // and build the imm32 with one trailing zero as documented: 2269 // imm32 = SignExtend(S:I1:I2:imm10:imm11:'0', 32); 2278 int imm32 = SignExtend32<25>(tmp << 1); local 2279 if (!tryAddingSymbolicOperand(Address, Address + imm32 + 4, 2281 Inst.addOperand(MCOperand::createImm(imm32)); 3951 // and build the imm32 with two trailing zeros as documented: 3952 // imm32 = SignExtend(S:I1:I2:imm10H:imm10L:'00', 32); 3959 int imm32 = SignExtend32<25>(tmp << 1); local 3962 (Address & ~2u) + imm32 + 4, 3964 Inst.addOperand(MCOperand::createImm(imm32)); 4097 int imm32 = SignExtend32<25>(tmp << 1); local [all...] |
/external/mesa3d/src/gallium/auxiliary/rtasm/ |
H A D | rtasm_x86sse.c | 584 int imm32 ) 586 DUMP_I( imm32 ); 588 emit_1i(p, imm32);
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/external/v8/src/x64/ |
H A D | assembler-x64.cc | 354 int imm32 = pos - (current + sizeof(int32_t)); local 355 long_at_put(current, imm32); 368 int imm32 = pos - (current + sizeof(int32_t)); local 369 long_at_put(current, imm32); 1910 void Assembler::pushq_imm32(int32_t imm32) { argument 1913 emitl(imm32);
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