| /external/llvm/test/MC/ARM/ |
| H A D | thumbv8m.s | 69 // CHECK: ldrexh r1, [r2] @ encoding: [0xd2,0xe8,0x5f,0x1f]
70 ldrexh r1, [r2] label
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| H A D | basic-arm-instructions.s | 1194 ldrexh r2, [r5]
1199 @ CHECK: ldrexh r2, [r5] @ encoding: [0x9f,0x2f,0xf5,0xe1]
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| H A D | basic-thumb2-instructions.s | 1057 ldrexh r9, [r12]
1064 @ CHECK: ldrexh r9, [r12] @ encoding: [0xdc,0xe8,0x5f,0x9f]
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| /external/v8/src/arm/ |
| H A D | disasm-arm.cc | 772 Format(instr, "ldrexh'cond 'rt, ['rn]");
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| H A D | assembler-arm.h | 1007 void ldrexh(Register dst, Register src, Condition cond = al);
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| H A D | assembler-arm.cc | 2183 void Assembler::ldrexh(Register dst, Register src, Condition cond) { function in class:v8::internal::Assembler
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| /external/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 2414 void ldrexh(Condition cond, Register rt, const MemOperand& operand);
2415 void ldrexh(Register rt, const MemOperand& operand) { function in class:vixl::aarch32::Assembler
2416 ldrexh(al, rt, operand);
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| H A D | disasm-aarch32.h | 731 void ldrexh(Condition cond, Register rt, const MemOperand& operand);
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| H A D | assembler-aarch32.cc | 5398 void Assembler::ldrexh(Condition cond, Register rt, const MemOperand& operand) { function in class:vixl::aarch32::Assembler
5420 Delegate(kLdrexh, &Assembler::ldrexh, cond, rt, operand);
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| H A D | macro-assembler-aarch32.h | 2240 ldrexh(cond, rt, operand);
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| H A D | disasm-aarch32.cc | 1773 void Disassembler::ldrexh(Condition cond, function in class:vixl::aarch32::Disassembler
10450 ldrexh(CurrentCond(),
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 764 ldrexh r2, [r5]
769 @ CHECK: ldrexh r2, [r5] @ encoding: [0x9f,0x2f,0xf5,0xe1]
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| H A D | basic-thumb2-instructions.s | 754 ldrexh r9, [r12]
761 @ CHECK: ldrexh r9, [r12] @ encoding: [0xdc,0xe8,0x5f,0x9f]
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