| /external/compiler-rt/lib/builtins/arm/ |
| H A D | clzsi2.S | 51 lsrs r2, r0, shift; \
|
| H A D | clzdi2.S | 72 lsrs r2, r0, shift; \
|
| /external/llvm/test/MC/ARM/ |
| H A D | basic-thumb-instructions.s | 377 lsrs r1, r3, #1
378 lsrs r1, r3, #32
379 lsrs r4, #20
380 lsrs r4, r4, #20
381 lsrs r2, r4, #20
383 @ CHECK: lsrs r1, r3, #1 @ encoding: [0x59,0x08]
384 @ CHECK: lsrs r1, r3, #32 @ encoding: [0x19,0x08]
385 @ CHECK: lsrs r4, r4, #20 @ encoding: [0x24,0x0d]
386 @ CHECK: lsrs r4, r4, #20 @ encoding: [0x24,0x0d]
387 @ CHECK: lsrs r
[all...] |
| H A D | thumb_rewrites.s | 74 lsrs r0, r0, r1
75 @ CHECK: lsrs r0, r1 @ encoding: [0xc8,0x40]
|
| H A D | basic-thumb2-instructions.s | 1340 lsrs r8, r3, #32
1341 lsrs.w r2, r3, #1
1343 lsrs r2, r12, #15
1346 lsrs r8, #2
1347 lsrs.w r7, #5
1351 @ CHECK: lsrs.w r8, r3, #32 @ encoding: [0x5f,0xea,0x13,0x08]
1352 @ CHECK: lsrs.w r2, r3, #1 @ encoding: [0x5f,0xea,0x53,0x02]
1354 @ CHECK: lsrs.w r2, r12, #15 @ encoding: [0x5f,0xea,0xdc,0x32]
1357 @ CHECK: lsrs.w r8, r8, #2 @ encoding: [0x5f,0xea,0x98,0x08]
1358 @ CHECK: lsrs
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | basic-thumb-instructions.s | 334 lsrs r1, r3, #1
335 lsrs r1, r3, #32
337 @ CHECK: lsrs r1, r3, #1 @ encoding: [0x59,0x08]
338 @ CHECK: lsrs r1, r3, #32 @ encoding: [0x19,0x08]
344 lsrs r2, r6
346 @ CHECK: lsrs r2, r6 @ encoding: [0xf2,0x40]
|
| H A D | basic-thumb2-instructions.s | 1031 lsrs r8, r3, #32
1032 lsrs.w r2, r3, #1
1034 lsrs r2, r12, #15
1037 lsrs r8, #2
1038 lsrs.w r7, #5
1042 @ CHECK: lsrs.w r8, r3, #32 @ encoding: [0x5f,0xea,0x13,0x08]
1043 @ CHECK: lsrs.w r2, r3, #1 @ encoding: [0x5f,0xea,0x53,0x02]
1045 @ CHECK: lsrs.w r2, r12, #15 @ encoding: [0x5f,0xea,0xdc,0x32]
1048 @ CHECK: lsrs.w r8, r8, #2 @ encoding: [0x5f,0xea,0x98,0x08]
1049 @ CHECK: lsrs
[all...] |
| /external/valgrind/none/tests/arm/ |
| H A D | v6intARM.stdout.exp | 123 lsrs r0, r1, r2 :: rd 0xffffffff rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x80000000 N
124 lsrs r0, r1, r2 :: rd 0x7fffffff rm 0xffffffff, rn 0x00000001, carryin 0, cpsr 0x20000000 C
125 lsrs r0, r1, r2 :: rd 0x3fffffff rm 0xffffffff, rn 0x00000002, carryin 0, cpsr 0x20000000 C
126 lsrs r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0x0000001f, carryin 0, cpsr 0x20000000 C
127 lsrs r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000020, carryin 0, cpsr 0x60000000 ZC
128 lsrs r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000021, carryin 0, cpsr 0x40000000 Z
129 lsrs r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x0000003f, carryin 0, cpsr 0x40000000 Z
130 lsrs r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000040, carryin 0, cpsr 0x40000000 Z
131 lsrs r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x000000ff, carryin 0, cpsr 0x40000000 Z
132 lsrs r
[all...] |
| H A D | v6intThumb.stdout.exp | 413 lsrs r1, r2 :: rd 0x31415927 rm 0x00000000, c:v-in 0, cpsr 0x00000000
414 lsrs r1, r2 :: rd 0x18a0ac93 rm 0x00000001, c:v-in 0, cpsr 0x20000000 C
415 lsrs r1, r2 :: rd 0x0c505649 rm 0x00000002, c:v-in 0, cpsr 0x20000000 C
416 lsrs r1, r2 :: rd 0x00006282 rm 0x0000000f, c:v-in 0, cpsr 0x20000000 C
417 lsrs r1, r2 :: rd 0x00003141 rm 0x00000010, c:v-in 0, cpsr 0x00000000
418 lsrs r1, r2 :: rd 0x00000000 rm 0x0000001f, c:v-in 0, cpsr 0x40000000 Z
419 lsrs r1, r2 :: rd 0x00000000 rm 0x00000020, c:v-in 0, cpsr 0x40000000 Z
420 lsrs r1, r2 :: rd 0x00000000 rm 0x00000021, c:v-in 0, cpsr 0x40000000 Z
421 lsrs r1, r2 :: rd 0x31415927 rm 0x00000000, c:v-in 1, cpsr 0x10000000 V
422 lsrs r
[all...] |
| /external/valgrind/exp-bbv/tests/arm-linux/ |
| H A D | ll.S | 65 lsrs r5,#1 @ shift bottom bit into carry flag
336 lsrs r3,r2,#1 @ divide by 2
|
| /external/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 2524 void lsrs(Condition cond,
2529 void lsrs(Register rd, Register rm, const Operand& operand) { function in class:vixl::aarch32::Assembler
2530 lsrs(al, Best, rd, rm, operand);
2532 void lsrs(Condition cond, Register rd, Register rm, const Operand& operand) { function in class:vixl::aarch32::Assembler
2533 lsrs(cond, Best, rd, rm, operand);
2535 void lsrs(EncodingSize size, function in class:vixl::aarch32::Assembler
2539 lsrs(al, size, rd, rm, operand);
|
| H A D | disasm-aarch32.h | 772 void lsrs(Condition cond,
|
| H A D | disasm-aarch32.cc | 1871 void Disassembler::lsrs(Condition cond, function in class:vixl::aarch32::Disassembler
7200 lsrs(Condition::None(), Best, Register(rd), Register(rm), amount);
7411 lsrs(Condition::None(),
18881 lsrs(Condition::None(),
18891 lsrs(CurrentCond(),
20804 lsrs(Condition::None(),
20811 lsrs(CurrentCond(),
[all...] |
| H A D | assembler-aarch32.cc | 6273 void Assembler::lsrs(Condition cond, function in class:vixl::aarch32::Assembler
6336 Delegate(kLsrs, &Assembler::lsrs, cond, size, rd, rm, operand);
|
| H A D | macro-assembler-aarch32.h | 2433 lsrs(cond, rd, rm, operand);
|
| /external/vixl/test/aarch32/ |
| H A D | test-assembler-cond-rd-rn-operand-rm-a32.cc | 83 M(lsrs) \
663 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-a32-lsrs.h"
|
| H A D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 83 M(lsrs) \
663 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-t32-lsrs.h"
|
| /external/libjpeg-turbo/simd/ |
| H A D | jsimd_arm_neon.S | 2780 lsrs r1, r1, #0x1
|