/external/llvm/test/MC/ARM/ |
H A D | mul-v4.s | 6 @ ARMV4: muls r0, r1, r2 @ encoding: [0x91,0x02,0x10,0xe0] 10 muls r0, r1, r2 label
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H A D | basic-thumb-instructions.s | 423 muls r1, r2, r1 424 muls r2, r2, r3 425 muls r3, r4 427 @ CHECK: muls r1, r2, r1 @ encoding: [0x51,0x43] 428 @ CHECK: muls r2, r3, r2 @ encoding: [0x5a,0x43] 429 @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43]
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H A D | thumb-diagnostics.s | 164 muls r1, r2, r3 166 @ CHECK-ERRORS: muls r1, r2, r3
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H A D | basic-arm-instructions.s | 1505 muls r5, r6, r7 1511 @ CHECK: muls r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xe0]
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H A D | basic-thumb2-instructions.s | 1595 muls r3, r4, r3 1604 @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | thumb-diagnostics.s | 92 muls r1, r2, r3 94 @ CHECK-ERRORS: muls r1, r2, r3
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H A D | basic-thumb-instructions.s | 374 muls r1, r2, r1 375 muls r3, r4 377 @ CHECK: muls r1, r2, r1 @ encoding: [0x51,0x43] 378 @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43]
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H A D | basic-arm-instructions.s | 975 muls r5, r6, r7 980 @ CHECK: muls r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xe0]
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H A D | basic-thumb2-instructions.s | 1210 muls r3, r4, r3 1216 @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43]
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/external/vixl/test/aarch32/ |
H A D | test-assembler-cond-rdlow-rnlow-rmlow-t32.cc | 51 #define FOREACH_INSTRUCTION(M) M(muls) 162 #include "aarch32/traces/assembler-cond-rdlow-rnlow-rmlow-t32-muls.h"
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H A D | test-assembler-cond-rd-rn-rm-a32.cc | 53 M(muls) \ 457 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-muls.h"
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/external/valgrind/none/tests/arm/ |
H A D | v6intARM.stdout.exp | 502 muls r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x40000000 Z 503 muls r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x40000000 Z 504 muls r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x40000000 Z 505 muls r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 506 muls r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 507 muls r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x80000000 N
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H A D | v6intThumb.stdout.exp | 228 muls r1, r2 :: rd 0xdde06f18 rm 0x27181728, c:v-in 0, cpsr 0x80000000 N 229 muls r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z 230 muls r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z 231 muls r1, r2 :: rd 0x00000000 rm 0x00000001, c:v-in 0, cpsr 0x40000000 Z 232 muls r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z 233 muls r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x40000000 Z 234 muls r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x40000000 Z 235 muls r1, r2 :: rd 0xdde06f18 rm 0x27181728, c:v-in 1, cpsr 0x90000000 N V 236 muls r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x50000000 Z V 237 muls r [all...] |
/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.h | 2609 void muls(Condition cond, Register rd, Register rn, Register rm); 2610 void muls(Register rd, Register rn, Register rm) { muls(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
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H A D | disasm-aarch32.h | 807 void muls(Condition cond, Register rd, Register rn, Register rm);
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H A D | assembler-aarch32.cc | 6838 void Assembler::muls(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler 6856 Delegate(kMuls, &Assembler::muls, cond, rd, rn, rm);
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H A D | macro-assembler-aarch32.h | 2679 muls(cond, rd, rn, rm);
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H A D | disasm-aarch32.cc | 1957 void Disassembler::muls(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Disassembler 7667 muls(Condition::None(), [all...] |