| /external/valgrind/none/tests/arm/ |
| H A D | v6intThumb.stdout.exp | 2040 orns.w r1, r2, #0xffffffff :: rd 0x31415927 rm 0x31415927, c:v-in 0, cpsr 0x00000000
2041 orns.w r1, r2, #0xee00ee00 :: rd 0x31ff59ff rm 0x31415927, c:v-in 0, cpsr 0x00000000
2042 orns.w r1, r2, #255 :: rd 0xffffff00 rm 0x00000000, c:v-in 0, cpsr 0x80000000 N
2043 orns.w r1, r2, #0 :: rd 0xffffffff rm 0x00000001, c:v-in 0, cpsr 0x80000000 N
2044 orns.w r1, r2, #1 :: rd 0xfffffffe rm 0x00000000, c:v-in 0, cpsr 0x80000000 N
2045 orns.w r1, r2, #0 :: rd 0xffffffff rm 0xffffffff, c:v-in 0, cpsr 0x80000000 N
2046 orns.w r1, r2, #-1 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z
2047 orns.w r1, r2, #0x80000000 :: rd 0x7fffffff rm 0x00000000, c:v-in 0, cpsr 0x20000000 C
2048 orns.w r1, r2, #0 :: rd 0xffffffff rm 0x80000000, c:v-in 0, cpsr 0x80000000 N
2049 orns
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | basic-thumb2-instructions.s | 1279 orns r4, r5, r6
1281 orns r4, r5, r6, lsr #5
1283 orns r4, r5, r6, asr #5
1288 @ CHECK: orns r4, r5, r6 @ encoding: [0x75,0xea,0x06,0x04]
1290 @ CHECK: orns r4, r5, r6, lsr #5 @ encoding: [0x75,0xea,0x56,0x14]
1292 @ CHECK: orns r4, r5, r6, asr #5 @ encoding: [0x75,0xea,0x66,0x14]
|
| /external/llvm/test/MC/ARM/ |
| H A D | basic-thumb2-instructions.s | 1680 orns r4, r5, r6
1682 orns r4, r5, r6, lsr #5
1684 orns r4, r5, r6, asr #5
1689 @ CHECK: orns r4, r5, r6 @ encoding: [0x75,0xea,0x06,0x04]
1691 @ CHECK: orns r4, r5, r6, lsr #5 @ encoding: [0x75,0xea,0x56,0x14]
1693 @ CHECK: orns r4, r5, r6, asr #5 @ encoding: [0x75,0xea,0x66,0x14]
|
| /external/vixl/test/aarch32/ |
| H A D | test-assembler-cond-rd-rn-operand-const-t32.cc | 63 M(orns) \
2628 #include "aarch32/traces/assembler-cond-rd-rn-operand-const-t32-orns.h"
|
| H A D | test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 63 M(orns) \
2630 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32-orns.h"
|
| H A D | test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 63 M(orns) \
2630 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-orns.h"
|
| H A D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 63 M(orns) \
643 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-t32-orns.h"
|
| /external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.cc | 1356 orns(cond, rd, rn, ~imm);
|
| H A D | assembler-aarch32.h | 2648 void orns(Condition cond, Register rd, Register rn, const Operand& operand);
2649 void orns(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
2650 orns(al, rd, rn, operand);
|
| H A D | disasm-aarch32.h | 823 void orns(Condition cond, Register rd, Register rn, const Operand& operand);
|
| H A D | assembler-aarch32.cc | 7085 void Assembler::orns(Condition cond, function in class:vixl::aarch32::Assembler
7122 Delegate(kOrns, &Assembler::orns, cond, rd, rn, operand);
|
| H A D | disasm-aarch32.cc | 1999 void Disassembler::orns(Condition cond, function in class:vixl::aarch32::Disassembler
8666 orns(CurrentCond(), Register(rd), Register(rn), imm);
19106 orns(CurrentCond(),
19129 orns(CurrentCond(),
[all...] |
| H A D | macro-assembler-aarch32.h | 2799 orns(cond, rd, rn, operand);
|