Searched refs:orrs (Results 1 - 24 of 24) sorted by relevance

/external/compiler-rt/lib/builtins/arm/
H A Dcomparesf2.S55 orrs r12, r2, r3, lsr #1
76 // still clear from the shift argument in orrs; if a is positive and b
116 orrs r12, r2, r3, lsr #1
/external/llvm/test/MC/ARM/
H A Dthumb_rewrites.s92 orrs r0, r0, r1
93 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
95 orrs r0, r1, r0
96 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
H A Dbasic-thumb-instructions.s450 orrs r3, r4
452 @ CHECK-ERRORS: orrs r3, r4 @ encoding: [0x23,0x43]
H A Dbasic-thumb2-instructions.s1703 orrs r4, r5, r6, lsr #5
1705 orrs r4, r5, r6, asr #5
1711 @ CHECK: orrs.w r4, r5, r6, lsr #5 @ encoding: [0x55,0xea,0x56,0x14]
1713 @ CHECK: orrs.w r4, r5, r6, asr #5 @ encoding: [0x55,0xea,0x66,0x14]
/external/valgrind/none/tests/arm/
H A Dv6intThumb.stdout.exp141 orrs r1, r2 :: rd 0x37595f2f rm 0x27181728, c:v-in 0, cpsr 0x00000000
142 orrs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z
143 orrs r1, r2 :: rd 0x00000001 rm 0x00000000, c:v-in 0, cpsr 0x00000000
144 orrs r1, r2 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0x00000000
145 orrs r1, r2 :: rd 0x80000000 rm 0x00000000, c:v-in 0, cpsr 0x80000000 N
146 orrs r1, r2 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0x80000000 N
147 orrs r1, r2 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0x80000000 N
148 orrs r1, r2 :: rd 0x37595f2f rm 0x27181728, c:v-in 1, cpsr 0x10000000 V
149 orrs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x50000000 Z V
150 orrs r
[all...]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dbasic-thumb-instructions.s399 orrs r3, r4
401 @ CHECK-ERRORS: orrs r3, r4 @ encoding: [0x23,0x43]
H A Dbasic-thumb2-instructions.s1302 orrs r4, r5, r6, lsr #5
1304 orrs r4, r5, r6, asr #5
1310 @ CHECK: orrs.w r4, r5, r6, lsr #5 @ encoding: [0x55,0xea,0x56,0x14]
1312 @ CHECK: orrs.w r4, r5, r6, asr #5 @ encoding: [0x55,0xea,0x66,0x14]
/external/libvpx/libvpx/vpx_dsp/arm/
H A Dloopfilter_16_neon.asm449 orrs r5, r5, r6 ; Check for 0
502 orrs r5, r5, r6 ; Check for 0
/external/vixl/src/aarch32/
H A Dmacro-assembler-aarch32.cc1194 orrs(cond, rd, rn, ~imm);
1223 orrs(cond, rd, rn, scratch);
H A Dassembler-aarch32.h2671 void orrs(Condition cond,
2676 void orrs(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
2677 orrs(al, Best, rd, rn, operand);
2679 void orrs(Condition cond, Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
2680 orrs(cond, Best, rd, rn, operand);
2682 void orrs(EncodingSize size, function in class:vixl::aarch32::Assembler
2686 orrs(al, size, rd, rn, operand);
H A Ddisasm-aarch32.h831 void orrs(Condition cond,
H A Ddisasm-aarch32.cc2026 void Disassembler::orrs(Condition cond, function in class:vixl::aarch32::Disassembler
7645 orrs(Condition::None(),
8602 orrs(CurrentCond(),
18970 orrs(CurrentCond(),
19001 orrs(Condition::None(),
19012 orrs(CurrentCond(),
[all...]
H A Dassembler-aarch32.cc7209 void Assembler::orrs(Condition cond, function in class:vixl::aarch32::Assembler
7290 Delegate(kOrrs, &Assembler::orrs, cond, size, rd, rn, operand);
H A Dmacro-assembler-aarch32.h2879 orrs(cond, rd, rn, operand);
/external/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-rn-operand-const-a32.cc63 M(orrs) \
2628 #include "aarch32/traces/assembler-cond-rd-rn-operand-const-a32-orrs.h"
H A Dtest-assembler-cond-rd-rn-operand-const-t32.cc65 M(orrs) \
2630 #include "aarch32/traces/assembler-cond-rd-rn-operand-const-t32-orrs.h"
H A Dtest-assembler-cond-rd-rn-operand-rm-a32.cc63 M(orrs) \
643 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-a32-orrs.h"
H A Dtest-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc63 M(orrs) \
2630 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to31-a32-orrs.h"
H A Dtest-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc65 M(orrs) \
2632 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32-orrs.h"
H A Dtest-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc63 M(orrs) \
2630 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-a32-orrs.h"
H A Dtest-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc65 M(orrs) \
2632 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-orrs.h"
H A Dtest-assembler-cond-rd-rn-operand-rm-t32.cc65 M(orrs) \
645 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-t32-orrs.h"
H A Dtest-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc63 M(orrs) \
5130 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-rs-a32-orrs.h"
/external/libjpeg-turbo/simd/
H A Djsimd_arm_neon.S323 orrs r0, r0, r5

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