Searched refs:qadd16 (Results 1 - 13 of 13) sorted by relevance

/external/llvm/test/MC/ARM/
H A Dthumbv8m.s25 qadd16 r0, r0, r0 label
H A Dbasic-arm-instructions.s1789 qadd16 r1, r2, r3
1796 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6]
H A Dbasic-thumb2-instructions.s1855 qadd16 r1, r2, r3
1863 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x13,0xf1]
/external/valgrind/none/tests/arm/
H A Dv6media.stdout.exp1157 qadd16 r0, r1, r2 :: rd 0x00210002 rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1158 qadd16 r0, r1, r2 :: rd 0x00210002 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1159 qadd16 r0, r1, r2 :: rd 0x00020021 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1160 qadd16 r0, r1, r2 :: rd 0x00020021 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1161 qadd16 r0, r1, r2 :: rd 0xa299daa0 rm 0xd83b849b, rn 0xca5e5605, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1162 qadd16 r0, r1, r2 :: rd 0x5d604bd2 rm 0x0cdafabe, rn 0x50865114, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1163 qadd16 r0, r1, r2 :: rd 0x7fff8000 rm 0x2738f0ff, rn 0x6a228b19, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1164 qadd16 r0, r1, r2 :: rd 0x24418000 rm 0xfaceab39, rn 0x2973c051, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1165 qadd16 r0, r1, r2 :: rd 0xf96272fb rm 0xa3e6f759, rn 0x557c7ba2, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1166 qadd16 r
[all...]
/external/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-rn-rm-a32.cc54 M(qadd16) \
458 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-qadd16.h"
H A Dtest-assembler-cond-rd-rn-rm-t32.cc53 M(qadd16) \
456 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-qadd16.h"
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h2745 void qadd16(Condition cond, Register rd, Register rn, Register rm);
2746 void qadd16(Register rd, Register rn, Register rm) { qadd16(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
H A Ddisasm-aarch32.h861 void qadd16(Condition cond, Register rd, Register rn, Register rm);
H A Dassembler-aarch32.cc7867 void Assembler::qadd16(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
7884 Delegate(kQadd16, &Assembler::qadd16, cond, rd, rn, rm);
H A Dmacro-assembler-aarch32.h3021 qadd16(cond, rd, rn, rm);
H A Ddisasm-aarch32.cc2134 void Disassembler::qadd16(Condition cond, function in class:vixl::aarch32::Disassembler
21448 qadd16(CurrentCond(),
[all...]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dbasic-arm-instructions.s1182 qadd16 r1, r2, r3
1189 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6]
H A Dbasic-thumb2-instructions.s1428 qadd16 r1, r2, r3
1436 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x13,0xf1]

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