Searched refs:qsub16 (Results 1 - 12 of 12) sorted by relevance

/external/valgrind/none/tests/arm/
H A Dv6media.stdout.exp1267 qsub16 r0, r1, r2 :: rd 0xfff1fffc rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1268 qsub16 r0, r1, r2 :: rd 0x000f0004 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1269 qsub16 r0, r1, r2 :: rd 0x0004000f rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1270 qsub16 r0, r1, r2 :: rd 0xfffcfff1 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1271 qsub16 r0, r1, r2 :: rd 0x0ddd8000 rm 0xd83b849b, rn 0xca5e5605, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1272 qsub16 r0, r1, r2 :: rd 0xbc54a9aa rm 0x0cdafabe, rn 0x50865114, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1273 qsub16 r0, r1, r2 :: rd 0xbd1665e6 rm 0x2738f0ff, rn 0x6a228b19, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1274 qsub16 r0, r1, r2 :: rd 0xd15beae8 rm 0xfaceab39, rn 0x2973c051, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1275 qsub16 r0, r1, r2 :: rd 0x80008000 rm 0xa3e6f759, rn 0x557c7ba2, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1276 qsub16 r
[all...]
/external/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-rn-rm-a32.cc58 M(qsub16) \
462 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-qsub16.h"
H A Dtest-assembler-cond-rd-rn-rm-t32.cc57 M(qsub16) \
460 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-qsub16.h"
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h2766 void qsub16(Condition cond, Register rd, Register rn, Register rm);
2767 void qsub16(Register rd, Register rn, Register rm) { qsub16(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
H A Ddisasm-aarch32.h875 void qsub16(Condition cond, Register rd, Register rn, Register rm);
H A Dassembler-aarch32.cc8007 void Assembler::qsub16(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
8024 Delegate(kQsub16, &Assembler::qsub16, cond, rd, rn, rm);
H A Dmacro-assembler-aarch32.h3105 qsub16(cond, rd, rn, rm);
H A Ddisasm-aarch32.cc2216 void Disassembler::qsub16(Condition cond, function in class:vixl::aarch32::Disassembler
21610 qsub16(CurrentCond(),
[all...]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dbasic-arm-instructions.s1224 qsub16 r1, r2, r3
1231 @ CHECK: qsub16 r1, r2, r3 @ encoding: [0x73,0x1f,0x22,0xe6]
H A Dbasic-thumb2-instructions.s1476 qsub16 r1, r2, r3
1484 @ CHECK: qsub16 r1, r2, r3 @ encoding: [0xd2,0xfa,0x13,0xf1]
/external/llvm/test/MC/ARM/
H A Dbasic-arm-instructions.s1831 qsub16 r1, r2, r3
1838 @ CHECK: qsub16 r1, r2, r3 @ encoding: [0x73,0x1f,0x22,0xe6]
H A Dbasic-thumb2-instructions.s1903 qsub16 r1, r2, r3
1911 @ CHECK: qsub16 r1, r2, r3 @ encoding: [0xd2,0xfa,0x13,0xf1]

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