| /external/valgrind/none/tests/arm/ |
| H A D | v6media.stdout.exp | 2371 qsub8 r0, r1, r2 :: rd 0x00f1fffc rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2372 qsub8 r0, r1, r2 :: rd 0x000f0104 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2373 qsub8 r0, r1, r2 :: rd 0x0104000f rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2374 qsub8 r0, r1, r2 :: rd 0xfffc00f1 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2375 qsub8 r0, r1, r2 :: rd 0x7fff7fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2376 qsub8 r0, r1, r2 :: rd 0x7ffe81fe rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2377 qsub8 r0, r1, r2 :: rd 0x80008000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2378 qsub8 r0, r1, r2 :: rd 0x81018101 rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2379 qsub8 r0, r1, r2 :: rd 0xeaf77a6e rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2380 qsub8 r
[all...] |
| /external/vixl/test/aarch32/ |
| H A D | test-assembler-cond-rd-rn-rm-a32.cc | 59 M(qsub8) \
463 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-qsub8.h"
|
| H A D | test-assembler-cond-rd-rn-rm-t32.cc | 58 M(qsub8) \
461 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-qsub8.h"
|
| /external/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 2769 void qsub8(Condition cond, Register rd, Register rn, Register rm);
2770 void qsub8(Register rd, Register rn, Register rm) { qsub8(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
|
| H A D | disasm-aarch32.h | 877 void qsub8(Condition cond, Register rd, Register rn, Register rm);
|
| H A D | assembler-aarch32.cc | 8027 void Assembler::qsub8(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
8044 Delegate(kQsub8, &Assembler::qsub8, cond, rd, rn, rm);
|
| H A D | macro-assembler-aarch32.h | 3117 qsub8(cond, rd, rn, rm);
|
| H A D | disasm-aarch32.cc | 2229 void Disassembler::qsub8(Condition cond, function in class:vixl::aarch32::Disassembler
21259 qsub8(CurrentCond(),
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 1226 qsub8 r1, r2, r3
1233 @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xf3,0x1f,0x22,0xe6]
|
| H A D | basic-thumb2-instructions.s | 1477 qsub8 r1, r2, r3
1485 @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xc2,0xfa,0x13,0xf1]
|
| /external/llvm/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 1833 qsub8 r1, r2, r3
1840 @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xf3,0x1f,0x22,0xe6]
|
| H A D | basic-thumb2-instructions.s | 1904 qsub8 r1, r2, r3
1912 @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xc2,0xfa,0x13,0xf1]
|