Searched refs:rt2 (Results 1 - 22 of 22) sorted by relevance

/external/e2fsprogs/lib/ss/
H A Drequest_tbl.c55 register ssrt **rt1, **rt2; local
60 for (rt2 = rt1; *rt1; rt1++) {
62 *rt2++ = *rt1;
66 *rt2 = (ssrt *)NULL;
/external/vixl/src/aarch64/
H A Dsimulator-aarch64.cc1431 unsigned rt2 = instr->GetRt2(); local
1440 // 'rt' and 'rt2' can only be aliased for stores.
1441 VIXL_ASSERT(((op & LoadStorePairLBit) == 0) || (rt != rt2));
1448 WriteWRegister(rt2, Memory::Read<uint32_t>(address2), NoRegLog);
1453 WriteSRegister(rt2, Memory::Read<float>(address2), NoRegLog);
1458 WriteXRegister(rt2, Memory::Read<uint64_t>(address2), NoRegLog);
1463 WriteDRegister(rt2, Memory::Read<double>(address2), NoRegLog);
1468 WriteQRegister(rt2, Memory::Read<qreg_t>(address2), NoRegLog);
1473 WriteXRegister(rt2, Memory::Read<int32_t>(address2), NoRegLog);
1478 Memory::Write<uint32_t>(address2, ReadWRegister(rt2));
1554 unsigned rt2 = instr->GetRt2(); local
4180 int rt2 = (rt + 1) % kNumberOfVRegisters; local
4189 int rt2 = (rt + 1) % kNumberOfVRegisters; local
4199 int rt2 = (rt + 1) % kNumberOfVRegisters; local
4225 int rt2 = (rt + 1) % kNumberOfVRegisters; local
[all...]
H A Dassembler-aarch64.cc947 const CPURegister& rt2,
949 LoadStorePair(rt, rt2, src, LoadPairOpFor(rt, rt2));
954 const CPURegister& rt2,
956 LoadStorePair(rt, rt2, dst, StorePairOpFor(rt, rt2));
969 const CPURegister& rt2,
972 // 'rt' and 'rt2' can only be aliased for stores.
973 VIXL_ASSERT(((op & LoadStorePairLBit) == 0) || !rt.Is(rt2));
974 VIXL_ASSERT(AreSameSizeAndType(rt, rt2));
946 ldp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
953 stp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
968 LoadStorePair(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
997 ldnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
1004 stnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
1011 LoadStorePairNonTemporal(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairNonTemporalOp op) argument
1267 stxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
1278 ldxp(const Register& rt, const Register& rt2, const MemOperand& src) argument
1332 stlxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
1343 ldaxp(const Register& rt, const Register& rt2, const MemOperand& src) argument
[all...]
H A Dmacro-assembler-aarch64.h59 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
60 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
61 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
745 const CPURegister& rt2,
1436 void Ldaxp(const Register& rt, const Register& rt2, const MemOperand& src) { argument
1438 VIXL_ASSERT(!rt.Aliases(rt2));
1440 ldaxp(rt, rt2, src);
1458 const CPURegister& rt2,
1457 Ldnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
1545 Ldxp(const Register& rt, const Register& rt2, const MemOperand& src) argument
1841 Stlxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
1873 Stnp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
1880 Stxp(const Register& rs, const Register& rt, const Register& rt2, const MemOperand& dst) argument
[all...]
H A Dassembler-aarch64.h1070 const CPURegister& rt2,
1075 const CPURegister& rt2,
1083 const CPURegister& rt2,
1088 const CPURegister& rt2,
1124 const Register& rt2,
1128 void ldxp(const Register& rt, const Register& rt2, const MemOperand& src);
1151 const Register& rt2,
1155 void ldaxp(const Register& rt, const Register& rt2, const MemOperand& src);
2614 static Instr Rt2(CPURegister rt2) { argument
2615 VIXL_ASSERT(rt2
[all...]
H A Dmacro-assembler-aarch64.cc1820 const CPURegister& rt2,
1838 LoadStorePair(rt, rt2, addr, op);
1845 LoadStorePair(rt, rt2, MemOperand(temp), op);
1847 LoadStorePair(rt, rt2, MemOperand(base), op);
1852 LoadStorePair(rt, rt2, MemOperand(base), op);
1819 LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
/external/vixl/src/aarch32/
H A Dmacro-assembler-aarch32.cc1973 Register rt2,
1982 temps.Include(rt, rt2);
1985 ldrd(rt, rt2, MemOperandComputationHelper(cond, scratch, label, mask));
1989 Assembler::Delegate(type, instruction, cond, rt, rt2, label);
2194 Register rt2,
2215 if (((rt.GetCode() + 1) % kNumberOfRegisters) != rt2.GetCode()) {
2246 if (!rt2.Is(rn)) temps.Include(rt2);
2261 rt2,
2271 if (!rt2
1969 Delegate(InstructionType type, InstructionCondRRL instruction, Condition cond, Register rt, Register rt2, Label* label) argument
2190 Delegate(InstructionType type, InstructionCondRRMop instruction, Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
[all...]
H A Dassembler-aarch32.h288 Register rt2,
308 Register rt2,
344 Register rt2,
534 Register rt2,
539 Register rt2);
541 Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
543 Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
842 Register /*rt2*/,
902 Register /*rt2*/,
1028 Register /*rt2*/,
2243 ldaexd(Register rt, Register rt2, const MemOperand& operand) argument
2389 ldrd(Register rt, Register rt2, const MemOperand& operand) argument
2394 ldrd(Register rt, Register rt2, Label* label) argument
2410 ldrexd(Register rt, Register rt2, const MemOperand& operand) argument
3210 stlexd(Register rd, Register rt, Register rt2, const MemOperand& operand) argument
3363 strd(Register rt, Register rt2, const MemOperand& operand) argument
3388 strexd(Register rd, Register rt, Register rt2, const MemOperand& operand) argument
4828 vmov(Register rt, Register rt2, DRegister rm) argument
4831 vmov(DRegister rm, Register rt, Register rt2) argument
4835 vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) argument
4841 vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) argument
[all...]
H A Dmacro-assembler-aarch32.h291 EmitLiteralCondRRL(Register rt, Register rt2) : rt_(rt), rt2_(rt2) {} argument
778 void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) { argument
780 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
783 EmitLiteralCondRRL<&Assembler::ldrd> emit_helper(rt, rt2);
786 void Ldrd(Register rt, Register rt2, RawLiteral* literal) { argument
787 Ldrd(al, rt, rt2, literal);
866 // Generic Ldrd(rt, rt2, data)
867 void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) { argument
869 VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
878 Ldrd(Register rt, Register rt2, T v) argument
1954 Ldaexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
1967 Ldaexd(Register rt, Register rt2, const MemOperand& operand) argument
2174 Ldrd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
2187 Ldrd(Register rt, Register rt2, const MemOperand& operand) argument
2216 Ldrexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
2229 Ldrexd(Register rt, Register rt2, const MemOperand& operand) argument
4297 Stlexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
4312 Stlexd(Register rd, Register rt, Register rt2, const MemOperand& operand) argument
4524 Strd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
4537 Strd(Register rt, Register rt2, const MemOperand& operand) argument
4575 Strexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
4590 Strexd(Register rd, Register rt, Register rt2, const MemOperand& operand) argument
7842 Vmov(Condition cond, Register rt, Register rt2, DRegister rm) argument
7852 Vmov(Register rt, Register rt2, DRegister rm) argument
7854 Vmov(Condition cond, DRegister rm, Register rt, Register rt2) argument
7864 Vmov(DRegister rm, Register rt, Register rt2) argument
7866 Vmov( Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) argument
7878 Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) argument
7882 Vmov( Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) argument
7894 Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) argument
[all...]
H A Ddisasm-aarch32.h652 Register rt2,
717 Register rt2,
720 void ldrd(Condition cond, Register rt, Register rt2, Label* label);
728 Register rt2,
1088 Register rt2,
1153 Register rt2,
1169 Register rt2,
1888 void vmov(Condition cond, Register rt, Register rt2, DRegister rm);
1890 void vmov(Condition cond, DRegister rm, Register rt, Register rt2);
1893 Condition cond, Register rt, Register rt2, SRegiste
[all...]
H A Dassembler-aarch32.cc4317 Register rt2,
4326 EmitT32_32(0xe8d000ffU | (rt.GetCode() << 12) | (rt2.GetCode() << 8) |
4333 if ((((rt.GetCode() + 1) % kNumberOfRegisters) == rt2.GetCode()) &&
4343 Delegate(kLdaexd, &Assembler::ldaexd, cond, rt, rt2, operand);
5110 Register rt2,
5123 EmitT32_32(0xe9500000U | (rt.GetCode() << 12) | (rt2.GetCode() << 8) |
5133 EmitT32_32(0xe8700000U | (rt.GetCode() << 12) | (rt2.GetCode() << 8) |
5143 EmitT32_32(0xe9700000U | (rt.GetCode() << 12) | (rt2.GetCode() << 8) |
5153 EmitT32_32(0xe95f0000U | (rt.GetCode() << 12) | (rt2.GetCode() << 8) |
5160 if ((((rt.GetCode() + 1) % kNumberOfRegisters) == rt2
4315 ldaexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
5108 ldrd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
5249 ldrd(Condition cond, Register rt, Register rt2, Label* label) argument
5367 ldrexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
10049 stlexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
10672 strd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
10851 strexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
19551 vmov(Condition cond, Register rt, Register rt2, DRegister rm) argument
19571 vmov(Condition cond, DRegister rm, Register rt, Register rt2) argument
19591 vmov( Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) argument
19615 vmov( Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) argument
[all...]
H A Ddisasm-aarch32.cc1595 Register rt2,
1599 << ", " << rt2 << ", "
1729 Register rt2,
1733 << ", " << rt2 << ", "
1739 Register rt2,
1743 << ", " << rt2 << ", "
1765 Register rt2,
1769 << ", " << rt2 << ", "
2979 Register rt2,
2983 << ", " << rt << ", " << rt2 << ", "
1593 ldaexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
1727 ldrd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
1737 ldrd(Condition cond, Register rt, Register rt2, Label* label) argument
1763 ldrexd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
2976 stlexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
3098 strd(Condition cond, Register rt, Register rt2, const MemOperand& operand) argument
3126 strexd(Condition cond, Register rd, Register rt, Register rt2, const MemOperand& operand) argument
5287 vmov(Condition cond, Register rt, Register rt2, DRegister rm) argument
5296 vmov(Condition cond, DRegister rm, Register rt, Register rt2) argument
5302 << ", " << rt << ", " << rt2; local
5305 vmov( Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) argument
5312 vmov( Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) argument
5316 << ", " << rm1 << ", " << rt << ", " << rt2; local
10033 unsigned rt2 = (instr >> 8) & 0xf; local
10131 unsigned rt2 = (instr >> 8) & 0xf; local
10157 unsigned rt2 = (instr >> 8) & 0xf; local
10240 unsigned rt2 = (instr >> 8) & 0xf; local
10259 unsigned rt2 = (instr >> 8) & 0xf; local
10461 unsigned rt2 = (instr >> 8) & 0xf; local
10554 unsigned rt2 = (instr >> 8) & 0xf; local
10585 unsigned rt2 = (instr >> 8) & 0xf; local
10608 unsigned rt2 = (instr >> 8) & 0xf; local
10636 unsigned rt2 = (instr >> 8) & 0xf; local
10659 unsigned rt2 = (instr >> 8) & 0xf; local
10687 unsigned rt2 = (instr >> 8) & 0xf; local
10710 unsigned rt2 = (instr >> 8) & 0xf; local
22515 unsigned rt2 = (instr >> 16) & 0xf; local
22532 unsigned rt2 = (instr >> 16) & 0xf; local
22663 unsigned rt2 = (instr >> 16) & 0xf; local
22680 unsigned rt2 = (instr >> 16) & 0xf; local
65171 unsigned rt2 = (instr >> 16) & 0xf; local
65193 unsigned rt2 = (instr >> 16) & 0xf; local
65346 unsigned rt2 = (instr >> 16) & 0xf; local
65368 unsigned rt2 = (instr >> 16) & 0xf; local
[all...]
/external/pdfium/xfa/fxfa/app/
H A Dxfa_ffpageview.cpp369 CFX_RectF rt2 = param2->m_pWidget->GetWidgetRect();
370 FX_FLOAT x1 = rt1.left, y1 = rt1.top, x2 = rt2.left, y2 = rt2.top;
/external/v8/src/arm64/
H A Dassembler-arm64-inl.h896 const CPURegister& rt2) {
897 DCHECK(AreSameSizeAndType(rt, rt2));
898 USE(rt2);
920 const CPURegister& rt2) {
921 DCHECK(AreSameSizeAndType(rt, rt2));
922 USE(rt2);
895 LoadPairOpFor(const CPURegister& rt, const CPURegister& rt2) argument
919 StorePairOpFor(const CPURegister& rt, const CPURegister& rt2) argument
H A Dsimulator-arm64.cc1725 unsigned rt2 = instr->Rt2();
1751 // 'rt' and 'rt2' can only be aliased for stores.
1752 DCHECK(((op & LoadStorePairLBit) == 0) || (rt != rt2));
1760 set_wreg_no_log(rt2, MemoryRead<uint32_t>(address2));
1766 set_sreg_no_log(rt2, MemoryRead<float>(address2));
1772 set_xreg_no_log(rt2, MemoryRead<uint64_t>(address2));
1778 set_dreg_no_log(rt2, MemoryRead<double>(address2));
1784 set_xreg_no_log(rt2, MemoryRead<int32_t>(address2));
1790 MemoryWrite<uint32_t>(address2, wreg(rt2));
1796 MemoryWrite<float>(address2, sreg(rt2));
[all...]
H A Dassembler-arm64.h1387 void ldp(const CPURegister& rt, const CPURegister& rt2,
1391 void stp(const CPURegister& rt, const CPURegister& rt2,
1395 void ldpsw(const Register& rt, const Register& rt2, const MemOperand& src);
1728 static Instr Rt2(CPURegister rt2) {
1729 DCHECK(rt2.code() != kSPRegInternalCode);
1730 return rt2.code() << Rt2_offset;
1888 void LoadStorePair(const CPURegister& rt, const CPURegister& rt2,
1941 const CPURegister& rt2);
1944 const CPURegister& rt2);
H A Dassembler-arm64.cc1573 const CPURegister& rt2,
1575 LoadStorePair(rt, rt2, src, LoadPairOpFor(rt, rt2));
1580 const CPURegister& rt2,
1582 LoadStorePair(rt, rt2, dst, StorePairOpFor(rt, rt2));
1587 const Register& rt2,
1590 LoadStorePair(rt, rt2, src, LDPSW_x);
1595 const CPURegister& rt2,
1598 // 'rt' and 'rt2' ca
1572 ldp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& src) argument
1579 stp(const CPURegister& rt, const CPURegister& rt2, const MemOperand& dst) argument
1586 ldpsw(const Register& rt, const Register& rt2, const MemOperand& src) argument
1594 LoadStorePair(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
[all...]
H A Dmacro-assembler-arm64.h67 V(Ldp, CPURegister&, rt, rt2, LoadPairOpFor(rt, rt2)) \
68 V(Stp, CPURegister&, rt, rt2, StorePairOpFor(rt, rt2)) \
69 V(Ldpsw, CPURegister&, rt, rt2, LDPSW_x)
310 void LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2,
480 const CPURegister& rt2,
540 const CPURegister& rt2,
H A Dmacro-assembler-arm64.cc594 const CPURegister& rt2,
607 LoadStorePair(rt, rt2, addr, op);
614 LoadStorePair(rt, rt2, MemOperand(temp), op);
616 LoadStorePair(rt, rt2, MemOperand(base), op);
621 LoadStorePair(rt, rt2, MemOperand(base), op);
593 LoadStorePairMacro(const CPURegister& rt, const CPURegister& rt2, const MemOperand& addr, LoadStorePairOp op) argument
/external/libnl/lib/route/
H A Dneightbl.c258 char rt[32], rt2[32]; local
263 nl_msec2str(pa->ntp_retrans_time, rt2, sizeof(rt2)));
/external/pcre/dist2/src/sljit/
H A DsljitNativeARM_64.c54 #define RT2(rt2) (reg_map[rt2] << 10)
/external/webrtc/webrtc/p2p/base/
H A Dp2ptransportchannel_unittest.cc184 const std::string& rt2, const std::string& rp2, int wait)
186 local_type2(lt2), local_proto2(lp2), remote_type2(rt2),
181 Result(const std::string& lt, const std::string& lp, const std::string& rt, const std::string& rp, const std::string& lt2, const std::string& lp2, const std::string& rt2, const std::string& rp2, int wait) argument

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