Searched refs:shsub8 (Results 1 - 12 of 12) sorted by relevance

/external/valgrind/none/tests/arm/
H A Dv6media.stdout.exp2551 shsub8 r0, r1, r2 :: rd 0x00f8fffe rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2552 shsub8 r0, r1, r2 :: rd 0x00070002 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2553 shsub8 r0, r1, r2 :: rd 0x00020007 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2554 shsub8 r0, r1, r2 :: rd 0xfffe00f8 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2555 shsub8 r0, r1, r2 :: rd 0x3fff3fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2556 shsub8 r0, r1, r2 :: rd 0x7fffc0ff rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2557 shsub8 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2558 shsub8 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2559 shsub8 r0, r1, r2 :: rd 0xf5fb3d37 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 ge[3:0]=0000
2560 shsub8 r
[all...]
/external/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-rn-rm-a32.cc66 M(shsub8) \
470 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-shsub8.h"
H A Dtest-assembler-cond-rd-rn-rm-t32.cc65 M(shsub8) \
468 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-shsub8.h"
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h2969 void shsub8(Condition cond, Register rd, Register rn, Register rm);
2970 void shsub8(Register rd, Register rn, Register rm) { shsub8(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
H A Ddisasm-aarch32.h957 void shsub8(Condition cond, Register rd, Register rn, Register rm);
H A Dassembler-aarch32.cc8972 void Assembler::shsub8(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
8989 Delegate(kShsub8, &Assembler::shsub8, cond, rd, rn, rm);
H A Dmacro-assembler-aarch32.h3590 shsub8(cond, rd, rn, rm);
H A Ddisasm-aarch32.cc2537 void Disassembler::shsub8(Condition cond, function in class:vixl::aarch32::Disassembler
21271 shsub8(CurrentCond(),
[all...]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dbasic-arm-instructions.s1571 shsub8 r4, r8, r2
1576 @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xe6]
H A Dbasic-thumb2-instructions.s1813 shsub8 r4, r8, r2
1819 @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xc8,0xfa,0x22,0xf4]
/external/llvm/test/MC/ARM/
H A Dbasic-arm-instructions.s2353 shsub8 r4, r8, r2
2358 @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xe6]
H A Dbasic-thumb2-instructions.s2248 shsub8 r4, r8, r2
2254 @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xc8,0xfa,0x22,0xf4]

Completed in 546 milliseconds