| /external/arm-neon-tests/ |
| H A D | ref_dsp.c | 387 /* smulwb, smulwt */
388 /* int32_t smulwb(int32_t val1, int32_t val2); */
391 sres = smulwb(svar1, svar2);
392 fprintf(ref_file, "smulwb(%#x, %#x) = %#x\n", svar1, svar2, sres);
398 sres = smulwb(svar1, svar2);
399 fprintf(ref_file, "smulwb(%#x, %#x) = %#x\n", svar1, svar2, sres);
|
| /external/valgrind/none/tests/arm/ |
| H A D | v6media.stdout.exp | 379 smulwb r0, r1, r2 :: rd 0x00000000 rm 0x00000003, rn 0x00020004, carryin 0, cpsr 0x00000000 ge[3:0]=0000
380 smulwb r0, r1, r2 :: rd 0x00000004 rm 0x00010003, rn 0x47ff0004, carryin 0, cpsr 0x00000000 ge[3:0]=0000
381 smulwb r0, r1, r2 :: rd 0xfffe0004 rm 0x80010003, rn 0x7fff0004, carryin 0, cpsr 0x00000000 ge[3:0]=0000
382 smulwb r0, r1, r2 :: rd 0x0001fffc rm 0x7fff0003, rn 0x7fff0004, carryin 0, cpsr 0x00000000 ge[3:0]=0000
383 smulwb r0, r1, r2 :: rd 0xfffffffc rm 0xffff0003, rn 0xffff0004, carryin 0, cpsr 0x00000000 ge[3:0]=0000
384 smulwb r0, r1, r2 :: rd 0x05ec94f3 rm 0x2575feb2, rn 0xd2c4287c, carryin 0, cpsr 0x00000000 ge[3:0]=0000
385 smulwb r0, r1, r2 :: rd 0xfefee815 rm 0xfb412431, rn 0x4b90362d, carryin 0, cpsr 0x00000000 ge[3:0]=0000
386 smulwb r0, r1, r2 :: rd 0x000c1f84 rm 0x004dfbe5, rn 0xe87927cc, carryin 0, cpsr 0x00000000 ge[3:0]=0000
387 smulwb r0, r1, r2 :: rd 0xfe0bd12f rm 0xf6a3fa3c, rn 0x083b3571, carryin 0, cpsr 0x00000000 ge[3:0]=0000
388 smulwb r
[all...] |
| /external/vixl/test/aarch32/ |
| H A D | test-assembler-cond-rd-rn-rm-a32.cc | 75 M(smulwb) \
479 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-smulwb.h"
|
| H A D | test-assembler-cond-rd-rn-rm-t32.cc | 74 M(smulwb) \
477 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-smulwb.h"
|
| /external/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 3152 void smulwb(Condition cond, Register rd, Register rn, Register rm);
3153 void smulwb(Register rd, Register rn, Register rm) { smulwb(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
|
| H A D | disasm-aarch32.h | 1053 void smulwb(Condition cond, Register rd, Register rn, Register rm);
|
| H A D | assembler-aarch32.cc | 9722 void Assembler::smulwb(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
9739 Delegate(kSmulwb, &Assembler::smulwb, cond, rd, rn, rm);
|
| H A D | macro-assembler-aarch32.h | 4139 smulwb(cond, rd, rn, rm);
|
| H A D | disasm-aarch32.cc | 2836 void Disassembler::smulwb(Condition cond, function in class:vixl::aarch32::Disassembler
22096 smulwb(CurrentCond(),
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 1810 smulwb r3, r9, r0
1813 @ CHECK: smulwb r3, r9, r0 @ encoding: [0xa9,0x00,0x23,0xe1]
|
| H A D | basic-thumb2-instructions.s | 2068 smulwb r3, r9, r0
2074 @ CHECK: smulwb r3, r9, r0 @ encoding: [0x39,0xfb,0x00,0xf3]
|
| /external/llvm/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 2583 smulwb r3, r9, r0
2586 @ CHECK: smulwb r3, r9, r0 @ encoding: [0xa9,0x00,0x23,0xe1]
|
| H A D | basic-thumb2-instructions.s | 2503 smulwb r3, r9, r0
2509 @ CHECK: smulwb r3, r9, r0 @ encoding: [0x39,0xfb,0x00,0xf3]
|