Searched refs:ssub8 (Results 1 - 12 of 12) sorted by relevance

/external/valgrind/none/tests/arm/
H A Dv6media.stdout.exp2982 ssub8 r0, r1, r2 :: rd 0x000fff02 rm 0x00f7ffff, rn 0x00e800fd, carryin 0, cpsr 0x000d0000 ge[3:0]=1101
2983 ssub8 r0, r1, r2 :: rd 0x00f101fe rm 0x00e800fd, rn 0x00f7ffff, carryin 0, cpsr 0x000a0000 ge[3:0]=1010
2984 ssub8 r0, r1, r2 :: rd 0x01fe00f1 rm 0x00fd00e8, rn 0xffff00f7, carryin 0, cpsr 0x000a0000 ge[3:0]=1010
2985 ssub8 r0, r1, r2 :: rd 0xff0200df rm 0xffff00f7, rn 0x00fd0018, carryin 0, cpsr 0x00060000 ge[3:0]=0110
2986 ssub8 r0, r1, r2 :: rd 0x0100fe21 rm 0x0000fd18, rn 0xff00fff7, carryin 0, cpsr 0x000d0000 ge[3:0]=1101
2987 ssub8 r0, r1, r2 :: rd 0xff02000f rm 0xffff00f7, rn 0x00fd00e8, carryin 0, cpsr 0x00070000 ge[3:0]=0111
2988 ssub8 r0, r1, r2 :: rd 0x01f7fe21 rm 0x00fefd18, rn 0xff07fff7, carryin 0, cpsr 0x00090000 ge[3:0]=1001
2989 ssub8 r0, r1, r2 :: rd 0xff09020f rm 0xff07fff7, rn 0x00fefde8, carryin 0, cpsr 0x00070000 ge[3:0]=0111
2990 ssub8 r0, r1, r2 :: rd 0xeaf77a6e rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00030000 ge[3:0]=0011
2991 ssub8 r
[all...]
/external/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-rn-rm-a32.cc99 M(ssub8) \
503 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-ssub8.h"
H A Dtest-assembler-cond-rd-rn-rm-t32.cc98 M(ssub8) \
501 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-ssub8.h"
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h3180 void ssub8(Condition cond, Register rd, Register rn, Register rm);
3181 void ssub8(Register rd, Register rn, Register rm) { ssub8(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
H A Ddisasm-aarch32.h1069 void ssub8(Condition cond, Register rd, Register rn, Register rm);
H A Dassembler-aarch32.cc9921 void Assembler::ssub8(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
9938 Delegate(kSsub8, &Assembler::ssub8, cond, rd, rn, rm);
H A Dmacro-assembler-aarch32.h4237 ssub8(cond, rd, rn, rm);
H A Ddisasm-aarch32.cc2931 void Disassembler::ssub8(Condition cond, function in class:vixl::aarch32::Disassembler
21247 ssub8(CurrentCond(),
[all...]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dbasic-arm-instructions.s1921 ssub8 r9, r2, r4
1926 @ CHECK: ssub8 r9, r2, r4 @ encoding: [0xf4,0x9f,0x12,0xe6]
H A Dbasic-thumb2-instructions.s2173 ssub8 r9, r2, r4
2179 @ CHECK: ssub8 r9, r2, r4 @ encoding: [0xc2,0xfa,0x04,0xf9]
/external/llvm/test/MC/ARM/
H A Dbasic-arm-instructions.s2737 ssub8 r9, r2, r4
2742 @ CHECK: ssub8 r9, r2, r4 @ encoding: [0xf4,0x9f,0x12,0xe6]
H A Dbasic-thumb2-instructions.s2634 ssub8 r9, r2, r4
2640 @ CHECK: ssub8 r9, r2, r4 @ encoding: [0xc2,0xfa,0x04,0xf9]

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