| /external/valgrind/none/tests/arm/ |
| H A D | v6media.stdout.exp | 1212 uqadd16 r0, r1, r2 :: rd 0x0021ffff rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1213 uqadd16 r0, r1, r2 :: rd 0x0021ffff rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1214 uqadd16 r0, r1, r2 :: rd 0xffff0021 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1215 uqadd16 r0, r1, r2 :: rd 0xffff0021 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1216 uqadd16 r0, r1, r2 :: rd 0xffffdaa0 rm 0xd83b849b, rn 0xca5e5605, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1217 uqadd16 r0, r1, r2 :: rd 0x5d60ffff rm 0x0cdafabe, rn 0x50865114, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1218 uqadd16 r0, r1, r2 :: rd 0x915affff rm 0x2738f0ff, rn 0x6a228b19, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1219 uqadd16 r0, r1, r2 :: rd 0xffffffff rm 0xfaceab39, rn 0x2973c051, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1220 uqadd16 r0, r1, r2 :: rd 0xf962ffff rm 0xa3e6f759, rn 0x557c7ba2, carryin 0, cpsr 0x00000000 ge[3:0]=0000
1221 uqadd16 r
[all...] |
| /external/vixl/test/aarch32/ |
| H A D | test-assembler-cond-rd-rn-rm-a32.cc | 86 M(uqadd16) \
490 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-uqadd16.h"
|
| H A D | test-assembler-cond-rd-rn-rm-t32.cc | 85 M(uqadd16) \
488 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-uqadd16.h"
|
| /external/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 3614 void uqadd16(Condition cond, Register rd, Register rn, Register rm);
3615 void uqadd16(Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
3616 uqadd16(al, rd, rn, rm);
|
| H A D | disasm-aarch32.h | 1277 void uqadd16(Condition cond, Register rd, Register rn, Register rm);
|
| H A D | assembler-aarch32.cc | 12221 void Assembler::uqadd16(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
12238 Delegate(kUqadd16, &Assembler::uqadd16, cond, rd, rn, rm);
|
| H A D | macro-assembler-aarch32.h | 5126 uqadd16(cond, rd, rn, rm);
|
| H A D | disasm-aarch32.cc | 3491 void Disassembler::uqadd16(Condition cond, function in class:vixl::aarch32::Disassembler
21484 uqadd16(CurrentCond(),
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 2407 uqadd16 r1, r2, r3
2413 @ CHECK: uqadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x62,0xe6]
|
| H A D | basic-thumb2-instructions.s | 2944 uqadd16 r1, r2, r3
2950 @ CHECK: uqadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x53,0xf1]
|
| /external/llvm/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 3325 uqadd16 r1, r2, r3
3331 @ CHECK: uqadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x62,0xe6]
|
| H A D | basic-thumb2-instructions.s | 3441 uqadd16 r1, r2, r3
3447 @ CHECK: uqadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x53,0xf1]
|