/external/valgrind/none/tests/arm/ |
H A D | v6media.stdout.exp | 2253 uqadd8 r0, r1, r2 :: rd 0x0021ffff rm 0x0009ffff, rn 0x001800aa, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2254 uqadd8 r0, r1, r2 :: rd 0x0021ffff rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2255 uqadd8 r0, r1, r2 :: rd 0xffff0021 rm 0x00aa0018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2256 uqadd8 r0, r1, r2 :: rd 0xffff0021 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2257 uqadd8 r0, r1, r2 :: rd 0xff00ff21 rm 0x0000aa18, rn 0xff00ff09, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2258 uqadd8 r0, r1, r2 :: rd 0xffff0021 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2259 uqadd8 r0, r1, r2 :: rd 0xffffffff rm 0xff9fefcc, rn 0xff9ffedd, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2260 uqadd8 r0, r1, r2 :: rd 0xff09ff21 rm 0xff07ff09, rn 0xaa020318, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2261 uqadd8 r0, r1, r2 :: rd 0xff0fffff rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 ge[3:0]=0000 2262 uqadd8 r [all...] |
/external/vixl/test/aarch32/ |
H A D | test-assembler-cond-rd-rn-rm-a32.cc | 87 M(uqadd8) \ 491 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-uqadd8.h"
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H A D | test-assembler-cond-rd-rn-rm-t32.cc | 86 M(uqadd8) \ 489 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-uqadd8.h"
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/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.h | 3619 void uqadd8(Condition cond, Register rd, Register rn, Register rm); 3620 void uqadd8(Register rd, Register rn, Register rm) { uqadd8(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
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H A D | disasm-aarch32.h | 1279 void uqadd8(Condition cond, Register rd, Register rn, Register rm);
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H A D | assembler-aarch32.cc | 12241 void Assembler::uqadd8(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler 12258 Delegate(kUqadd8, &Assembler::uqadd8, cond, rd, rn, rm);
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H A D | macro-assembler-aarch32.h | 5140 uqadd8(cond, rd, rn, rm);
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H A D | disasm-aarch32.cc | 3504 void Disassembler::uqadd8(Condition cond, function in class:vixl::aarch32::Disassembler 21091 uqadd8(CurrentCond(), [all...] |
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | basic-arm-instructions.s | 2409 uqadd8 r3, r4, r8 2415 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x98,0x3f,0x64,0xe6]
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H A D | basic-thumb2-instructions.s | 2945 uqadd8 r3, r4, r8 2951 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x58,0xf3]
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/external/llvm/test/MC/ARM/ |
H A D | basic-arm-instructions.s | 3327 uqadd8 r3, r4, r8 3333 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x98,0x3f,0x64,0xe6]
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H A D | basic-thumb2-instructions.s | 3442 uqadd8 r3, r4, r8 3448 @ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x84,0xfa,0x58,0xf3]
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