Searched refs:uqsub16 (Results 1 - 12 of 12) sorted by relevance

/external/valgrind/none/tests/arm/
H A Dv6media.stdout.exp3985 uqsub16 r0, r1, r2 :: rd 0x0000fffc rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3986 uqsub16 r0, r1, r2 :: rd 0x000f0000 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3987 uqsub16 r0, r1, r2 :: rd 0x0000000f rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3988 uqsub16 r0, r1, r2 :: rd 0xfffc0000 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3989 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0x00000318, rn 0xff00ff09, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3990 uqsub16 r0, r1, r2 :: rd 0xfffc0000 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3991 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0x00020318, rn 0xff07ff09, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3992 uqsub16 r0, r1, r2 :: rd 0xff05fbf1 rm 0xff07ff09, rn 0x00020318, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3993 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3994 uqsub16 r
[all...]
/external/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-rn-rm-a32.cc90 M(uqsub16) \
494 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-uqsub16.h"
H A Dtest-assembler-cond-rd-rn-rm-t32.cc89 M(uqsub16) \
492 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-uqsub16.h"
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h3628 void uqsub16(Condition cond, Register rd, Register rn, Register rm);
3629 void uqsub16(Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
3630 uqsub16(al, rd, rn, rm);
H A Ddisasm-aarch32.h1285 void uqsub16(Condition cond, Register rd, Register rn, Register rm);
H A Dassembler-aarch32.cc12301 void Assembler::uqsub16(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
12318 Delegate(kUqsub16, &Assembler::uqsub16, cond, rd, rn, rm);
H A Dmacro-assembler-aarch32.h5176 uqsub16(cond, rd, rn, rm);
H A Ddisasm-aarch32.cc3543 void Disassembler::uqsub16(Condition cond, function in class:vixl::aarch32::Disassembler
21646 uqsub16(CurrentCond(),
[all...]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dbasic-arm-instructions.s2442 uqsub16 r1, r5, r3
2447 @ CHECK: uqsub16 r1, r5, r3 @ encoding: [0x73,0x1f,0x65,0xe6]
H A Dbasic-thumb2-instructions.s2989 uqsub16 r1, r9, r7
2995 @ CHECK: uqsub16 r1, r9, r7 @ encoding: [0xd9,0xfa,0x57,0xf1]
/external/llvm/test/MC/ARM/
H A Dbasic-arm-instructions.s3360 uqsub16 r1, r5, r3
3365 @ CHECK: uqsub16 r1, r5, r3 @ encoding: [0x73,0x1f,0x65,0xe6]
H A Dbasic-thumb2-instructions.s3486 uqsub16 r1, r9, r7
3492 @ CHECK: uqsub16 r1, r9, r7 @ encoding: [0xd9,0xfa,0x57,0xf1]

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