/external/llvm/test/MC/ARM/ |
H A D | thumb.s | 33 uxtb r3, r6 35 @ CHECK: uxtb r3, r6 @ encoding: [0xf3,0xb2]
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H A D | basic-thumb-instructions.s | 658 uxtb r7, r2 661 @ CHECK: uxtb r7, r2 @ encoding: [0xd7,0xb2]
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H A D | basic-thumb2-instructions.s | 3635 uxtb r5, r6, ror #0 3636 uxtb r6, r9, ror #8 3639 uxtb r8, r3, ror #24 3640 uxtb.w r7, r8 3644 @ CHECK: uxtb r5, r6 @ encoding: [0xf5,0xb2] 3645 @ CHECK: uxtb.w r6, r9, ror #8 @ encoding: [0x5f,0xfa,0x99,0xf6] 3648 @ CHECK: uxtb.w r8, r3, ror #24 @ encoding: [0x5f,0xfa,0xb3,0xf8] 3649 @ CHECK: uxtb.w r7, r8 @ encoding: [0x5f,0xfa,0x88,0xf7]
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H A D | basic-arm-instructions.s | 3485 uxtb r5, r6, ror #0 3486 uxtb r6, r9, ror #8 3488 uxtb r8, r3, ror #24 3491 @ CHECK: uxtb r5, r6 @ encoding: [0x76,0x50,0xef,0xe6] 3492 @ CHECK: uxtb r6, r9, ror #8 @ encoding: [0x79,0x64,0xef,0xe6] 3494 @ CHECK: uxtb r8, r3, ror #24 @ encoding: [0x73,0x8c,0xef,0xe6]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | thumb.s | 33 uxtb r3, r6 35 @ CHECK: uxtb r3, r6 @ encoding: [0xf3,0xb2]
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H A D | basic-thumb-instructions.s | 607 uxtb r7, r2 610 @ CHECK: uxtb r7, r2 @ encoding: [0xd7,0xb2]
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H A D | basic-thumb2-instructions.s | 3138 uxtb r5, r6, ror #0 3139 uxtb r6, r9, ror #8 3142 uxtb r8, r3, ror #24 3143 uxtb.w r7, r8 3147 @ CHECK: uxtb r5, r6 @ encoding: [0xf5,0xb2] 3148 @ CHECK: uxtb.w r6, r9, ror #8 @ encoding: [0x5f,0xfa,0x99,0xf6] 3151 @ CHECK: uxtb.w r8, r3, ror #24 @ encoding: [0x5f,0xfa,0xb3,0xf8] 3152 @ CHECK: uxtb.w r7, r8 @ encoding: [0x5f,0xfa,0x88,0xf7]
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H A D | basic-arm-instructions.s | 2567 uxtb r5, r6, ror #0 2568 uxtb r6, r9, ror #8 2570 uxtb r8, r3, ror #24 2573 @ CHECK: uxtb r5, r6 @ encoding: [0x76,0x50,0xef,0xe6] 2574 @ CHECK: uxtb r6, r9, ror #8 @ encoding: [0x79,0x64,0xef,0xe6] 2576 @ CHECK: uxtb r8, r3, ror #24 @ encoding: [0x73,0x8c,0xef,0xe6]
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/external/llvm/test/MC/AArch64/ |
H A D | arm64-arithmetic-encoding.s | 170 add w1, w2, w3, uxtb 179 ; CHECK: add w1, w2, w3, uxtb ; encoding: [0x41,0x00,0x23,0x0b] 188 add x1, x2, w3, uxtb 195 ; CHECK: add x1, x2, w3, uxtb ; encoding: [0x41,0x00,0x23,0x8b] 214 sub w1, w2, w3, uxtb 223 ; CHECK: sub w1, w2, w3, uxtb ; encoding: [0x41,0x00,0x23,0x4b] 232 sub x1, x2, w3, uxtb 239 ; CHECK: sub x1, x2, w3, uxtb ; encoding: [0x41,0x00,0x23,0xcb] 258 adds w1, w2, w3, uxtb 267 ; CHECK: adds w1, w2, w3, uxtb ; encodin [all...] |
H A D | basic-a64-instructions.s | 18 add x2, x4, w5, uxtb 26 // CHECK: add x2, x4, w5, uxtb // encoding: [0x82,0x00,0x25,0x8b] 36 add w2, w5, w7, uxtb 44 // CHECK: add w2, w5, w7, uxtb // encoding: [0xa2,0x00,0x27,0x0b] 64 sub x2, x4, w5, uxtb #2 72 // CHECK: sub x2, x4, w5, uxtb #2 // encoding: [0x82,0x08,0x25,0xcb] 81 sub w2, w5, w7, uxtb 89 // CHECK: sub w2, w5, w7, uxtb // encoding: [0xa2,0x00,0x27,0x4b] 99 adds x2, x4, w5, uxtb #2 107 // CHECK: adds x2, x4, w5, uxtb # [all...] |
H A D | basic-a64-diagnostics.s | 23 add x9, x10, w11, uxtb #-1 24 add x3, x5, w7, uxtb #5 27 // CHECK-ERROR: add x9, x10, w11, uxtb #-1 30 // CHECK-ERROR: add x3, x5, w7, uxtb #5 51 adds sp, x3, w2, uxtb 54 adds x2, x1, sp, uxtb #2 56 // CHECK-ERROR: adds sp, x3, w2, uxtb 65 // CHECK-ERROR: adds x2, x1, sp, uxtb #2 845 uxtb x3, x12 848 uxtb x [all...] |
H A D | arm64-aliases.s | 66 cmn x2, w3, uxtb #1 75 ; CHECK: cmn x2, w3, uxtb #1 ; encoding: [0x5f,0x04,0x23,0xab] 317 uxtb w1, w2 322 ; CHECK: uxtb w1, w2 328 uxtb x1, w2 335 ; CHECK: uxtb w1, w2
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/external/valgrind/none/tests/arm64/ |
H A D | integer.stdout.exp | 917 add x21,x22,x23,uxtb #0 :: rd a3ca7e66297c4707 rm a3ca7e66297c469b, rn a67e09b8e126596c, cin 0, nzcv 00000000 918 add x21,x22,x23,uxtb #1 :: rd 09fb0ab6a60b350b rm 09fb0ab6a60b34c3, rn 2584971088d90924, cin 0, nzcv 00000000 919 add x21,x22,x23,uxtb #2 :: rd 52d448b3d56f5615 rm 52d448b3d56f5369, rn d98d2022a9b876ab, cin 0, nzcv 00000000 920 add x21,x22,x23,uxtb #3 :: rd a7e754e8ff3a5596 rm a7e754e8ff3a554e, rn 7ab2520302849409, cin 0, nzcv 00000000 921 add x21,x22,x23,uxtb #4 :: rd 2e10f2a4055bf2ae rm 2e10f2a4055bec0e, rn 77f3b8dcc730b96a, cin 0, nzcv 00000000 957 adds x21,x22,x23,uxtb #0 :: rd a3ca7e66297c4707 rm a3ca7e66297c469b, rn a67e09b8e126596c, cin 0, nzcv 80000000 N 958 adds x21,x22,x23,uxtb #1 :: rd 09fb0ab6a60b350b rm 09fb0ab6a60b34c3, rn 2584971088d90924, cin 0, nzcv 00000000 959 adds x21,x22,x23,uxtb #2 :: rd 52d448b3d56f5615 rm 52d448b3d56f5369, rn d98d2022a9b876ab, cin 0, nzcv 00000000 960 adds x21,x22,x23,uxtb #3 :: rd a7e754e8ff3a5596 rm a7e754e8ff3a554e, rn 7ab2520302849409, cin 0, nzcv 80000000 N 961 adds x21,x22,x23,uxtb # [all...] |
/external/v8/src/arm/ |
H A D | disasm-arm.cc | 1196 Format(instr, "uxtb'cond 'rd, 'rm"); 1199 Format(instr, "uxtb'cond 'rd, 'rm, ror #8"); 1202 Format(instr, "uxtb'cond 'rd, 'rm, ror #16"); 1205 Format(instr, "uxtb'cond 'rd, 'rm, ror #24");
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H A D | codegen-arm.cc | 247 __ uxtb(temp3, temp1, 8);
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H A D | assembler-arm.h | 970 void uxtb(Register dst, Register src, int rotate = 0, Condition cond = al);
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/external/vixl/test/aarch32/ |
H A D | test-assembler-cond-rd-operand-rn-t32.cc | 63 M(uxtb) \ 347 #include "aarch32/traces/assembler-cond-rd-operand-rn-t32-uxtb.h"
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H A D | test-assembler-cond-rd-operand-rn-a32.cc | 63 M(uxtb) \ 1122 #include "aarch32/traces/assembler-cond-rd-operand-rn-a32-uxtb.h"
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H A D | test-assembler-cond-rd-operand-rn-ror-amount-t32.cc | 55 M(uxtb) \ 1208 #include "aarch32/traces/assembler-cond-rd-operand-rn-ror-amount-t32-uxtb.h"
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/external/valgrind/none/tests/arm/ |
H A D | v6intARM.stdout.exp | 645 uxtb r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x00000000 646 uxtb r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 647 uxtb r0, r1 :: rd 0x000000ff rm 0x000000ff, carryin 0, cpsr 0x00000000 648 uxtb r0, r1 :: rd 0x000000ff rm 0xffffffff, carryin 0, cpsr 0x00000000 664 uxtb r0, r1, ror #0 :: rd 0x000000ff rm 0x000000ff, carryin 0, cpsr 0x00000000 665 uxtb r0, r1, ror #8 :: rd 0x00000000 rm 0x000000ff, carryin 0, cpsr 0x00000000 666 uxtb r0, r1, ror #8 :: rd 0x000000ff rm 0x0000ff00, carryin 0, cpsr 0x00000000 667 uxtb r0, r1, ror #16 :: rd 0x000000ff rm 0x00ff0000, carryin 0, cpsr 0x00000000 668 uxtb r0, r1, ror #24 :: rd 0x000000ff rm 0xff000000, carryin 0, cpsr 0x00000000
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/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.h | 3682 void uxtb(Condition cond, 3686 void uxtb(Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler 3687 uxtb(al, Best, rd, operand); 3689 void uxtb(Condition cond, Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler 3690 uxtb(cond, Best, rd, operand); 3692 void uxtb(EncodingSize size, Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler 3693 uxtb(al, size, rd, operand);
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/external/v8/src/arm64/ |
H A D | macro-assembler-arm64-inl.h | 1225 uxtb(rd, rn);
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H A D | assembler-arm64.h | 1219 void uxtb(const Register& rd, const Register& rn) {
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/external/valgrind/coregrind/ |
H A D | m_trampoline.S | 779 uxtb w1, w1
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/external/v8/src/compiler/arm/ |
H A D | code-generator-arm.cc | 995 __ uxtb(i.OutputRegister(), i.InputRegister(0), i.InputInt32(1));
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