Searched refs:vcgt (Results 1 - 23 of 23) sorted by relevance

/external/arm-neon-tests/
H A Dref_vcgt.c26 #define INSN_NAME vcgt
H A DAndroid.mk26 vcgt vclt vbsl vshl vldX vdup_lane vrshrn_n vqdmull_lane \
H A DMakefile41 vcgt vclt vbsl vshl vldX vdup_lane vrshrn_n vqdmull_lane \
/external/clang/test/CodeGen/
H A D2007-09-05-ConstCtor.c11 const unsigned long vcgt = 1234; local
12 struct A a = { vcgt };
/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dneon-cmp-encoding.s55 vcgt.s8 d16, d16, d17
56 vcgt.s16 d16, d16, d17
57 vcgt.s32 d16, d16, d17
58 vcgt.u8 d16, d16, d17
59 vcgt.u16 d16, d16, d17
60 vcgt.u32 d16, d16, d17
61 vcgt.f32 d16, d16, d17
62 vcgt.s8 q8, q8, q9
63 vcgt.s16 q8, q8, q9
64 vcgt
[all...]
/external/llvm/test/MC/ARM/
H A Dneon-cmp-encoding.s55 vcgt.s8 d16, d16, d17
56 vcgt.s16 d16, d16, d17
57 vcgt.s32 d16, d16, d17
58 vcgt.u8 d16, d16, d17
59 vcgt.u16 d16, d16, d17
60 vcgt.u32 d16, d16, d17
61 vcgt.f32 d16, d16, d17
62 vcgt.s8 q8, q8, q9
63 vcgt.s16 q8, q8, q9
64 vcgt
[all...]
H A Dfullfp16-neon.s102 vcgt.f16 d2, d3, d4
103 vcgt.f16 q2, q3, q4
104 @ ARM: vcgt.f16 d2, d3, d4 @ encoding: [0x04,0x2e,0x33,0xf3]
105 @ ARM: vcgt.f16 q2, q3, q4 @ encoding: [0x48,0x4e,0x36,0xf3]
106 @ THUMB: vcgt.f16 d2, d3, d4 @ encoding: [0x33,0xff,0x04,0x2e]
107 @ THUMB: vcgt.f16 q2, q3, q4 @ encoding: [0x36,0xff,0x48,0x4e]
109 vcgt.f16 d2, d3, #0
110 vcgt.f16 q2, q3, #0
111 @ ARM: vcgt.f16 d2, d3, #0 @ encoding: [0x03,0x24,0xb5,0xf3]
112 @ ARM: vcgt
[all...]
H A Dfullfp16-neon-neg.s76 vcgt.f16 d2, d3, d4
77 vcgt.f16 q2, q3, q4
81 vcgt.f16 d2, d3, #0
82 vcgt.f16 q2, q3, #0
H A Dneon-bitwise-encoding.s310 vcgt.s16 q5, q3
311 vcgt.s16 d5, d3
316 vcgt.s16 q5, #0
317 vcgt.s16 d5, #0
363 @ CHECK: vcgt.s16 q5, q5, q3 @ encoding: [0x46,0xa3,0x1a,0xf2]
364 @ CHECK: vcgt.s16 d5, d5, d3 @ encoding: [0x03,0x53,0x15,0xf2]
369 @ CHECK: vcgt.s16 q5, q5, #0 @ encoding: [0x4a,0xa0,0xb5,0xf3]
370 @ CHECK: vcgt.s16 d5, d5, #0 @ encoding: [0x05,0x50,0xb5,0xf3]
/external/valgrind/none/tests/arm/
H A Dneon64.stdout.exp453 vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
454 vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
455 vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000079
456 vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000079
457 vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
458 vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
459 vcgt.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x0000008c Qn (i32)0x00000078
460 vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
461 vcgt.s8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
462 vcgt
[all...]
H A Dneon128.stdout.exp346 vcgt.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
347 vcgt.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000079
348 vcgt.s32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
349 vcgt.s16 q0, q1, q2 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x0000008c Qn (i32)0x00000078
350 vcgt.s8 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
351 vcgt.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
352 vcgt.s16 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
353 vcgt.s8 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
354 vcgt.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x0000008c
355 vcgt
[all...]
/external/libavc/common/arm/
H A Dih264_deblk_luma_a9.s120 vcgt.s32 q6, q6, #0 @Q6 = (us_Bs > 0)
125 vcgt.u8 q10, q8, q14 @Q10=(Ap<Beta)
126 vcgt.u8 q11, q8, q15 @Q11=(Aq<Beta)
686 vcgt.u8 q14, q14, q11 @ABS(p0 - q0) <((Alpha >>2) + 2)
688 vcgt.u8 q7, q13, q15 @beta>Ap
709 vcgt.u8 q15, q13, q15 @Aq < Beta
873 vcgt.u8 d14, d14, d11 @ABS(p0 - q0) <((Alpha >>2) + 2)
875 vcgt.u8 d26, d13, d15 @beta>Ap
888 vcgt.u8 d15, d13, d15 @Aq < Beta
H A Dih264_deblk_chroma_a9.s302 vcgt.s16 d12, d12, #0 @Q6 = (us_Bs > 0)
433 vcgt.s16 q9, q7, #0
434 vcgt.s16 q10, q8, #0
633 vcgt.s16 q13, q14, #0
944 vcgt.s16 d12, d12, #0 @Q6 = (us_Bs > 0)
1087 vcgt.s16 q9, q7, #0
1088 vcgt.s16 q10, q8, #0
1312 vcgt.s16 q13, q14, #0
/external/libvpx/libvpx/vpx_dsp/arm/
H A Dloopfilter_8_neon.asm282 vcgt.u8 d21, d21, d2 ; (abs(p1 - p0) > thresh)*-1
288 vcgt.u8 d23, d22, d2 ; (abs(q1 - q0) > thresh)*-1
H A Dloopfilter_16_neon.asm418 vcgt.u8 d21, d21, d18 ; (abs(p1 - p0) > thresh)*-1
419 vcgt.u8 d22, d22, d18 ; (abs(q1 - q0) > thresh)*-1
H A Dloopfilter_neon.c79 *hev = vcgt##r##u8(max, thresh); \
/external/libjpeg-turbo/simd/
H A Djsimd_arm_neon.S2580 vcgt.s16 q8, q8, q0
2581 vcgt.s16 q9, q9, q1
2582 vcgt.s16 q10, q10, q2
2583 vcgt.s16 q11, q11, q3
2687 vcgt.s16 q8, q8, q4
2688 vcgt.s16 q9, q9, q5
2689 vcgt.s16 q10, q10, q6
2690 vcgt.s16 q11, q11, q7
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h4010 void vcgt(Condition cond,
4015 void vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { function in class:vixl::aarch32::Assembler
4016 vcgt(al, dt, rd, rm, operand);
4019 void vcgt(Condition cond,
4024 void vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { function in class:vixl::aarch32::Assembler
4025 vcgt(al, dt, rd, rm, operand);
4028 void vcgt(
4030 void vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { function in class:vixl::aarch32::Assembler
4031 vcgt(al, dt, rd, rn, rm);
4034 void vcgt(
4036 void vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { function in class:vixl::aarch32::Assembler
[all...]
H A Ddisasm-aarch32.h1469 void vcgt(Condition cond,
1475 void vcgt(Condition cond,
1481 void vcgt(
1484 void vcgt(
H A Dassembler-aarch32.cc14196 void Assembler::vcgt(Condition cond, function in class:vixl::aarch32::Assembler
14233 Delegate(kVcgt, &Assembler::vcgt, cond, dt, rd, rm, operand);
14236 void Assembler::vcgt(Condition cond, function in class:vixl::aarch32::Assembler
14273 Delegate(kVcgt, &Assembler::vcgt, cond, dt, rd, rm, operand);
14276 void Assembler::vcgt( function in class:vixl::aarch32::Assembler
14320 Delegate(kVcgt, &Assembler::vcgt, cond, dt, rd, rn, rm);
14323 void Assembler::vcgt( function in class:vixl::aarch32::Assembler
14367 Delegate(kVcgt, &Assembler::vcgt, cond, dt, rd, rn, rm);
H A Ddisasm-aarch32.cc4165 void Disassembler::vcgt(Condition cond, function in class:vixl::aarch32::Disassembler
4179 void Disassembler::vcgt(Condition cond, function in class:vixl::aarch32::Disassembler
4193 void Disassembler::vcgt( function in class:vixl::aarch32::Disassembler
4204 void Disassembler::vcgt( function in class:vixl::aarch32::Disassembler
[all...]
H A Dmacro-assembler-aarch32.h6037 vcgt(cond, dt, rd, rm, operand);
6055 vcgt(cond, dt, rd, rm, operand);
6070 vcgt(cond, dt, rd, rn, rm);
6085 vcgt(cond, dt, rd, rn, rm);
/external/pdfium/third_party/lcms2-2.6/src/
H A Dcmstypes.c4704 // vcgt formula is:
5300 {TYPE_HANDLER(cmsSigVcgtType, vcgt), NULL }

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