Searched refs:vcmp (Results 1 - 25 of 29) sorted by relevance

12

/external/llvm/test/MC/Hexagon/
H A Dv60-vcmp.s5 #CHECK: 1c81f142 { q2 |= vcmp.eq(v17.b{{ *}},{{ *}}v1.b) }
6 q2|=vcmp.eq(v17.b,v1.b)
8 #CHECK: 1c84fb2a { q2 &= vcmp.gt(v27.uw{{ *}},{{ *}}v4.uw) }
9 q2&=vcmp.gt(v27.uw,v4.uw)
11 #CHECK: 1c8cf826 { q2 &= vcmp.gt(v24.uh{{ *}},{{ *}}v12.uh) }
12 q2&=vcmp.gt(v24.uh,v12.uh)
14 #CHECK: 1c80e720 { q0 &= vcmp.gt(v7.ub{{ *}},{{ *}}v0.ub) }
15 q0&=vcmp.gt(v7.ub,v0.ub)
17 #CHECK: 1c9aed1a { q2 &= vcmp.gt(v13.w{{ *}},{{ *}}v26.w) }
18 q2&=vcmp
[all...]
H A Dv60-misc.s26 # CHECK: 1f90cf00 { q0 = vcmp.eq(v15.b,v16.b) }
27 q0 = vcmp.eq(v15.ub, v16.ub)
29 # CHECK: 1c92f101 { q1 &= vcmp.eq(v17.b,v18.b) }
30 q1 &= vcmp.eq(v17.ub, v18.ub)
32 # CHECK: 1c94f342 { q2 |= vcmp.eq(v19.b,v20.b) }
33 q2 |= vcmp.eq(v19.ub, v20.ub)
35 # CHECK: 1c96f583 { q3 ^= vcmp.eq(v21.b,v22.b) }
36 q3 ^= vcmp.eq(v21.ub, v22.ub)
38 # CHECK: 1f81c004 { q0 = vcmp.eq(v0.h,v1.h) }
39 q0 = vcmp
[all...]
/external/compiler-rt/lib/builtins/arm/
H A Deqdf2vfp.S24 vcmp.f64 d6, d7
H A Deqsf2vfp.S24 vcmp.f32 s14, s15
H A Dgedf2vfp.S24 vcmp.f64 d6, d7
H A Dgesf2vfp.S24 vcmp.f32 s14, s15
H A Dgtdf2vfp.S24 vcmp.f64 d6, d7
H A Dgtsf2vfp.S24 vcmp.f32 s14, s15
H A Dledf2vfp.S24 vcmp.f64 d6, d7
H A Dlesf2vfp.S24 vcmp.f32 s14, s15
H A Dltdf2vfp.S24 vcmp.f64 d6, d7
H A Dltsf2vfp.S24 vcmp.f32 s14, s15
H A Dnedf2vfp.S24 vcmp.f64 d6, d7
H A Dnesf2vfp.S24 vcmp.f32 s14, s15
H A Dunorddf2vfp.S24 vcmp.f64 d6, d7
H A Dunordsf2vfp.S24 vcmp.f32 s14, s15
/external/valgrind/none/tests/arm/
H A Dvfp.stdout.exp726 vcmp.f64 d0, d19 :: FPSCR 0x80000000 Dd 0xc00ba752 5460aa65 Dm 0xc004fef9 db22d0e5
727 vcmp.f64 d11, d16 :: FPSCR 0x20000000 Dd 0x40d6ecdc cccccccd Dm 0x40aac300 00000000
728 vcmp.f64 d21, d30 :: FPSCR 0x20000000 Dd 0xc0b1ac80 00000000 Dm 0xc11b9be6 00000000
729 vcmp.f64 d7, d28 :: FPSCR 0x20000000 Dd 0x407a9800 00000000 Dm 0xc07c84cc cccccccd
730 vcmp.f64 d29, d3 :: FPSCR 0x20000000 Dd 0x7ff00000 00000000 Dm 0x40e0e04e 66666666
731 vcmp.f64 d3, d22 :: FPSCR 0x60000000 Dd 0x40000000 00000000 Dm 0x40000000 00000000
732 vcmp.f64 d3, d22 :: FPSCR 0x60000000 Dd 0x40280bc6 a7ef9db2 Dm 0x40280bc6 a7ef9db2
733 vcmp.f64 d3, d22 :: FPSCR 0x60000000 Dd 0x00000000 00000000 Dm 0x00000000 00000000
734 vcmp.f64 d9, d2 :: FPSCR 0x60000000 Dd 0x7ff00000 00000000 Dm 0x7ff00000 00000000
735 vcmp
[all...]
/external/llvm/test/MC/ARM/
H A Dsingle-precision-fp.s57 vcmp.f64 d2, d3
60 vcmp.f64 d6, #0
64 @ CHECK-ERRORS-NEXT: vcmp.f64 d2, d3
70 @ CHECK-ERRORS-NEXT: vcmp.f64 d6, #0
H A Dfullfp16.s40 vcmp.f16 s0, s1
41 @ ARM: vcmp.f16 s0, s1 @ encoding: [0x60,0x09,0xb4,0xee]
42 @ THUMB: vcmp.f16 s0, s1 @ encoding: [0xb4,0xee,0x60,0x09]
44 vcmp.f16 s2, #0
45 @ ARM: vcmp.f16 s2, #0 @ encoding: [0x40,0x19,0xb5,0xee]
46 @ THUMB: vcmp.f16 s2, #0 @ encoding: [0xb5,0xee,0x40,0x19]
H A Dfullfp16-neg.s31 vcmp.f16 s0, s1
34 vcmp.f16 s2, #0
/external/v8/src/arm/
H A Dassembler-arm.h1251 void vcmp(const DwVfpRegister src1,
1254 void vcmp(const SwVfpRegister src1, const SwVfpRegister src2,
1256 void vcmp(const DwVfpRegister src1,
1259 void vcmp(const SwVfpRegister src1, const float src2,
H A Ddisasm-arm.cc1416 // vcmp(Dd, Dm)
1417 // vcmp(Sd, Sm)
1625 Format(instr, "vcmp'cond.f64 'Dd, 'Dm");
1627 Format(instr, "vcmp'cond.f64 'Dd, #0.0");
1633 Format(instr, "vcmp'cond.f32 'Sd, 'Sm");
1635 Format(instr, "vcmp'cond.f32 'Sd, #0.0");
H A Dassembler-arm.cc3487 void Assembler::vcmp(const DwVfpRegister src1, function in class:v8::internal::Assembler
3490 // vcmp(Dd, Dm) double precision floating point comparison.
3505 void Assembler::vcmp(const SwVfpRegister src1, const SwVfpRegister src2, function in class:v8::internal::Assembler
3507 // vcmp(Sd, Sm) single precision floating point comparison.
3520 void Assembler::vcmp(const DwVfpRegister src1, function in class:v8::internal::Assembler
3523 // vcmp(Dd, #0.0) double precision floating point comparison.
3535 void Assembler::vcmp(const SwVfpRegister src1, const float src2, function in class:v8::internal::Assembler
3537 // vcmp(Sd, #0.0) single precision floating point comparison.
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h4112 void vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm);
4113 void vcmp(DataType dt, SRegister rd, SRegister rm) { vcmp(al, dt, rd, rm); } function in class:vixl::aarch32::Assembler
4115 void vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm);
4116 void vcmp(DataType dt, DRegister rd, DRegister rm) { vcmp(al, dt, rd, rm); } function in class:vixl::aarch32::Assembler
4118 void vcmp(Condition cond, DataType dt, SRegister rd, double imm);
4119 void vcmp(DataType dt, SRegister rd, double imm) { vcmp(al, dt, rd, imm); } function in class:vixl::aarch32::Assembler
4121 void vcmp(Conditio
4122 void vcmp(DataType dt, DRegister rd, double imm) { vcmp(al, dt, rd, imm); } function in class:vixl::aarch32::Assembler
[all...]
H A Ddisasm-aarch32.h1531 void vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm);
1533 void vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm);
1535 void vcmp(Condition cond, DataType dt, SRegister rd, double imm);
1537 void vcmp(Condition cond, DataType dt, DRegister rd, double imm);

Completed in 672 milliseconds

12