| /external/compiler-rt/lib/builtins/arm/ |
| H A D | divdf3vfp.S | 23 vdiv.f64 d5, d6, d7
|
| H A D | divsf3vfp.S | 23 vdiv.f32 s13, s14, s15
|
| /external/llvm/test/MC/ARM/ |
| H A D | simple-fp-encoding.s | 13 vdiv.f64 d16, d17, d16
14 vdiv.f32 s0, s1, s0
15 vdiv.f32 s5, s7
16 vdiv.f64 d5, d7
18 @ CHECK: vdiv.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0xc1,0xee]
19 @ CHECK: vdiv.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x80,0xee]
20 @ CHECK: vdiv.f32 s5, s5, s7 @ encoding: [0xa3,0x2a,0xc2,0xee]
21 @ CHECK: vdiv.f64 d5, d5, d7 @ encoding: [0x07,0x5b,0x85,0xee]
|
| H A D | single-precision-fp.s | 7 vdiv.f64 d4, d5, d6
15 @ CHECK-ERRORS-NEXT: vdiv.f64 d4, d5, d6
|
| H A D | fullfp16.s | 12 vdiv.f16 s0, s1, s0
13 @ ARM: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x80,0xee]
14 @ THUMB: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0xee,0x80,0x09]
|
| H A D | fullfp16-neg.s | 10 vdiv.f16 s0, s1, s0
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | simple-fp-encoding.s | 15 @ CHECK: vdiv.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0xc1,0xee]
16 vdiv.f64 d16, d17, d16
18 @ CHECK: vdiv.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x80,0xee]
19 vdiv.f32 s0, s1, s0
|
| /external/valgrind/none/tests/arm/ |
| H A D | vfp.stdout.exp | 510 vdiv.f64 d20, d25, d22 :: Qd 0xbfe02df5 0x76d6419a Qm 0x40370a3d 70a3d70a Qn 0xc046c8cb 295e9e1b
511 vdiv.f64 d23, d24, d25 :: Qd 0xc07026fe 0xc863346b Qm 0xc1153b41 e6666666 Qn 0x40950800 00000000
512 vdiv.f64 d20, d31, d12 :: Qd 0xbff1098f 0x758c5d80 Qm 0x40e7ce60 00000000 Qn 0xc0e65b4f 3b645a1d
513 vdiv.f64 d19, d25, d27 :: Qd 0x401678a0 0x9bfa11ab Qm 0x40f767bc 28f5c28f Qn 0x40d0aa40 00000000
514 vdiv.f64 d30, d15, d2 :: Qd 0x3fc7844e 0x96972113 Qm 0xc0e64c67 ae147ae1 Qn 0xc10e5796 147ae148
515 vdiv.f64 d23, d24, d5 :: Qd 0x3f92422f 0xedbdd012 Qm 0x40380000 00000000 Qn 0x40950800 00000000
516 vdiv.f64 d10, d11, d2 :: Qd 0x4046629d 0x80967330 Qm 0x40e7ce60 00000000 Qn 0x40910400 00000000
517 vdiv.f64 d29, d15, d7 :: Qd 0x3f200264 0x3ec040af Qm 0x406ac000 00000000 Qn 0x413abc01 00000000
518 vdiv.f64 d30, d11, d12 :: Qd 0x404e57db 0x6cbb9f42 Qm 0x4115bb3e 3d70a3d7 Qn 0x40b6eb02 4dd2f1aa
519 vdiv
[all...] |
| /external/v8/src/arm/ |
| H A D | disasm-arm.cc | 1414 // Dd = vdiv(Dn, Dm)
1415 // Sd = vdiv(Sn, Sm)
1523 Format(instr, "vdiv'cond.f64 'Dd, 'Dn, 'Dm");
1525 Format(instr, "vdiv'cond.f32 'Sd, 'Sn, 'Sm");
|
| H A D | assembler-arm.h | 1245 void vdiv(const DwVfpRegister dst,
1249 void vdiv(const SwVfpRegister dst, const SwVfpRegister src1,
|
| H A D | assembler-arm.cc | 3446 void Assembler::vdiv(const DwVfpRegister dst, function in class:v8::internal::Assembler
3450 // Dd = vdiv(Dn, Dm) double precision floating point division.
3469 void Assembler::vdiv(const SwVfpRegister dst, const SwVfpRegister src1, function in class:v8::internal::Assembler
3471 // Sd = vdiv(Sn, Sm) single precision floating point division.
|
| H A D | code-stubs-arm.cc | 759 __ vdiv(double_result, double_scratch, double_result);
|
| /external/v8/src/compiler/arm/ |
| H A D | code-generator-arm.cc | 1146 __ vdiv(i.OutputFloatRegister(), i.InputFloatRegister(0),
1197 __ vdiv(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
| /external/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 4297 void vdiv(
4299 void vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) { function in class:vixl::aarch32::Assembler
4300 vdiv(al, dt, rd, rn, rm);
4303 void vdiv(
4305 void vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) { function in class:vixl::aarch32::Assembler
4306 vdiv(al, dt, rd, rn, rm);
|
| H A D | disasm-aarch32.h | 1649 void vdiv(
1652 void vdiv(
|
| H A D | assembler-aarch32.cc | 16090 void Assembler::vdiv( function in class:vixl::aarch32::Assembler
16110 Delegate(kVdiv, &Assembler::vdiv, cond, dt, rd, rn, rm);
16113 void Assembler::vdiv( function in class:vixl::aarch32::Assembler
16133 Delegate(kVdiv, &Assembler::vdiv, cond, dt, rd, rn, rm);
|
| H A D | macro-assembler-aarch32.h | 6793 vdiv(cond, dt, rd, rn, rm);
6808 vdiv(cond, dt, rd, rn, rm);
|
| H A D | disasm-aarch32.cc | 4712 void Disassembler::vdiv( function in class:vixl::aarch32::Disassembler
4723 void Disassembler::vdiv( function in class:vixl::aarch32::Disassembler
[all...] |
| /external/v8/src/crankshaft/arm/ |
| H A D | lithium-codegen-arm.cc | 1109 __ vdiv(quotient, dividend, divisor);
1251 __ vdiv(vleft, vleft, vright); // vleft now contains the result.
1427 __ vdiv(vleft, vleft, vright); // vleft now contains the result.
1945 __ vdiv(result, left, right);
|
| /external/v8/src/x64/ |
| H A D | assembler-x64.h | 1506 AVX_SP_3(vdiv, 0x5e);
|