/external/llvm/test/MC/ARM/ |
H A D | neon-v8.s | 60 vrintz.f32 d12, d18 61 @ CHECK: vrintz.f32 d12, d18 @ encoding: [0xa2,0xc5,0xba,0xf3] 62 vrintz.f32 q9, q4 63 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xc8,0x25,0xfa,0xf3] 80 vrintz.f32.f32 q9, q4 81 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xc8,0x25,0xfa,0xf3]
|
H A D | thumb-neon-v8.s | 60 vrintz.f32 d12, d18 61 @ CHECK: vrintz.f32 d12, d18 @ encoding: [0xba,0xff,0xa2,0xc5] 62 vrintz.f32 q9, q4 63 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25] 80 vrintz.f32.f32 q9, q4 81 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25]
|
H A D | directive-arch_extension-simd.s | 62 vrintz.f32 s0, s1 64 vrintz.f64 d0, d1 66 vrintz.f32.f32 s0, s0 68 vrintz.f64.f64 d0, d0 170 vrintz.f32 s0, s1 172 vrintz.f64 d0, d1 174 vrintz.f32.f32 s0, s0 176 vrintz.f64.f64 d0, d0
|
H A D | directive-arch_extension-fp.s | 90 vrintz.f32 s0, s1 92 vrintz.f64 d0, d1 94 vrintz.f32.f32 s0, s0 96 vrintz.f64.f64 d0, d0 226 vrintz.f32 s0, s1 228 vrintz.f64 d0, d1 230 vrintz.f32.f32 s0, s0 232 vrintz.f64.f64 d0, d0
|
H A D | invalid-neon-v8.s | 23 vrintz.f32 d3, q12
|
H A D | fp-armv8.s | 96 vrintz.f32 s3, s24 97 @ CHECK: vrintz.f32 s3, s24 @ encoding: [0xcc,0x1a,0xf6,0xee]
|
H A D | thumb-fp-armv8.s | 99 vrintz.f32 s3, s24 100 @ CHECK: vrintz.f32 s3, s24 @ encoding: [0xf6,0xee,0xcc,0x1a]
|
H A D | fullfp16.s | 169 vrintz.f16 s3, s24 170 @ ARM: vrintz.f16 s3, s24 @ encoding: [0xcc,0x19,0xf6,0xee] 171 @ THUMB: vrintz.f16 s3, s24 @ encoding: [0xf6,0xee,0xcc,0x19]
|
H A D | fullfp16-neg.s | 125 vrintz.f16 s3, s24
|
H A D | fullfp16-neon-neg.s | 286 vrintz.f16.f16 d0, d1 287 vrintz.f16.f16 q0, q1
|
H A D | fullfp16-neon.s | 399 vrintz.f16.f16 d0, d1 400 vrintz.f16.f16 q0, q1 401 @ ARM: vrintz.f16 d0, d1 @ encoding: [0x81,0x05,0xb6,0xf3] 402 @ ARM: vrintz.f16 q0, q1 @ encoding: [0xc2,0x05,0xb6,0xf3] 403 @ THUMB: vrintz.f16 d0, d1 @ encoding: [0xb6,0xff,0x81,0x05] 404 @ THUMB: vrintz.f16 q0, q1 @ encoding: [0xb6,0xff,0xc2,0x05]
|
H A D | diagnostics.s | 469 vrintz.f32.f32 s0, s1 472 vrintz.f64 d10, d9
|
/external/v8/src/arm/ |
H A D | assembler-arm.h | 1300 void vrintz(const SwVfpRegister dst, const SwVfpRegister src, 1302 void vrintz(const DwVfpRegister dst, const DwVfpRegister src,
|
H A D | disasm-arm.cc | 1480 // vrintz - round towards zero (truncate) 1482 Format(instr, "vrintz'cond.f64.f64 'Dd, 'Dm"); 1484 Format(instr, "vrintz'cond.f32.f32 'Sd, 'Sm");
|
H A D | assembler-arm.cc | 3835 void Assembler::vrintz(const SwVfpRegister dst, const SwVfpRegister src, function in class:v8::internal::Assembler 3849 void Assembler::vrintz(const DwVfpRegister dst, const DwVfpRegister src, function in class:v8::internal::Assembler
|
/external/v8/src/compiler/arm/ |
H A D | code-generator-arm.cc | 1246 __ vrintz(i.OutputFloatRegister(), i.InputFloatRegister(0)); 1251 __ vrintz(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
|
/external/vixl/src/aarch32/ |
H A D | disasm-aarch32.h | 2238 void vrintz( 2241 void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 2243 void vrintz(
|
H A D | assembler-aarch32.h | 5509 void vrintz( 5511 void vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { function in class:vixl::aarch32::Assembler 5512 vrintz(al, dt1, dt2, rd, rm); 5515 void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm); 5517 void vrintz( 5519 void vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { function in class:vixl::aarch32::Assembler 5520 vrintz(al, dt1, dt2, rd, rm);
|
H A D | assembler-aarch32.cc | 23326 void Assembler::vrintz( function in class:vixl::aarch32::Assembler 23356 Delegate(kVrintz, &Assembler::vrintz, cond, dt1, dt2, rd, rm); 23359 void Assembler::vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm) { function in class:vixl::aarch32::Assembler 23376 Delegate(kVrintz, &Assembler::vrintz, dt1, dt2, rd, rm); 23379 void Assembler::vrintz( function in class:vixl::aarch32::Assembler 23398 Delegate(kVrintz, &Assembler::vrintz, cond, dt1, dt2, rd, rm);
|
H A D | disasm-aarch32.cc | 6332 void Disassembler::vrintz( function in class:vixl::aarch32::Disassembler 6339 void Disassembler::vrintz(DataType dt1, function in class:vixl::aarch32::Disassembler 6347 void Disassembler::vrintz( function in class:vixl::aarch32::Disassembler [all...] |
H A D | macro-assembler-aarch32.h | 9469 vrintz(cond, dt1, dt2, rd, rm); 9481 vrintz(dt1, dt2, rd, rm); 9492 vrintz(cond, dt1, dt2, rd, rm);
|