Searched refs:vrshr (Results 1 - 24 of 24) sorted by relevance

/external/llvm/test/MC/ARM/
H A Dneont2-shift-encoding.s125 @ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0xc8,0xef,0x30,0x02]
126 vrshr.s8 d16, d16, #8
127 @ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0xd0,0xef,0x30,0x02]
128 vrshr.s16 d16, d16, #16
129 @ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0xe0,0xef,0x30,0x02]
130 vrshr.s32 d16, d16, #32
131 @ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x02]
132 vrshr.s64 d16, d16, #64
133 @ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0xc8,0xff,0x30,0x02]
134 vrshr
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H A Dneon-shift-encoding.s315 vrshr.s8 d16, d16, #8
316 vrshr.s16 d16, d16, #16
317 vrshr.s32 d16, d16, #32
318 vrshr.s64 d16, d16, #64
319 vrshr.u8 d16, d16, #8
320 vrshr.u16 d16, d16, #16
321 vrshr.u32 d16, d16, #32
322 vrshr.u64 d16, d16, #64
323 vrshr.s8 q8, q8, #8
324 vrshr
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/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dneont2-shift-encoding.s125 @ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0xc8,0xef,0x30,0x02]
126 vrshr.s8 d16, d16, #8
127 @ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0xd0,0xef,0x30,0x02]
128 vrshr.s16 d16, d16, #16
129 @ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0xe0,0xef,0x30,0x02]
130 vrshr.s32 d16, d16, #32
131 @ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x02]
132 vrshr.s64 d16, d16, #64
133 @ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0xc8,0xff,0x30,0x02]
134 vrshr
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H A Dneon-shift-encoding.s188 @ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf2]
189 vrshr.s8 d16, d16, #8
190 @ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf2]
191 vrshr.s16 d16, d16, #16
192 @ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf2]
193 vrshr.s32 d16, d16, #32
194 @ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf2]
195 vrshr.s64 d16, d16, #64
196 @ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf3]
197 vrshr
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/external/libhevc/common/arm/
H A Dihevc_deblk_chroma_horz.s125 vrshr.s16 q3,q3,#3
H A Dihevc_deblk_chroma_vert.s123 vrshr.s16 q3,q2,#3
H A Dihevc_deblk_luma_horz.s450 vrshr.s16 q5,q5,#4
H A Dihevc_deblk_luma_vert.s447 vrshr.s16 q8,q8,#4
/external/libavc/common/arm/
H A Dih264_iquant_itrans_recon_a9.s211 vrshr.s16 q10, q10, #6 @
212 vrshr.s16 q11, q11, #6
387 vrshr.s16 q10, q10, #6 @
388 vrshr.s16 q11, q11, #6
822 vrshr.s16 q1, q1, #6 @
824 vrshr.s16 q2, q2, #6 @
825 vrshr.s16 q4, q4, #6 @
827 vrshr.s16 q5, q5, #6 @
828 vrshr.s16 q7, q7, #6 @
830 vrshr
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H A Dih264_intra_pred_luma_16x16_a9q.s437 vrshr.s32 d0, d0, #6 @ i_b = D0[0]
H A Dih264_iquant_itrans_recon_dc_a9.s360 vrshr.s16 d0, d0, #6 @i_macro = ((q0 + 32) >> 6);
H A Dih264_deblk_chroma_a9.s430 vrshr.s16 q7, q7, #3
431 vrshr.s16 q8, q8, #3 @(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
631 vrshr.s16 q14, q14, #3 @(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
1084 vrshr.s16 q7, q7, #3
1085 vrshr.s16 q8, q8, #3 @(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
1310 vrshr.s16 q14, q14, #3 @(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
/external/arm-neon-tests/
H A Dref_vrshr_n.c40 vrshr##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
/external/libjpeg-turbo/simd/
H A Djsimd_arm_neon.S979 vrshr.s32 q10, q10, #\shift
980 vrshr.s32 q14, q14, #\shift
992 vrshr.s32 q10, q10, #\shift
993 vrshr.s32 q15, q15, #\shift
1151 vrshr.s32 q10, q10, #\shift
1152 vrshr.s32 q14, q14, #\shift
/external/valgrind/none/tests/arm/
H A Dneon128.stdout.exp1499 vrshr.s8 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
1500 vrshr.s8 q0, q1, #0 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xffffffff
1501 vrshr.s8 q0, q1, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
1502 vrshr.s8 q0, q1, #1 :: Qd 0x13171715 0x13151716 0x12161616 0x12181718 Qm (i32)0xffffffff
1503 vrshr.s16 q3, q4, #2 :: Qd 0x0000ffe1 0x0000ffe1 0x0000ffe1 0x0000ffe1 Qm (i32)0xffffff84
1504 vrshr.s16 q3, q4, #2 :: Qd 0x098b0b4b 0x094b0b8b 0x090b0acb 0x08cc0b8c Qm (i32)0xffffff84
1505 vrshr.s32 q2, q5, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
1506 vrshr.s32 q2, q5, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
1507 vrshr.s8 q6, q7, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000ffff
1508 vrshr
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H A Dneon64.stdout.exp1762 vrshr.s8 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
1763 vrshr.s8 d0, d1, #0 :: Qd 0x0f0e0d0c 0x0b0a0908 Qm (i32)0xffffffff
1764 vrshr.s8 d0, d1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
1765 vrshr.s8 d0, d1, #1 :: Qd 0x08070706 0x06050504 Qm (i32)0xffffffff
1766 vrshr.s16 d3, d4, #2 :: Qd 0x0000ffe1 0x0000ffe1 Qm (i32)0xffffff84
1767 vrshr.s16 d3, d4, #2 :: Qd 0x03c40343 0x02c30242 Qm (i32)0xffffff84
1768 vrshr.s32 d2, d5, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
1769 vrshr.s32 d2, d5, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
1770 vrshr.s8 d6, d7, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000ffff
1771 vrshr
[all...]
/external/libvpx/libvpx/vpx_dsp/arm/
H A Dloopfilter_8_neon.asm346 vrshr.s8 d29, d29, #1
H A Dloopfilter_16_neon.asm488 vrshr.s8 d29, d29, #1
H A Dloopfilter_neon.c437 filter = vrshr##r##n_s8(filter1, 1); \
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h5535 void vrshr(Condition cond,
5540 void vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { function in class:vixl::aarch32::Assembler
5541 vrshr(al, dt, rd, rm, operand);
5544 void vrshr(Condition cond,
5549 void vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { function in class:vixl::aarch32::Assembler
5550 vrshr(al, dt, rd, rm, operand);
H A Ddisasm-aarch32.h2252 void vrshr(Condition cond,
2258 void vrshr(Condition cond,
H A Dassembler-aarch32.cc23461 void Assembler::vrshr(Condition cond, function in class:vixl::aarch32::Assembler
23517 Delegate(kVrshr, &Assembler::vrshr, cond, dt, rd, rm, operand);
23520 void Assembler::vrshr(Condition cond, function in class:vixl::aarch32::Assembler
23576 Delegate(kVrshr, &Assembler::vrshr, cond, dt, rd, rm, operand);
H A Dmacro-assembler-aarch32.h9540 vrshr(cond, dt, rd, rm, operand);
9558 vrshr(cond, dt, rd, rm, operand);
H A Ddisasm-aarch32.cc6376 void Disassembler::vrshr(Condition cond, function in class:vixl::aarch32::Disassembler
6390 void Disassembler::vrshr(Condition cond, function in class:vixl::aarch32::Disassembler
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