/external/arm-neon-tests/ |
H A D | ref_vrsubhn.c | 26 #define INSN_NAME vrsubhn
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H A D | Android.mk | 36 vhadd vrhadd vhsub vsubl vsubw vsubhn vrsubhn vmvn vqmovn \
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H A D | Makefile | 51 vhadd vrhadd vhsub vsubl vsubw vsubhn vrsubhn vmvn vqmovn \
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | neon-sub-encoding.s | 103 @ CHECK: vrsubhn.i16 d16, q8, q9 @ encoding: [0xa2,0x06,0xc0,0xf3] 104 vrsubhn.i16 d16, q8, q9 105 @ CHECK: vrsubhn.i32 d16, q8, q9 @ encoding: [0xa2,0x06,0xd0,0xf3] 106 vrsubhn.i32 d16, q8, q9 107 @ CHECK: vrsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf3] 108 vrsubhn.i64 d16, q8, q9
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/external/llvm/test/MC/ARM/ |
H A D | neon-sub-encoding.s | 129 @ CHECK: vrsubhn.i16 d16, q8, q9 @ encoding: [0xa2,0x06,0xc0,0xf3] 130 vrsubhn.i16 d16, q8, q9 131 @ CHECK: vrsubhn.i32 d16, q8, q9 @ encoding: [0xa2,0x06,0xd0,0xf3] 132 vrsubhn.i32 d16, q8, q9 133 @ CHECK: vrsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf3] 134 vrsubhn.i64 d16, q8, q9
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/external/valgrind/none/tests/arm/ |
H A D | neon64.stdout.exp | 3020 vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072 3021 vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072 3022 vrsubhn.i16 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072 3023 vrsubhn.i16 d0, q1, q2 :: Qd 0x0f0d0b09 0x07050301 Qm (i32)0x00000073 Qn (i32)0x00000072 3024 vrsubhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072 3025 vrsubhn.i32 d0, q1, q2 :: Qd 0x0f0e0b0a 0x07060302 Qm (i32)0x00000073 Qn (i32)0x00000072 3026 vrsubhn.i64 d0, q1, q2 :: Qd 0x00000001 0x00000001 Qm (i32)0x00000073 Qn (i32)0x00000072 3027 vrsubhn.i64 d0, q1, q2 :: Qd 0x0f0e0c9a 0x07060492 Qm (i32)0x00000073 Qn (i32)0x00000072 3028 vrsubhn.i16 d0, q15, q2 :: Qd 0xefeeefee 0xefeeefee Qm (i16)0x0000ef73 Qn (i32)0x00000172 3029 vrsubhn [all...] |
/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.h | 5605 void vrsubhn( 5607 void vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) { function in class:vixl::aarch32::Assembler 5608 vrsubhn(al, dt, rd, rn, rm);
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H A D | disasm-aarch32.h | 2292 void vrsubhn(
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H A D | assembler-aarch32.cc | 23839 void Assembler::vrsubhn( function in class:vixl::aarch32::Assembler 23864 Delegate(kVrsubhn, &Assembler::vrsubhn, cond, dt, rd, rn, rm);
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H A D | macro-assembler-aarch32.h | 9686 vrsubhn(cond, dt, rd, rn, rm);
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H A D | disasm-aarch32.cc | 6482 void Disassembler::vrsubhn( function in class:vixl::aarch32::Disassembler [all...] |