/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | neon-shiftaccum-encoding.s | 67 @ CHECK: vsli.8 d17, d16, #7 @ encoding: [0x30,0x15,0xcf,0xf3] 68 vsli.8 d17, d16, #7 69 @ CHECK: vsli.16 d17, d16, #15 @ encoding: [0x30,0x15,0xdf,0xf3] 70 vsli.16 d17, d16, #15 71 @ CHECK: vsli.32 d17, d16, #31 @ encoding: [0x30,0x15,0xff,0xf3] 72 vsli.32 d17, d16, #31 73 @ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xb0,0x15,0xff,0xf3] 74 vsli.64 d17, d16, #63 75 @ CHECK: vsli.8 q9, q8, #7 @ encoding: [0x70,0x25,0xcf,0xf3] 76 vsli [all...] |
H A D | neont2-shiftaccum-encoding.s | 69 @ CHECK: vsli.8 d17, d16, #7 @ encoding: [0xcf,0xff,0x30,0x15] 70 vsli.8 d17, d16, #7 71 @ CHECK: vsli.16 d17, d16, #15 @ encoding: [0xdf,0xff,0x30,0x15] 72 vsli.16 d17, d16, #15 73 @ CHECK: vsli.32 d17, d16, #31 @ encoding: [0xff,0xff,0x30,0x15] 74 vsli.32 d17, d16, #31 75 @ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xff,0xff,0xb0,0x15] 76 vsli.64 d17, d16, #63 77 @ CHECK: vsli.8 q9, q8, #7 @ encoding: [0xcf,0xff,0x70,0x25] 78 vsli [all...] |
H A D | neon-shift-encoding.s | 116 @ CHECK: vsli.8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xf3] 117 vsli.8 d16, d16, #7 118 @ CHECK: vsli.16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xf3] 119 vsli.16 d16, d16, #15 120 @ CHECK: vsli.32 d16, d16, #31 @ encoding: [0x30,0x05,0xff,0xf3] 121 vsli.32 d16, d16, #31 122 @ CHECK: vsli.64 d16, d16, #63 @ encoding: [0xb0,0x05,0xff,0xf3] 123 vsli.64 d16, d16, #63 124 @ CHECK: vsli.8 q8, q8, #7 @ encoding: [0x70,0x05,0xcf,0xf3] 125 vsli [all...] |
/external/llvm/test/MC/ARM/ |
H A D | neon-shiftaccum-encoding.s | 142 vsli.8 d11, d12, #7 143 vsli.16 d12, d13, #15 144 vsli.32 d13, d14, #31 145 vsli.64 d14, d15, #63 146 vsli.8 q1, q8, #7 147 vsli.16 q2, q7, #15 148 vsli.32 q3, q4, #31 149 vsli.64 q4, q5, #63 160 vsli.8 d12, #7 161 vsli [all...] |
H A D | neont2-shiftaccum-encoding.s | 145 vsli.8 d11, d12, #7 146 vsli.16 d12, d13, #15 147 vsli.32 d13, d14, #31 148 vsli.64 d14, d15, #63 149 vsli.8 q1, q8, #7 150 vsli.16 q2, q7, #15 151 vsli.32 q3, q4, #31 152 vsli.64 q4, q5, #63 163 vsli.8 d12, #7 164 vsli [all...] |
H A D | neon-shift-encoding.s | 217 vsli.8 d16, d6, #7 218 vsli.16 d26, d18, #15 219 vsli.32 d11, d10, #31 220 vsli.64 d12, d19, #63 221 vsli.8 q1, q8, #7 222 vsli.16 q2, q7, #15 223 vsli.32 q3, q6, #31 224 vsli.64 q4, q5, #63 226 vsli.8 d16, #7 227 vsli [all...] |
/external/boringssl/src/crypto/sha/asm/ |
H A D | sha512-armv4.pl | 531 vsli.64 $t0,$e,#`64-@Sigma1[0]` 532 vsli.64 $t1,$e,#`64-@Sigma1[1]` 534 vsli.64 $t2,$e,#`64-@Sigma1[2]` 544 vsli.64 $t0,$a,#`64-@Sigma0[0]` 548 vsli.64 $t1,$a,#`64-@Sigma0[1]` 550 vsli.64 $t2,$a,#`64-@Sigma0[2]` 577 vsli.64 $t0,@X[($i+7)%8],#`64-@sigma1[0]` 579 vsli.64 $t1,@X[($i+7)%8],#`64-@sigma1[1]` 586 vsli.64 $t0,$s0,#`64-@sigma0[0]` 587 vsli [all...] |
/external/arm-neon-tests/ |
H A D | ref_vsli_n.c | 26 #define INSN_NAME vsli
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H A D | ref_vsXi_n.c | 35 #define INSN_NAME vsli
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/external/boringssl/linux-arm/crypto/chacha/ |
H A D | chacha-armv4.S | 895 vsli.32 q1,q12,#12 897 vsli.32 q5,q13,#12 899 vsli.32 q9,q14,#12 919 vsli.32 q3,q12,#8 921 vsli.32 q7,q13,#8 923 vsli.32 q11,q14,#8 943 vsli.32 q1,q12,#7 945 vsli.32 q5,q13,#7 947 vsli.32 q9,q14,#7 1003 vsli [all...] |
/external/boringssl/linux-arm/crypto/sha/ |
H A D | sha1-armv4-large.S | 720 vsli.32 q0,q12,#2 760 vsli.32 q1,q12,#2 797 vsli.32 q2,q12,#2 833 vsli.32 q3,q12,#2 870 vsli.32 q8,q12,#2 906 vsli.32 q9,q12,#2 942 vsli.32 q10,q12,#2 987 vsli.32 q11,q12,#2 1032 vsli.32 q0,q12,#2 1076 vsli [all...] |
/external/libavc/common/arm/ |
H A D | ih264_deblk_chroma_a9.s | 293 vsli.16 q7, q7, #8 @ 416 vsli.u16 d10, d10, #8 418 vsli.u32 q5, q5, #16 620 vsli.u16 d22, d22, #8 934 vsli.16 q7, q7, #8 @ 1069 vsli.u16 d10, d10, #8 1074 vsli.u32 q5, q5, #16 1296 vsli.u16 d22, d22, #8
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H A D | ih264_deblk_luma_a9.s | 121 vsli.32 q7, q7, #8 @ 127 vsli.32 q7, q7, #16 @Q7 = C0 423 vsli.32 q8, q8, #8 @ 427 vsli.32 q8, q8, #16 @Q8 = C0 1013 vsli.16 d8, d8, #8 @D8 = C0
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/external/valgrind/none/tests/arm/ |
H A D | neon128.stdout.exp | 1995 vsli.16 q0, q1, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff 1996 vsli.16 q0, q1, #1 :: Qd 0x4c5b5a55 0x4a545c56 0x48595657 0x465f5c5f Qm (i32)0xffffffff 1997 vsli.16 q3, q4, #2 :: Qd 0xfffdfe11 0xfffdfe11 0xfffdfe11 0xfffdfe11 Qm (i32)0xffffff84 1998 vsli.16 q3, q4, #2 :: Qd 0x98b5b4a9 0x94a8b8ac 0x90b3acaf 0x8cbfb8bf Qm (i32)0xffffff84 1999 vsli.32 q2, q5, #31 :: Qd 0xd5555555 0xd5555555 0xd5555555 0xd5555555 Qm (i32)0xffffffff 2000 vsli.32 q2, q5, #31 :: Qd 0x151d191d 0x941c1f1c 0x931b1a1b 0x921f1e1f Qm (i32)0xffffffff 2001 vsli.8 q6, q7, #7 :: Qd 0x5555d5d5 0x5555d5d5 0x5555d5d5 0x5555d5d5 Qm (i32)0x0000ffff 2002 vsli.8 q6, q7, #7 :: Qd 0x159d991d 0x941c1f9c 0x131b9a9b 0x929f1e9f Qm (i32)0x0000ffff 2003 vsli.16 q8, q9, #12 :: Qd 0xf5556555 0xf5556555 0xf5556555 0xf5556555 Qm (i32)0xfffffff6 2004 vsli [all...] |
H A D | neon64.stdout.exp | 3239 vsli.16 d0, d1, #1 :: Qd 0x0001000f 0x0001000f Qm (i32)0x00000007 3240 vsli.16 d0, d1, #1 :: Qd 0x1e1c1a18 0x16141210 Qm (i32)0x00000007 3241 vsli.16 d3, d4, #2 :: Qd 0xfffdfe11 0xfffdfe11 Qm (i32)0xffffff84 3242 vsli.16 d3, d4, #2 :: Qd 0x3c3a3430 0x2c2a2420 Qm (i32)0xffffff84 3243 vsli.32 d2, d5, #31 :: Qd 0xd5555555 0xd5555555 Qm (i32)0xffffffff 3244 vsli.32 d2, d5, #31 :: Qd 0x07060504 0x03020100 Qm (i32)0xffffffff 3245 vsli.8 d6, d7, #7 :: Qd 0x5555d5d5 0x5555d5d5 Qm (i32)0x0000ffff 3246 vsli.8 d6, d7, #7 :: Qd 0x87068504 0x83028100 Qm (i32)0x0000ffff 3247 vsli.16 d8, d9, #12 :: Qd 0xf5556555 0xf5556555 Qm (i32)0xfffffff6 3248 vsli [all...] |
/external/libavc/encoder/arm/ |
H A D | ime_distortion_metrics_a9q.s | 937 vsli.64 d10, d22, #32 938 vsli.64 d14, d18, #32
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/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.h | 5681 void vsli(Condition cond, 5686 void vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { function in class:vixl::aarch32::Assembler 5687 vsli(al, dt, rd, rm, operand); 5690 void vsli(Condition cond, 5695 void vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { function in class:vixl::aarch32::Assembler 5696 vsli(al, dt, rd, rm, operand);
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H A D | disasm-aarch32.h | 2347 void vsli(Condition cond, 2353 void vsli(Condition cond,
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H A D | assembler-aarch32.cc | 24415 void Assembler::vsli(Condition cond, function in class:vixl::aarch32::Assembler 24454 Delegate(kVsli, &Assembler::vsli, cond, dt, rd, rm, operand); 24457 void Assembler::vsli(Condition cond, function in class:vixl::aarch32::Assembler 24496 Delegate(kVsli, &Assembler::vsli, cond, dt, rd, rm, operand);
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H A D | macro-assembler-aarch32.h | 9892 vsli(cond, dt, rd, rm, operand); 9910 vsli(cond, dt, rd, rm, operand);
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H A D | disasm-aarch32.cc | 6629 void Disassembler::vsli(Condition cond, function in class:vixl::aarch32::Disassembler 6643 void Disassembler::vsli(Condition cond, function in class:vixl::aarch32::Disassembler [all...] |