| /external/llvm/test/MC/ARM/ |
| H A D | neon-vswp.s | 3 vswp d1, d2 label
4 vswp q1, q2 label
6 @ CHECK: vswp d1, d2 @ encoding: [0x02,0x10,0xb2,0xf3]
7 @ CHECK: vswp q1, q2 @ encoding: [0x44,0x20,0xb2,0xf3]
|
| /external/boringssl/linux-arm/crypto/aes/ |
| H A D | bsaes-armv7.S | 1644 vswp d13,d12
1650 vswp d15,d14
1657 vswp d13,d12
1665 vswp d15,d14
1673 vswp d13,d12
1681 vswp d15,d14
1689 vswp d13,d12
1697 vswp d15,d14
1747 vswp d15,d14
1753 vswp d1
[all...] |
| /external/libavc/common/arm/ |
| H A D | ih264_iquant_itrans_recon_a9.s | 179 vswp d6, d7 @Reverse positions of x2 and x3
186 vswp d12, d13
204 vswp d16, d17 @Reverse positions of x2 and x3
209 vswp d22, d23
353 vswp d6, d7 @Reverse positions of x2 and x3
361 vswp d12, d13
379 vswp d16, d17 @Reverse positions of x2 and x3
385 vswp d22, d23
601 vswp d1, d8 @ Q0/Q1 = Row order x0/x1
602 vswp d
[all...] |
| H A D | ih264_ihadamard_scaling_a9.s | 126 vswp d5, d8 @Q2 = x4, Q4 = x6
127 vswp d7, d10 @Q3 = x5, Q5 = x7
|
| H A D | ih264_resi_trans_quant_a9.s | 500 vswp d15, d18
501 vswp d17, d20
|
| /external/libhevc/common/arm/ |
| H A D | ihevc_itrans_recon_8x8.s | 528 vswp d3,d6
531 vswp d5,d8
762 vswp d3,d6
765 vswp d5,d8
852 vswp d11,d14
853 vswp d13,d16
|
| H A D | ihevc_itrans_recon_16x16.s | 1070 vswp d5,d18
1071 vswp d23,d14
1072 vswp d13,d20
1073 vswp d31,d8
|
| H A D | ihevc_itrans_recon_32x32.s | 2752 vswp d13,d16
2753 vswp d21,d24
2754 vswp d15,d18
2755 vswp d23,d26
2817 vswp d13,d16
2818 vswp d21,d24
2819 vswp d15,d18
2820 vswp d23,d26
|
| /external/libmpeg2/common/arm/ |
| H A D | impeg2_idct.s | 796 vswp d3, d6
799 vswp d5, d8
1034 vswp d3, d6
1037 vswp d5, d8
1124 vswp d11, d14
1125 vswp d13, d16
|
| /external/libvpx/libvpx/vpx_dsp/arm/ |
| H A D | loopfilter_8_neon.asm | 479 ; do the 2 vswp.
480 vswp d0, d4 ; op2
481 vswp d5, d17 ; oq2
|
| H A D | vpx_convolve8_avg_neon_asm.asm | 93 vswp d17, d18
|
| H A D | vpx_convolve8_neon_asm.asm | 93 vswp d17, d18
|
| H A D | loopfilter_16_neon.asm | 219 vswp d23, d25
|
| /external/boringssl/src/crypto/aes/asm/ |
| H A D | bsaes-armv7.pl | 1711 vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")`
1728 vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")`
1781 vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")`
2126 vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")`
2143 vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")`
2196 vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")`
2406 vswp `&Dhi("@XMM[6]")`,`&Dlo("@XMM[6]")`
|
| /external/libjpeg-turbo/simd/ |
| H A D | jsimd_arm_neon.S | 803 vswp d28, d21
804 vswp d26, d19
807 vswp d30, d23
809 vswp d24, d17
2050 vswp d30, d23
2051 vswp d24, d17
2052 vswp d26, d19
2055 vswp d28, d21
|
| /external/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 5981 void vswp(Condition cond, DataType dt, DRegister rd, DRegister rm);
5982 void vswp(DataType dt, DRegister rd, DRegister rm) { vswp(al, dt, rd, rm); } function in class:vixl::aarch32::Assembler
5983 void vswp(DRegister rd, DRegister rm) { function in class:vixl::aarch32::Assembler
5984 vswp(al, kDataTypeValueNone, rd, rm);
5986 void vswp(Condition cond, DRegister rd, DRegister rm) { function in class:vixl::aarch32::Assembler
5987 vswp(cond, kDataTypeValueNone, rd, rm);
5990 void vswp(Condition cond, DataType dt, QRegister rd, QRegister rm);
5991 void vswp(DataType dt, QRegister rd, QRegister rm) { vswp(a function in class:vixl::aarch32::Assembler
5992 void vswp(QRegister rd, QRegister rm) { function in class:vixl::aarch32::Assembler
5995 void vswp(Condition cond, QRegister rd, QRegister rm) { function in class:vixl::aarch32::Assembler
[all...] |
| H A D | disasm-aarch32.h | 2476 void vswp(Condition cond, DataType dt, DRegister rd, DRegister rm);
2478 void vswp(Condition cond, DataType dt, QRegister rd, QRegister rm);
|
| H A D | assembler-aarch32.cc | 26200 void Assembler::vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) { function in class:vixl::aarch32::Assembler
26218 Delegate(kVswp, &Assembler::vswp, cond, dt, rd, rm);
26221 void Assembler::vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) { function in class:vixl::aarch32::Assembler
26239 Delegate(kVswp, &Assembler::vswp, cond, dt, rd, rm);
|
| /external/boringssl/src/crypto/poly1305/ |
| H A D | poly1305_arm_asm.S | 673 # asm 1: vswp <d23=reg128#2%bot,<d01=reg128#12%top
674 # asm 2: vswp <d23=d2,<d01=d23
675 vswp d2,d23 label
|
| /external/v8/src/arm/ |
| H A D | assembler-arm.h | 1316 // Currently, vswp supports only D0 to D31.
1317 void vswp(DwVfpRegister srcdst0, DwVfpRegister srcdst1);
|
| H A D | assembler-arm.cc | 3906 void Assembler::vswp(DwVfpRegister srcdst0, DwVfpRegister srcdst1) { function in class:v8::internal::Assembler
|
| /external/libavc/encoder/arm/ |
| H A D | ime_distortion_metrics_a9q.s | 1045 vswp d10, d11 @I rearrange so that the q4 and q5 add properly
1164 vswp d10, d11 @I rearrange so that the q4 and q5 add properly
|
| /external/v8/src/compiler/arm/ |
| H A D | code-generator-arm.cc | 1978 __ vswp(src, dst);
|
| /external/valgrind/none/tests/arm/ |
| H A D | neon128.stdout.exp | 2151 vswp q0, q1 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
2152 vswp q0, q1 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
2154 vswp q1, q0 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
2155 vswp q1, q0 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
2157 vswp q10, q11 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
2158 vswp q10, q11 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
2160 vswp q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
2161 vswp q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
2163 vswp q1, q0 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
2164 vswp q
[all...] |
| H A D | neon64.stdout.exp | 3394 vswp d0, d1 :: Qm 0x34343434 0x34343434 Qn 0x07060504 0x03020100 Qm (i8)0x00000012 Qn (i8)0x00000034
3395 vswp d0, d1 :: Qm 0x34343434 0x34343434 Qn 0x07060504 0x03020100 Qm (i8)0x00000012 Qn (i8)0x00000034
3396 vswp d1, d0 :: Qm 0x34343434 0x34343434 Qn 0x07060504 0x03020100 Qm (i8)0x00000012 Qn (i8)0x00000034
3397 vswp d1, d0 :: Qm 0x34343434 0x34343434 Qn 0x07060504 0x03020100 Qm (i8)0x00000012 Qn (i8)0x00000034
3398 vswp d10, d11 :: Qm 0x34343434 0x34343434 Qn 0x07060504 0x03020100 Qm (i8)0x00000012 Qn (i8)0x00000034
3399 vswp d10, d11 :: Qm 0x34343434 0x34343434 Qn 0x07060504 0x03020100 Qm (i8)0x00000012 Qn (i8)0x00000034
3400 vswp d0, d1 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x07060504 0x03020100 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
3401 vswp d0, d1 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x07060504 0x03020100 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
3402 vswp d1, d0 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x07060504 0x03020100 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
3403 vswp d
[all...] |