1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _DRM_MODE_H 20#define _DRM_MODE_H 21#include "drm.h" 22#ifdef __cplusplus 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#endif 25#define DRM_DISPLAY_INFO_LEN 32 26#define DRM_CONNECTOR_NAME_LEN 32 27#define DRM_DISPLAY_MODE_LEN 32 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define DRM_PROP_NAME_LEN 32 30#define DRM_MODE_TYPE_BUILTIN (1 << 0) 31#define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN) 32#define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN) 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define DRM_MODE_TYPE_PREFERRED (1 << 3) 35#define DRM_MODE_TYPE_DEFAULT (1 << 4) 36#define DRM_MODE_TYPE_USERDEF (1 << 5) 37#define DRM_MODE_TYPE_DRIVER (1 << 6) 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define DRM_MODE_FLAG_PHSYNC (1 << 0) 40#define DRM_MODE_FLAG_NHSYNC (1 << 1) 41#define DRM_MODE_FLAG_PVSYNC (1 << 2) 42#define DRM_MODE_FLAG_NVSYNC (1 << 3) 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define DRM_MODE_FLAG_INTERLACE (1 << 4) 45#define DRM_MODE_FLAG_DBLSCAN (1 << 5) 46#define DRM_MODE_FLAG_CSYNC (1 << 6) 47#define DRM_MODE_FLAG_PCSYNC (1 << 7) 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define DRM_MODE_FLAG_NCSYNC (1 << 8) 50#define DRM_MODE_FLAG_HSKEW (1 << 9) 51#define DRM_MODE_FLAG_BCAST (1 << 10) 52#define DRM_MODE_FLAG_PIXMUX (1 << 11) 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define DRM_MODE_FLAG_DBLCLK (1 << 12) 55#define DRM_MODE_FLAG_CLKDIV2 (1 << 13) 56#define DRM_MODE_FLAG_3D_MASK (0x1f << 14) 57#define DRM_MODE_FLAG_3D_NONE (0 << 14) 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14) 60#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14) 61#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14) 62#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14) 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14) 65#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14) 66#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14) 67#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14) 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define DRM_MODE_PICTURE_ASPECT_NONE 0 70#define DRM_MODE_PICTURE_ASPECT_4_3 1 71#define DRM_MODE_PICTURE_ASPECT_16_9 2 72#define DRM_MODE_FLAG_PIC_AR_MASK (0x0F << 19) 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define DRM_MODE_FLAG_PIC_AR_NONE (DRM_MODE_PICTURE_ASPECT_NONE << 19) 75#define DRM_MODE_FLAG_PIC_AR_4_3 (DRM_MODE_PICTURE_ASPECT_4_3 << 19) 76#define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19) 77#define DRM_MODE_DPMS_ON 0 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79#define DRM_MODE_DPMS_STANDBY 1 80#define DRM_MODE_DPMS_SUSPEND 2 81#define DRM_MODE_DPMS_OFF 3 82#define DRM_MODE_SCALE_NONE 0 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84#define DRM_MODE_SCALE_FULLSCREEN 1 85#define DRM_MODE_SCALE_CENTER 2 86#define DRM_MODE_SCALE_ASPECT 3 87#define DRM_MODE_DITHERING_OFF 0 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89#define DRM_MODE_DITHERING_ON 1 90#define DRM_MODE_DITHERING_AUTO 2 91#define DRM_MODE_DIRTY_OFF 0 92#define DRM_MODE_DIRTY_ON 1 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94#define DRM_MODE_DIRTY_ANNOTATE 2 95struct drm_mode_modeinfo { 96 __u32 clock; 97 __u16 hdisplay; 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 __u16 hsync_start; 100 __u16 hsync_end; 101 __u16 htotal; 102 __u16 hskew; 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 __u16 vdisplay; 105 __u16 vsync_start; 106 __u16 vsync_end; 107 __u16 vtotal; 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 __u16 vscan; 110 __u32 vrefresh; 111 __u32 flags; 112 __u32 type; 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 char name[DRM_DISPLAY_MODE_LEN]; 115}; 116struct drm_mode_card_res { 117 __u64 fb_id_ptr; 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 __u64 crtc_id_ptr; 120 __u64 connector_id_ptr; 121 __u64 encoder_id_ptr; 122 __u32 count_fbs; 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 __u32 count_crtcs; 125 __u32 count_connectors; 126 __u32 count_encoders; 127 __u32 min_width; 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 __u32 max_width; 130 __u32 min_height; 131 __u32 max_height; 132}; 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134struct drm_mode_crtc { 135 __u64 set_connectors_ptr; 136 __u32 count_connectors; 137 __u32 crtc_id; 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 __u32 fb_id; 140 __u32 x; 141 __u32 y; 142 __u32 gamma_size; 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 __u32 mode_valid; 145 struct drm_mode_modeinfo mode; 146}; 147#define DRM_MODE_PRESENT_TOP_FIELD (1 << 0) 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149#define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1) 150struct drm_mode_set_plane { 151 __u32 plane_id; 152 __u32 crtc_id; 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 __u32 fb_id; 155 __u32 flags; 156 __s32 crtc_x; 157 __s32 crtc_y; 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 __u32 crtc_w; 160 __u32 crtc_h; 161 __u32 src_x; 162 __u32 src_y; 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 __u32 src_h; 165 __u32 src_w; 166}; 167struct drm_mode_get_plane { 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 __u32 plane_id; 170 __u32 crtc_id; 171 __u32 fb_id; 172 __u32 possible_crtcs; 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 __u32 gamma_size; 175 __u32 count_format_types; 176 __u64 format_type_ptr; 177}; 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179struct drm_mode_get_plane_res { 180 __u64 plane_id_ptr; 181 __u32 count_planes; 182}; 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184#define DRM_MODE_ENCODER_NONE 0 185#define DRM_MODE_ENCODER_DAC 1 186#define DRM_MODE_ENCODER_TMDS 2 187#define DRM_MODE_ENCODER_LVDS 3 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189#define DRM_MODE_ENCODER_TVDAC 4 190#define DRM_MODE_ENCODER_VIRTUAL 5 191#define DRM_MODE_ENCODER_DSI 6 192#define DRM_MODE_ENCODER_DPMST 7 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194#define DRM_MODE_ENCODER_DPI 8 195struct drm_mode_get_encoder { 196 __u32 encoder_id; 197 __u32 encoder_type; 198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 __u32 crtc_id; 200 __u32 possible_crtcs; 201 __u32 possible_clones; 202}; 203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204enum drm_mode_subconnector { 205 DRM_MODE_SUBCONNECTOR_Automatic = 0, 206 DRM_MODE_SUBCONNECTOR_Unknown = 0, 207 DRM_MODE_SUBCONNECTOR_DVID = 3, 208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 DRM_MODE_SUBCONNECTOR_DVIA = 4, 210 DRM_MODE_SUBCONNECTOR_Composite = 5, 211 DRM_MODE_SUBCONNECTOR_SVIDEO = 6, 212 DRM_MODE_SUBCONNECTOR_Component = 8, 213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 DRM_MODE_SUBCONNECTOR_SCART = 9, 215}; 216#define DRM_MODE_CONNECTOR_Unknown 0 217#define DRM_MODE_CONNECTOR_VGA 1 218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219#define DRM_MODE_CONNECTOR_DVII 2 220#define DRM_MODE_CONNECTOR_DVID 3 221#define DRM_MODE_CONNECTOR_DVIA 4 222#define DRM_MODE_CONNECTOR_Composite 5 223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224#define DRM_MODE_CONNECTOR_SVIDEO 6 225#define DRM_MODE_CONNECTOR_LVDS 7 226#define DRM_MODE_CONNECTOR_Component 8 227#define DRM_MODE_CONNECTOR_9PinDIN 9 228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229#define DRM_MODE_CONNECTOR_DisplayPort 10 230#define DRM_MODE_CONNECTOR_HDMIA 11 231#define DRM_MODE_CONNECTOR_HDMIB 12 232#define DRM_MODE_CONNECTOR_TV 13 233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234#define DRM_MODE_CONNECTOR_eDP 14 235#define DRM_MODE_CONNECTOR_VIRTUAL 15 236#define DRM_MODE_CONNECTOR_DSI 16 237#define DRM_MODE_CONNECTOR_DPI 17 238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239struct drm_mode_get_connector { 240 __u64 encoders_ptr; 241 __u64 modes_ptr; 242 __u64 props_ptr; 243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 __u64 prop_values_ptr; 245 __u32 count_modes; 246 __u32 count_props; 247 __u32 count_encoders; 248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 __u32 encoder_id; 250 __u32 connector_id; 251 __u32 connector_type; 252 __u32 connector_type_id; 253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 __u32 connection; 255 __u32 mm_width; 256 __u32 mm_height; 257 __u32 subpixel; 258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 __u32 pad; 260}; 261#define DRM_MODE_PROP_PENDING (1 << 0) 262#define DRM_MODE_PROP_RANGE (1 << 1) 263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264#define DRM_MODE_PROP_IMMUTABLE (1 << 2) 265#define DRM_MODE_PROP_ENUM (1 << 3) 266#define DRM_MODE_PROP_BLOB (1 << 4) 267#define DRM_MODE_PROP_BITMASK (1 << 5) 268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269#define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK) 270#define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 271#define DRM_MODE_PROP_TYPE(n) ((n) << 6) 272#define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274#define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 275#define DRM_MODE_PROP_ATOMIC 0x80000000 276struct drm_mode_property_enum { 277 __u64 value; 278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 char name[DRM_PROP_NAME_LEN]; 280}; 281struct drm_mode_get_property { 282 __u64 values_ptr; 283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 __u64 enum_blob_ptr; 285 __u32 prop_id; 286 __u32 flags; 287 char name[DRM_PROP_NAME_LEN]; 288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 __u32 count_values; 290 __u32 count_enum_blobs; 291}; 292struct drm_mode_connector_set_property { 293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 __u64 value; 295 __u32 prop_id; 296 __u32 connector_id; 297}; 298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299#define DRM_MODE_OBJECT_CRTC 0xcccccccc 300#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 301#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 302#define DRM_MODE_OBJECT_MODE 0xdededede 303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 305#define DRM_MODE_OBJECT_FB 0xfbfbfbfb 306#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 307#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309#define DRM_MODE_OBJECT_ANY 0 310struct drm_mode_obj_get_properties { 311 __u64 props_ptr; 312 __u64 prop_values_ptr; 313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 __u32 count_props; 315 __u32 obj_id; 316 __u32 obj_type; 317}; 318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319struct drm_mode_obj_set_property { 320 __u64 value; 321 __u32 prop_id; 322 __u32 obj_id; 323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 __u32 obj_type; 325}; 326struct drm_mode_get_blob { 327 __u32 blob_id; 328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 __u32 length; 330 __u64 data; 331}; 332struct drm_mode_fb_cmd { 333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 __u32 fb_id; 335 __u32 width; 336 __u32 height; 337 __u32 pitch; 338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 __u32 bpp; 340 __u32 depth; 341 __u32 handle; 342}; 343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344#define DRM_MODE_FB_INTERLACED (1 << 0) 345#define DRM_MODE_FB_MODIFIERS (1 << 1) 346struct drm_mode_fb_cmd2 { 347 __u32 fb_id; 348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 __u32 width; 350 __u32 height; 351 __u32 pixel_format; 352 __u32 flags; 353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 __u32 handles[4]; 355 __u32 pitches[4]; 356 __u32 offsets[4]; 357 __u64 modifier[4]; 358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359}; 360#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 361#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 362#define DRM_MODE_FB_DIRTY_FLAGS 0x03 363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 365struct drm_mode_fb_dirty_cmd { 366 __u32 fb_id; 367 __u32 flags; 368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 __u32 color; 370 __u32 num_clips; 371 __u64 clips_ptr; 372}; 373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374struct drm_mode_mode_cmd { 375 __u32 connector_id; 376 struct drm_mode_modeinfo mode; 377}; 378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379#define DRM_MODE_CURSOR_BO 0x01 380#define DRM_MODE_CURSOR_MOVE 0x02 381#define DRM_MODE_CURSOR_FLAGS 0x03 382struct drm_mode_cursor { 383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 __u32 flags; 385 __u32 crtc_id; 386 __s32 x; 387 __s32 y; 388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 __u32 width; 390 __u32 height; 391 __u32 handle; 392}; 393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394struct drm_mode_cursor2 { 395 __u32 flags; 396 __u32 crtc_id; 397 __s32 x; 398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 __s32 y; 400 __u32 width; 401 __u32 height; 402 __u32 handle; 403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 __s32 hot_x; 405 __s32 hot_y; 406}; 407struct drm_mode_crtc_lut { 408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409 __u32 crtc_id; 410 __u32 gamma_size; 411 __u64 red; 412 __u64 green; 413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414 __u64 blue; 415}; 416struct drm_color_ctm { 417 __s64 matrix[9]; 418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419}; 420struct drm_color_lut { 421 __u16 red; 422 __u16 green; 423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 424 __u16 blue; 425 __u16 reserved; 426}; 427#define DRM_MODE_PAGE_FLIP_EVENT 0x01 428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 429#define DRM_MODE_PAGE_FLIP_ASYNC 0x02 430#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 431#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8 432#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | DRM_MODE_PAGE_FLIP_TARGET_RELATIVE) 433/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 434#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_PAGE_FLIP_TARGET) 435struct drm_mode_crtc_page_flip { 436 __u32 crtc_id; 437 __u32 fb_id; 438/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 439 __u32 flags; 440 __u32 reserved; 441 __u64 user_data; 442}; 443/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 444struct drm_mode_crtc_page_flip_target { 445 __u32 crtc_id; 446 __u32 fb_id; 447 __u32 flags; 448/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 449 __u32 sequence; 450 __u64 user_data; 451}; 452struct drm_mode_create_dumb { 453/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 454 __u32 height; 455 __u32 width; 456 __u32 bpp; 457 __u32 flags; 458/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 459 __u32 handle; 460 __u32 pitch; 461 __u64 size; 462}; 463/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 464struct drm_mode_map_dumb { 465 __u32 handle; 466 __u32 pad; 467 __u64 offset; 468/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 469}; 470struct drm_mode_destroy_dumb { 471 __u32 handle; 472}; 473/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 474#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 475#define DRM_MODE_ATOMIC_NONBLOCK 0x0200 476#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 477#define DRM_MODE_ATOMIC_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_NONBLOCK | DRM_MODE_ATOMIC_ALLOW_MODESET) 478/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 479struct drm_mode_atomic { 480 __u32 flags; 481 __u32 count_objs; 482 __u64 objs_ptr; 483/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 484 __u64 count_props_ptr; 485 __u64 props_ptr; 486 __u64 prop_values_ptr; 487 __u64 reserved; 488/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 489 __u64 user_data; 490}; 491struct drm_mode_create_blob { 492 __u64 data; 493/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 494 __u32 length; 495 __u32 blob_id; 496}; 497struct drm_mode_destroy_blob { 498/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 499 __u32 blob_id; 500}; 501#ifdef __cplusplus 502#endif 503/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 504#endif 505