1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _UAPIVFIO_H 20#define _UAPIVFIO_H 21#include <linux/types.h> 22#include <linux/ioctl.h> 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define VFIO_API_VERSION 0 25#define VFIO_TYPE1_IOMMU 1 26#define VFIO_SPAPR_TCE_IOMMU 2 27#define VFIO_TYPE1v2_IOMMU 3 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define VFIO_DMA_CC_IOMMU 4 30#define VFIO_EEH 5 31#define VFIO_TYPE1_NESTING_IOMMU 6 32#define VFIO_SPAPR_TCE_v2_IOMMU 7 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define VFIO_NOIOMMU_IOMMU 8 35#define VFIO_TYPE (';') 36#define VFIO_BASE 100 37struct vfio_info_cap_header { 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 __u16 id; 40 __u16 version; 41 __u32 next; 42}; 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0) 45#define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1) 46#define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2) 47struct vfio_group_status { 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 __u32 argsz; 50 __u32 flags; 51#define VFIO_GROUP_FLAGS_VIABLE (1 << 0) 52#define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1) 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54}; 55#define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3) 56#define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4) 57#define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5) 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6) 60struct vfio_device_info { 61 __u32 argsz; 62 __u32 flags; 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define VFIO_DEVICE_FLAGS_RESET (1 << 0) 65#define VFIO_DEVICE_FLAGS_PCI (1 << 1) 66#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) 67#define VFIO_DEVICE_FLAGS_AMBA (1 << 3) 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 __u32 num_regions; 70 __u32 num_irqs; 71}; 72#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7) 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define VFIO_DEVICE_API_PCI_STRING "vfio-pci" 75#define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform" 76#define VFIO_DEVICE_API_AMBA_STRING "vfio-amba" 77struct vfio_region_info { 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 __u32 argsz; 80 __u32 flags; 81#define VFIO_REGION_INFO_FLAG_READ (1 << 0) 82#define VFIO_REGION_INFO_FLAG_WRITE (1 << 1) 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84#define VFIO_REGION_INFO_FLAG_MMAP (1 << 2) 85#define VFIO_REGION_INFO_FLAG_CAPS (1 << 3) 86 __u32 index; 87 __u32 cap_offset; 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 __u64 size; 90 __u64 offset; 91}; 92#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8) 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94#define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1 95struct vfio_region_sparse_mmap_area { 96 __u64 offset; 97 __u64 size; 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99}; 100struct vfio_region_info_cap_sparse_mmap { 101 struct vfio_info_cap_header header; 102 __u32 nr_areas; 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 __u32 reserved; 105 struct vfio_region_sparse_mmap_area areas[]; 106}; 107#define VFIO_REGION_INFO_CAP_TYPE 2 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109struct vfio_region_info_cap_type { 110 struct vfio_info_cap_header header; 111 __u32 type; 112 __u32 subtype; 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114}; 115#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31) 116#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff) 117#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1) 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2) 120#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3) 121struct vfio_irq_info { 122 __u32 argsz; 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 __u32 flags; 125#define VFIO_IRQ_INFO_EVENTFD (1 << 0) 126#define VFIO_IRQ_INFO_MASKABLE (1 << 1) 127#define VFIO_IRQ_INFO_AUTOMASKED (1 << 2) 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129#define VFIO_IRQ_INFO_NORESIZE (1 << 3) 130 __u32 index; 131 __u32 count; 132}; 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134#define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9) 135struct vfio_irq_set { 136 __u32 argsz; 137 __u32 flags; 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139#define VFIO_IRQ_SET_DATA_NONE (1 << 0) 140#define VFIO_IRQ_SET_DATA_BOOL (1 << 1) 141#define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2) 142#define VFIO_IRQ_SET_ACTION_MASK (1 << 3) 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144#define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4) 145#define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5) 146 __u32 index; 147 __u32 start; 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 __u32 count; 150 __u8 data[]; 151}; 152#define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10) 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154#define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_DATA_BOOL | VFIO_IRQ_SET_DATA_EVENTFD) 155#define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | VFIO_IRQ_SET_ACTION_UNMASK | VFIO_IRQ_SET_ACTION_TRIGGER) 156#define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11) 157enum { 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 VFIO_PCI_BAR0_REGION_INDEX, 160 VFIO_PCI_BAR1_REGION_INDEX, 161 VFIO_PCI_BAR2_REGION_INDEX, 162 VFIO_PCI_BAR3_REGION_INDEX, 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 VFIO_PCI_BAR4_REGION_INDEX, 165 VFIO_PCI_BAR5_REGION_INDEX, 166 VFIO_PCI_ROM_REGION_INDEX, 167 VFIO_PCI_CONFIG_REGION_INDEX, 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 VFIO_PCI_VGA_REGION_INDEX, 170 VFIO_PCI_NUM_REGIONS = 9 171}; 172enum { 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 VFIO_PCI_INTX_IRQ_INDEX, 175 VFIO_PCI_MSI_IRQ_INDEX, 176 VFIO_PCI_MSIX_IRQ_INDEX, 177 VFIO_PCI_ERR_IRQ_INDEX, 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 VFIO_PCI_REQ_IRQ_INDEX, 180 VFIO_PCI_NUM_IRQS 181}; 182struct vfio_pci_dependent_device { 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 __u32 group_id; 185 __u16 segment; 186 __u8 bus; 187 __u8 devfn; 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189}; 190struct vfio_pci_hot_reset_info { 191 __u32 argsz; 192 __u32 flags; 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 __u32 count; 195 struct vfio_pci_dependent_device devices[]; 196}; 197#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199struct vfio_pci_hot_reset { 200 __u32 argsz; 201 __u32 flags; 202 __u32 count; 203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 __s32 group_fds[]; 205}; 206#define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13) 207struct vfio_iommu_type1_info { 208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 __u32 argsz; 210 __u32 flags; 211#define VFIO_IOMMU_INFO_PGSIZES (1 << 0) 212 __u64 iova_pgsizes; 213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214}; 215#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 216struct vfio_iommu_type1_dma_map { 217 __u32 argsz; 218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 __u32 flags; 220#define VFIO_DMA_MAP_FLAG_READ (1 << 0) 221#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1) 222 __u64 vaddr; 223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 __u64 iova; 225 __u64 size; 226}; 227#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13) 228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229struct vfio_iommu_type1_dma_unmap { 230 __u32 argsz; 231 __u32 flags; 232 __u64 iova; 233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 __u64 size; 235}; 236#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14) 237#define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15) 238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239#define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16) 240struct vfio_iommu_spapr_tce_ddw_info { 241 __u64 pgsizes; 242 __u32 max_dynamic_windows_supported; 243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 __u32 levels; 245}; 246struct vfio_iommu_spapr_tce_info { 247 __u32 argsz; 248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 __u32 flags; 250#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) 251 __u32 dma32_window_start; 252 __u32 dma32_window_size; 253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 struct vfio_iommu_spapr_tce_ddw_info ddw; 255}; 256#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 257struct vfio_eeh_pe_err { 258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 __u32 type; 260 __u32 func; 261 __u64 addr; 262 __u64 mask; 263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264}; 265struct vfio_eeh_pe_op { 266 __u32 argsz; 267 __u32 flags; 268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 __u32 op; 270 union { 271 struct vfio_eeh_pe_err err; 272 }; 273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274}; 275#define VFIO_EEH_PE_DISABLE 0 276#define VFIO_EEH_PE_ENABLE 1 277#define VFIO_EEH_PE_UNFREEZE_IO 2 278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279#define VFIO_EEH_PE_UNFREEZE_DMA 3 280#define VFIO_EEH_PE_GET_STATE 4 281#define VFIO_EEH_PE_STATE_NORMAL 0 282#define VFIO_EEH_PE_STATE_RESET 1 283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284#define VFIO_EEH_PE_STATE_STOPPED 2 285#define VFIO_EEH_PE_STATE_STOPPED_DMA 4 286#define VFIO_EEH_PE_STATE_UNAVAIL 5 287#define VFIO_EEH_PE_RESET_DEACTIVATE 5 288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289#define VFIO_EEH_PE_RESET_HOT 6 290#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 291#define VFIO_EEH_PE_CONFIGURE 8 292#define VFIO_EEH_PE_INJECT_ERR 9 293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21) 295struct vfio_iommu_spapr_register_memory { 296 __u32 argsz; 297 __u32 flags; 298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 __u64 vaddr; 300 __u64 size; 301}; 302#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17) 303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18) 305struct vfio_iommu_spapr_tce_create { 306 __u32 argsz; 307 __u32 flags; 308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 __u32 page_shift; 310 __u32 __resv1; 311 __u64 window_size; 312 __u32 levels; 313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 __u32 __resv2; 315 __u64 start_addr; 316}; 317#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19) 318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319struct vfio_iommu_spapr_tce_remove { 320 __u32 argsz; 321 __u32 flags; 322 __u64 start_addr; 323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324}; 325#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20) 326#endif 327