1#------------------------------------------------------------------------------
2#
3# Copyright (c) 2011, ARM Limited. All rights reserved.
4#
5# This program and the accompanying materials
6# are licensed and made available under the terms and conditions of the BSD License
7# which accompanies this distribution.  The full text of the license may be found at
8# http://opensource.org/licenses/bsd-license.php
9#
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12#
13#------------------------------------------------------------------------------
14
15.text
16.align 2
17
18GCC_ASM_EXPORT (ArmReadCntFrq)
19GCC_ASM_EXPORT (ArmWriteCntFrq)
20GCC_ASM_EXPORT (ArmReadCntPct)
21GCC_ASM_EXPORT (ArmReadCntkCtl)
22GCC_ASM_EXPORT (ArmWriteCntkCtl)
23GCC_ASM_EXPORT (ArmReadCntpTval)
24GCC_ASM_EXPORT (ArmWriteCntpTval)
25GCC_ASM_EXPORT (ArmReadCntpCtl)
26GCC_ASM_EXPORT (ArmWriteCntpCtl)
27GCC_ASM_EXPORT (ArmReadCntvTval)
28GCC_ASM_EXPORT (ArmWriteCntvTval)
29GCC_ASM_EXPORT (ArmReadCntvCtl)
30GCC_ASM_EXPORT (ArmWriteCntvCtl)
31GCC_ASM_EXPORT (ArmReadCntvCt)
32GCC_ASM_EXPORT (ArmReadCntpCval)
33GCC_ASM_EXPORT (ArmWriteCntpCval)
34GCC_ASM_EXPORT (ArmReadCntvCval)
35GCC_ASM_EXPORT (ArmWriteCntvCval)
36GCC_ASM_EXPORT (ArmReadCntvOff)
37GCC_ASM_EXPORT (ArmWriteCntvOff)
38
39ASM_PFX(ArmReadCntFrq):
40  mrc    p15, 0, r0, c14, c0, 0    @ Read CNTFRQ
41  bx     lr
42
43ASM_PFX(ArmWriteCntFrq):
44  mcr    p15, 0, r0, c14, c0, 0    @ Write to CNTFRQ
45  bx     lr
46
47ASM_PFX(ArmReadCntPct):
48  mrrc   p15, 0, r0, r1, c14       @ Read CNTPT (Physical counter register)
49  bx     lr
50
51ASM_PFX(ArmReadCntkCtl):
52  mrc    p15, 0, r0, c14, c1, 0    @ Read CNTK_CTL (Timer PL1 Control Register)
53  bx     lr
54
55ASM_PFX(ArmWriteCntkCtl):
56  mcr    p15, 0, r0, c14, c1, 0    @ Write to CNTK_CTL (Timer PL1 Control Register)
57  bx     lr
58
59ASM_PFX(ArmReadCntpTval):
60  mrc    p15, 0, r0, c14, c2, 0    @ Read CNTP_TVAL (PL1 physical timer value register)
61  bx     lr
62
63ASM_PFX(ArmWriteCntpTval):
64  mcr    p15, 0, r0, c14, c2, 0    @ Write to CNTP_TVAL (PL1 physical timer value register)
65  bx     lr
66
67ASM_PFX(ArmReadCntpCtl):
68  mrc    p15, 0, r0, c14, c2, 1    @ Read CNTP_CTL (PL1 Physical Timer Control Register)
69  bx     lr
70
71ASM_PFX(ArmWriteCntpCtl):
72  mcr    p15, 0, r0, c14, c2, 1    @ Write to  CNTP_CTL (PL1 Physical Timer Control Register)
73  bx     lr
74
75ASM_PFX(ArmReadCntvTval):
76  mrc    p15, 0, r0, c14, c3, 0    @ Read CNTV_TVAL (Virtual Timer Value register)
77  bx     lr
78
79ASM_PFX(ArmWriteCntvTval):
80  mcr    p15, 0, r0, c14, c3, 0    @ Write to CNTV_TVAL (Virtual Timer Value register)
81  bx     lr
82
83ASM_PFX(ArmReadCntvCtl):
84  mrc    p15, 0, r0, c14, c3, 1    @ Read CNTV_CTL (Virtual Timer Control Register)
85  bx     lr
86
87ASM_PFX(ArmWriteCntvCtl):
88  mcr    p15, 0, r0, c14, c3, 1    @ Write to CNTV_CTL (Virtual Timer Control Register)
89  bx     lr
90
91ASM_PFX(ArmReadCntvCt):
92  mrrc   p15, 1, r0, r1, c14       @ Read CNTVCT  (Virtual Count Register)
93  bx     lr
94
95ASM_PFX(ArmReadCntpCval):
96  mrrc   p15, 2, r0, r1, c14       @ Read CNTP_CTVAL (Physical Timer Compare Value Register)
97  bx     lr
98
99ASM_PFX(ArmWriteCntpCval):
100  mcrr   p15, 2, r0, r1, c14       @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)
101  bx     lr
102
103ASM_PFX(ArmReadCntvCval):
104  mrrc   p15, 3, r0, r1, c14       @ Read CNTV_CTVAL (Virtual Timer Compare Value Register)
105  bx     lr
106
107ASM_PFX(ArmWriteCntvCval):
108  mcrr   p15, 3, r0, r1, c14       @ write to  CNTV_CTVAL (Virtual Timer Compare Value Register)
109  bx     lr
110
111ASM_PFX(ArmReadCntvOff):
112  mrrc   p15, 4, r0, r1, c14       @ Read CNTVOFF (virtual Offset register)
113  bx     lr
114
115ASM_PFX(ArmWriteCntvOff):
116  mcrr   p15, 4, r0, r1, c14       @ Write to CNTVOFF (Virtual Offset register)
117  bx     lr
118
119ASM_FUNCTION_REMOVE_IF_UNREFERENCED
120