1//// @file
2//
3// Copyright (c) 1999 - 2008, Intel Corporation. All rights reserved.<BR>
4//
5// This program and the accompanying materials
6// are licensed and made available under the terms and conditions
7// of the BSD License which accompanies this distribution.  The
8// full text of the license may be found at
9// http://opensource.org/licenses/bsd-license.php
10//
11// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13//
14////
15
16.file  "IpfThunk.s"
17
18#include  "IpfMacro.i"
19#include  "Ipf/IpfThunk.i"
20
21.align	0x10
22//-----------------------------------------------------------------------------
23//++
24// EfiIaEntryPoint
25//
26// Register physical address of Esal Data Area
27//
28// On Entry :
29//  in1 = ptr to legacy bios reg
30//  in2 = ptr to Call Stack
31//  in3 = Call Stack Size
32//
33// Return Value:
34//  r8 = SAL_SUCCESS
35//
36// As per static calling conventions.
37//
38//--
39//---------------------------------------------------------------------------
40PROCEDURE_ENTRY(EfiIaEntryPoint)
41
42	        alloc	      loc0 = 8,10,8,0;;
43
44	        mov	        out0 = r0;;
45          mov	        out1 = r0;;
46          mov	        out2 = r0;;
47          mov	        out3 = r0;;
48	        mov	        out4 = r0;;
49          mov	        out5 = r0;;
50          mov	        out6 = r0;;
51          mov	        out7 = r0;;
52
53	        mov	        loc1 = b0;;						        // save efi (b0)
54	        mov	        loc2 = psr;;					        // save efi (PSR)
55	        mov	        loc3 = gp;;						        // save efi (GP)
56	        mov	        loc4 = pr;;						        // save efi (PR)
57	        mov	        loc5 = sp;;						        // save efi (SP)
58	        mov	        loc6 = r13;;					        // save efi (TP)
59	        mov	        loc7 = ar.lc;;				        // save efi (LC)
60	        mov	        loc8 = ar.fpsr;;			        // save efi (FPSR)
61
62	        mov	        r8   = r0;; 						      // return status
63	        mov	        r9   = r0;; 						      // return value
64	        mov	        r10  = r0;;						        // return value
65	        mov	        r11  = r0;;						        // return value
66
67bios_int_func::
68	        rsm		      0x4000;;					            // i(14)=0, disable interrupt
69	        srlz.d;;
70	        srlz.i;;
71
72//---------------------//
73// save fp registers   //
74//---------------------//
75
76	        dep		      sp = 0,sp,0,4;;					      // align 16
77	        add		      sp = -16,sp;;						      // post decrement
78
79int_ip_1x::
80	        mov		      r2 = ip;;
81	        add		      r2 = (int_ip_1y - int_ip_1x),r2;;
82	        mov		      b7 = r2;;
83	        br		      save_fp_registers;;
84
85int_ip_1y::
86	        add		      sp    = 16,sp;;               // adjust (SP)
87	        mov		      loc9  = sp;;						      // save (SP)
88	        adds	      sp    = 0x10,in1;;				    // in1 + 0x10 = SP
89	        ld4		      sp    = [sp];;						    // SP
90	        adds	      r17   = 0x32,in1;;			      // in1 + 0x32 = SS
91	        ld2		      r17   = [r17];;					      // SS
92	        movl	      r2    = 0xffffffff;;			    // if no SS:SP, then define new SS:SP
93	        cmp.ne	    p6,p0 = sp,r2;;
94	        movl	      r2    = 0xffff;;
95	        cmp.ne.or   p6,p0 = r17,r2;;
96     (p6) br.sptk	bif_1;;
97
98	        mov		      sp    = in3;;						      // 16-bit stack pointer
99	        mov		      r2    = psr;;
100	        tbit.z	    p6,p7 = r2,17;;			          // psr.dt (Physical OR Virtual)
101
102bif_ip1x::
103	        mov		      r2    = in2;;						      // ia32 callback stack top
104	        mov		      r3    = in3;;						      // 16-bit stack pointer
105	        sub		      r2    = r2,r3;;
106	        shr.u	      r17   = r2,4;;					      // 16-bit stack segment
107
108bif_1::
109	        extr.u	    sp    = sp,0,16;;			        // SP (16-bit sp for legacy code)
110	        dep		      sp    = 0,sp,0,3;;		        // align 8
111	        cmp.eq	    p6,p0 = 0,sp;;                // if SP=0000 then wrap to 0x10000
112    (p6)	dep	        sp    = -1,sp,16,1;;
113	        shladd	    r2    = r17,4,sp;;			      // ESP = SS<<4+SP
114	        add		      r2    = -8,r2;;					      // post decrement 64 bit pointer
115	        add		      sp    = -8,sp;;					      // post decrement SP
116
117sale_ip1x::
118	        mov		      r18   = ip;;
119	        adds	      r18   = (sale_ip1y - sale_ip1x),r18;;
120	        sub		      r18   = r18,r2;;				      // return address - CS base
121	        add		      r18   = r18,sp;;				      // adjustment for stack
122	        shl		      r18   = r18,32;;
123	        movl	      r19   = 0xb80f66fa;;		      // CLI, JMPE xxxxxxxx
124	        or		      r18   = r18,r19;;
125	        st8		      [r2]  = r18;;					        // (FA,66,0F,B8,xx,xx,xx,xx)
126
127	        cmp.eq	    p6,p0 = 0,sp;;			          // if SP=0000 then wrap to 0x10000
128    (p6)	dep	        sp    = -1,sp,16,1;;
129	        shladd	    r2    = r17,4,sp;;			      // ESP=SS<<4+SP
130	        add		      r2    = -2,r2;;					      // post decrement 64 bit pointer
131	        add		      sp    = -2,sp;;					      // post decrement SP
132
133	        movl	      r18   = 0x8000000000000100;;	// CALL FAR function
134	        cmp.eq	    p6,p7 = in0,r18;;
135    (p6)	add	        r19   = 0x28,in1;;			      // in1 + 0x28 = CS
136    (p6)	ld2	        r18   = [r19],-4;;			      // CS
137    (p6)	st2	        [r2]  = r18,-2;;				      // in1 + 0x24 = EIP
138    (p6)	ld2	        r18   = [r19];;					      // EIP
139    (p6)	st2	        [r2]  = r18,-2;;				      //
140    (p6)	movl	      r18   = 0x9a90;;			        // nop, CALLFAR xxxx:yyyy
141
142    (p7)	movl	      r18   = 0xcd;;				        // INT xx
143    (p7)	dep	        r18   = in0,r18,8,8;;
144    	    st2	        [r2]  = r18;;							    // (CD,xx)
145
146	        mov	        r18   = r2;;	                // EIP for legacy execution
147
148//------------------------------//
149// flush 32 bytes legacy code	  //
150//------------------------------//
151
152	        dep		      r2    = 0,r2,0,5;;            // align to 32
153	        fc		      r2;;
154	        sync.i;;
155	        srlz.i;;
156	        srlz.d;;
157
158//------------------------------//
159// load legacy registers		    //
160//------------------------------//
161	        mov		      r2    = in1;;						      // IA32 BIOS register state
162	        ld4		      r8    = [r2],4;;						  // in1 + 0 = EAX
163	        ld4		      r9    = [r2],4;;						  // in1 + 4 = ECX
164	        ld4		      r10   = [r2],4;;					    // in1 + 8 = EDX
165	        ld4		      r11   = [r2],4;;					    // in1 + 12 = EBX
166
167	        add		      r2    = 4,r2;;						    // in1 + 16 = ESP (skip)
168
169	        ld4		      r13   = [r2],4;;					    // in1 + 20 = EBP
170	        ld4		      r14   = [r2],4;;					    // in1 + 24 = ESI
171	        ld4		      r15   = [r2],4;;					    // in1 + 28 = EDI
172	        ld4		      r3    = [r2],4;;						  // in1 + 32 = EFLAGS
173	        mov		      ar.eflag = r3;;
174
175	        add		      r2    = 4,r2;;						    // in1 + 36 = EIP (skip)
176	        add		      r2    = 2,r2;;						    // in1 + 40 = CS (skip)
177
178	        ld2		      r16   = [r2],2;;					    // in1 + 42 = DS, (r16 = GS,FS,ES,DS)
179	        movl	      r27   = 0xc93fffff00000000;;
180	        dep		      r27   = r16,r27,4,16;;				// r27 = DSD
181
182	        ld2		      r19   = [r2],2;;					    // in1 + 44 = ES
183	        dep		      r16   = r19,r16,16,16;;
184	        movl	      r24   = 0xc93fffff00000000;;
185	        dep		      r24   = r19,r24,4,16;;				// r24 = ESD
186
187	        ld2		      r19   = [r2],2;;					    // in1 + 46 = FS
188	        dep		      r16   = r19,r16,32,16;;
189	        movl	      r28   = 0xc93fffff00000000;;
190	        dep		      r28   = r19,r28,4,16;;				// r28 = FSD
191
192	        ld2		      r19   = [r2],2;;					    // in1 + 48 = GS
193	        dep		      r16   = r19,r16,48,16;;
194	        movl	      r29   = 0xc93fffff00000000;;
195	        dep		      r29   = r19,r29,4,16;;				// r29 = GSD
196
197	        mov		      r30   = r0;;						      // r30 = LDTD, clear NaT
198	        mov		      r31   = r0;;						      // r31 = GDTD, clear NaT
199
200	        dep		      r17   = r17,r17,16,16;;			  // CS = SS, (r17 = TSS,LDT,SS,CS)
201
202	        movl	      r3    = 0x0930ffff00000000;;
203	        dep		      r3    = r17,r3,4,16;;
204	        mov		      ar.csd = r3;;						      // ar25 = CSD
205	        mov		      ar.ssd = r3;;						      // ar26 = SSD
206
207//------------------------------//
208// give control to INT function //
209//------------------------------//
210
211	        br.call.sptk  b0  = execute_int_function;;
212
213//------------------------------//
214// store legacy registers		    //
215//------------------------------//
216
217	        mov		      r2    = in1;;
218	        st4		      [r2]  = r8,4;;						    // EAX
219	        st4		      [r2]  = r9,4;;						    // ECX
220	        st4		      [r2]  = r10,4;;					      // EDX
221	        st4		      [r2]  = r11,4;;					      // EBX
222
223	        add		      r2    = 4,r2;;						    // ESP (skip)
224
225	        st4		      [r2]  = r13,4;;					      // EBP
226	        st4		      [r2]  = r14,4;;					      // ESI
227	        st4		      [r2]  = r15,4;;					      // EDI
228
229	        mov		      r3    = ar.eflag;;
230	        st4		      [r2]  = r3,4;;						    // EFLAGS
231
232	        add		      r2    = 4,r2;;						    // EIP (skip)
233	        add		      r2    = 2,r2;;						    // CS (skip)
234
235	        st2		      [r2]  = r16,2;;					      // DS, (r16 = GS,FS,ES,DS)
236
237	        extr.u	    r3    = r16,16,16;;
238	        st2		      [r2]  = r3,2;;						    // ES
239
240	        extr.u	    r3    = r16,32,16;;
241	        st2		      [r2]  = r3,2;;						    // FS
242
243	        extr.u	    r3    = r16,48,16;;
244	        st2		      [r2]  = r3,2;;						    // GS
245
246//------------------------------//
247// restore fp registers 		    //
248//------------------------------//
249        	mov		      sp    = loc9;;						    // restore (SP)
250int_ip_2x::
251	        mov		      r2    = ip;;
252	        add		      r2    = (int_ip_2y - int_ip_2x),r2;;
253	        mov		      b7    = r2;;
254	        br		      restore_fp_registers;;
255
256int_ip_2y::
257	        mov		      r8    = r0;; 						      // return status
258	        mov		      r9    = r0;; 						      // return value
259	        mov		      r10   = r0;;						      // return value
260	        mov		      r11   = r0;;						      // return value
261
262	        mov		      ar.fpsr = loc8;;			        // restore efi (FPSR)
263	        mov		      ar.lc = loc7;;				        // restore efi (LC)
264	        mov		      r13   = loc6;;					      // restore efi (TP)
265	        mov		      sp    = loc5;;						    // restore efi (SP)
266	        mov		      pr    = loc4;;						    // restore efi (PR)
267	        mov		      gp    = loc3;;						    // restore efi (GP)
268	        mov		      psr.l = loc2;;				        // restore efi (PSR)
269	        srlz.d;;
270	        srlz.i;;
271	        mov		      b0    = loc1;;						    // restore efi (b0)
272	        mov		      ar.pfs = loc0;;
273	br.ret.sptk	b0;;					                        // return to efi
274
275PROCEDURE_EXIT (EfiIaEntryPoint)
276
277//==============================//
278//	EXECUTE_INT_FUNCTION		    //
279//==============================//
280// switch to virtual address	  //
281//------------------------------//
282
283execute_int_function::
284
285	        alloc	      r2 = 0,0,0,0;;				        // cfm.sof=0
286	        flushrs;;
287
288	        rsm		      0x2000;;						          // ic(13)=0 for control register programming
289	        srlz.d;;
290	        srlz.i;;
291
292	        mov		      r2  = psr;;
293	        dep		      r2  = -1,r2,34,1;;			      // set is(34)
294	        dep		      r2  = -1,r2,44,1;;			      // set bn(44)
295	        dep		      r2  = -1,r2,36,1;;			      // set it(36)
296	        dep		      r2  = -1,r2,27,1;;			      // set rt(27)
297	        dep		      r2  = -1,r2,17,1;;			      // set dt(17)
298	        dep		      r2  = 0,r2,3,1;;				      // reset ac(3)
299	        dep		      r2  = -1,r2,13,1;;			      // set ic(13)
300
301	        mov		      cr.ipsr = r2;;
302	        mov		      cr.ifs  = r0;;					      // clear interruption function state register
303	        mov		      cr.iip  = r18;;
304
305	        rfi;;									                    // go to legacy code execution
306
307//------------------------------//
308// back from legacy code		    //
309//------------------------------//
310// switch to physical address	  //
311//------------------------------//
312
313sale_ip1y::
314	        rsm		    0x6000;;						            // i(14)=0,ic(13)=0 for control reg programming
315	        srlz.d;;
316	        srlz.i;;
317
318	        mov		    r2  = psr;;
319	        dep		    r2  = -1,r2,44,1;;					      // set bn(44)
320	        dep		    r2  = 0,r2,36,1;;					      // reset it(36)
321	        dep		    r2  = 0,r2,27,1;;					      // reset rt(27)
322	        dep		    r2  = 0,r2,17,1;;					      // reset dt(17)
323	        dep		    r2  = -1,r2,13,1;;					      // set ic(13)
324	        mov		    cr.ipsr = r2;;
325
326sale_ip2x::
327	        mov		    r2  = ip;;
328	        add		    r2  = (sale_ip2y - sale_ip2x),r2;;
329	        mov		    cr.ifs = r0;;						        // clear interruption function state register
330	        mov		    cr.iip = r2;;
331	        rfi;;
332
333sale_ip2y::
334	        br.ret.sptk	b0;;				                  // return to SAL
335
336//------------------------------//
337// store fp registers		        //
338//------------------------------//
339save_fp_registers::
340	stf.spill [sp]=f2,-16;;  stf.spill [sp]=f3,-16;;
341	stf.spill [sp]=f4,-16;;  stf.spill [sp]=f5,-16;;  stf.spill [sp]=f6,-16;;  stf.spill [sp]=f7,-16;;
342	stf.spill [sp]=f8,-16;;  stf.spill [sp]=f9,-16;;  stf.spill [sp]=f10,-16;; stf.spill [sp]=f11,-16;;
343	stf.spill [sp]=f12,-16;; stf.spill [sp]=f13,-16;; stf.spill [sp]=f14,-16;; stf.spill [sp]=f15,-16;;
344	stf.spill [sp]=f16,-16;; stf.spill [sp]=f17,-16;; stf.spill [sp]=f18,-16;; stf.spill [sp]=f19,-16;;
345	stf.spill [sp]=f20,-16;; stf.spill [sp]=f21,-16;; stf.spill [sp]=f22,-16;; stf.spill [sp]=f23,-16;;
346	stf.spill [sp]=f24,-16;; stf.spill [sp]=f25,-16;; stf.spill [sp]=f26,-16;; stf.spill [sp]=f27,-16;;
347	stf.spill [sp]=f28,-16;; stf.spill [sp]=f29,-16;; stf.spill [sp]=f30,-16;; stf.spill [sp]=f31,-16;;
348	stf.spill [sp]=f32,-16;; stf.spill [sp]=f33,-16;; stf.spill [sp]=f34,-16;; stf.spill [sp]=f35,-16;;
349	stf.spill [sp]=f36,-16;; stf.spill [sp]=f37,-16;; stf.spill [sp]=f38,-16;; stf.spill [sp]=f39,-16;;
350	stf.spill [sp]=f40,-16;; stf.spill [sp]=f41,-16;; stf.spill [sp]=f42,-16;; stf.spill [sp]=f43,-16;;
351	stf.spill [sp]=f44,-16;; stf.spill [sp]=f45,-16;; stf.spill [sp]=f46,-16;; stf.spill [sp]=f47,-16;;
352	stf.spill [sp]=f48,-16;; stf.spill [sp]=f49,-16;; stf.spill [sp]=f50,-16;; stf.spill [sp]=f51,-16;;
353	stf.spill [sp]=f52,-16;; stf.spill [sp]=f53,-16;; stf.spill [sp]=f54,-16;; stf.spill [sp]=f55,-16;;
354	stf.spill [sp]=f56,-16;; stf.spill [sp]=f57,-16;; stf.spill [sp]=f58,-16;; stf.spill [sp]=f59,-16;;
355	stf.spill [sp]=f60,-16;; stf.spill [sp]=f61,-16;; stf.spill [sp]=f62,-16;; stf.spill [sp]=f63,-16;;
356	stf.spill [sp]=f64,-16;; stf.spill [sp]=f65,-16;; stf.spill [sp]=f66,-16;; stf.spill [sp]=f67,-16;;
357	stf.spill [sp]=f68,-16;; stf.spill [sp]=f69,-16;; stf.spill [sp]=f70,-16;; stf.spill [sp]=f71,-16;;
358	stf.spill [sp]=f72,-16;; stf.spill [sp]=f73,-16;; stf.spill [sp]=f74,-16;; stf.spill [sp]=f75,-16;;
359	stf.spill [sp]=f76,-16;; stf.spill [sp]=f77,-16;; stf.spill [sp]=f78,-16;; stf.spill [sp]=f79,-16;;
360	stf.spill [sp]=f80,-16;; stf.spill [sp]=f81,-16;; stf.spill [sp]=f82,-16;; stf.spill [sp]=f83,-16;;
361	stf.spill [sp]=f84,-16;; stf.spill [sp]=f85,-16;; stf.spill [sp]=f86,-16;; stf.spill [sp]=f87,-16;;
362	stf.spill [sp]=f88,-16;; stf.spill [sp]=f89,-16;; stf.spill [sp]=f90,-16;; stf.spill [sp]=f91,-16;;
363	stf.spill [sp]=f92,-16;; stf.spill [sp]=f93,-16;; stf.spill [sp]=f94,-16;; stf.spill [sp]=f95,-16;;
364	stf.spill [sp]=f96,-16;; stf.spill [sp]=f97,-16;; stf.spill [sp]=f98,-16;; stf.spill [sp]=f99,-16;;
365	stf.spill [sp]=f100,-16;;stf.spill [sp]=f101,-16;;stf.spill [sp]=f102,-16;;stf.spill [sp]=f103,-16;;
366	stf.spill [sp]=f104,-16;;stf.spill [sp]=f105,-16;;stf.spill [sp]=f106,-16;;stf.spill [sp]=f107,-16;;
367	stf.spill [sp]=f108,-16;;stf.spill [sp]=f109,-16;;stf.spill [sp]=f110,-16;;stf.spill [sp]=f111,-16;;
368	stf.spill [sp]=f112,-16;;stf.spill [sp]=f113,-16;;stf.spill [sp]=f114,-16;;stf.spill [sp]=f115,-16;;
369	stf.spill [sp]=f116,-16;;stf.spill [sp]=f117,-16;;stf.spill [sp]=f118,-16;;stf.spill [sp]=f119,-16;;
370	stf.spill [sp]=f120,-16;;stf.spill [sp]=f121,-16;;stf.spill [sp]=f122,-16;;stf.spill [sp]=f123,-16;;
371	stf.spill [sp]=f124,-16;;stf.spill [sp]=f125,-16;;stf.spill [sp]=f126,-16;;stf.spill [sp]=f127,-16;;
372	invala;;
373	br	b7;;
374
375//------------------------------//
376// restore fp registers	        //
377//------------------------------//
378restore_fp_registers::
379	ldf.fill f127=[sp],16;;ldf.fill f126=[sp],16;;ldf.fill f125=[sp],16;;ldf.fill f124=[sp],16;;
380	ldf.fill f123=[sp],16;;ldf.fill f122=[sp],16;;ldf.fill f121=[sp],16;;ldf.fill f120=[sp],16;;
381	ldf.fill f119=[sp],16;;ldf.fill f118=[sp],16;;ldf.fill f117=[sp],16;;ldf.fill f116=[sp],16;;
382	ldf.fill f115=[sp],16;;ldf.fill f114=[sp],16;;ldf.fill f113=[sp],16;;ldf.fill f112=[sp],16;;
383	ldf.fill f111=[sp],16;;ldf.fill f110=[sp],16;;ldf.fill f109=[sp],16;;ldf.fill f108=[sp],16;;
384	ldf.fill f107=[sp],16;;ldf.fill f106=[sp],16;;ldf.fill f105=[sp],16;;ldf.fill f104=[sp],16;;
385	ldf.fill f103=[sp],16;;ldf.fill f102=[sp],16;;ldf.fill f101=[sp],16;;ldf.fill f100=[sp],16;;
386	ldf.fill f99=[sp],16;; ldf.fill f98=[sp],16;; ldf.fill f97=[sp],16;; ldf.fill f96=[sp],16;;
387	ldf.fill f95=[sp],16;; ldf.fill f94=[sp],16;; ldf.fill f93=[sp],16;; ldf.fill f92=[sp],16;;
388	ldf.fill f91=[sp],16;; ldf.fill f90=[sp],16;; ldf.fill f89=[sp],16;; ldf.fill f88=[sp],16;;
389	ldf.fill f87=[sp],16;; ldf.fill f86=[sp],16;; ldf.fill f85=[sp],16;; ldf.fill f84=[sp],16;;
390	ldf.fill f83=[sp],16;; ldf.fill f82=[sp],16;; ldf.fill f81=[sp],16;; ldf.fill f80=[sp],16;;
391	ldf.fill f79=[sp],16;; ldf.fill f78=[sp],16;; ldf.fill f77=[sp],16;; ldf.fill f76=[sp],16;;
392	ldf.fill f75=[sp],16;; ldf.fill f74=[sp],16;; ldf.fill f73=[sp],16;; ldf.fill f72=[sp],16;;
393	ldf.fill f71=[sp],16;; ldf.fill f70=[sp],16;; ldf.fill f69=[sp],16;; ldf.fill f68=[sp],16;;
394	ldf.fill f67=[sp],16;; ldf.fill f66=[sp],16;; ldf.fill f65=[sp],16;; ldf.fill f64=[sp],16;;
395	ldf.fill f63=[sp],16;; ldf.fill f62=[sp],16;; ldf.fill f61=[sp],16;; ldf.fill f60=[sp],16;;
396	ldf.fill f59=[sp],16;; ldf.fill f58=[sp],16;; ldf.fill f57=[sp],16;; ldf.fill f56=[sp],16;;
397	ldf.fill f55=[sp],16;; ldf.fill f54=[sp],16;; ldf.fill f53=[sp],16;; ldf.fill f52=[sp],16;;
398	ldf.fill f51=[sp],16;; ldf.fill f50=[sp],16;; ldf.fill f49=[sp],16;; ldf.fill f48=[sp],16;;
399	ldf.fill f47=[sp],16;; ldf.fill f46=[sp],16;; ldf.fill f45=[sp],16;; ldf.fill f44=[sp],16;;
400	ldf.fill f43=[sp],16;; ldf.fill f42=[sp],16;; ldf.fill f41=[sp],16;; ldf.fill f40=[sp],16;;
401	ldf.fill f39=[sp],16;; ldf.fill f38=[sp],16;; ldf.fill f37=[sp],16;; ldf.fill f36=[sp],16;;
402	ldf.fill f35=[sp],16;; ldf.fill f34=[sp],16;; ldf.fill f33=[sp],16;; ldf.fill f32=[sp],16;;
403	ldf.fill f31=[sp],16;; ldf.fill f30=[sp],16;; ldf.fill f29=[sp],16;; ldf.fill f28=[sp],16;;
404	ldf.fill f27=[sp],16;; ldf.fill f26=[sp],16;; ldf.fill f25=[sp],16;; ldf.fill f24=[sp],16;;
405	ldf.fill f23=[sp],16;; ldf.fill f22=[sp],16;; ldf.fill f21=[sp],16;; ldf.fill f20=[sp],16;;
406	ldf.fill f19=[sp],16;; ldf.fill f18=[sp],16;; ldf.fill f17=[sp],16;; ldf.fill f16=[sp],16;;
407	ldf.fill f15=[sp],16;; ldf.fill f14=[sp],16;; ldf.fill f13=[sp],16;; ldf.fill f12=[sp],16;;
408	ldf.fill f11=[sp],16;; ldf.fill f10=[sp],16;; ldf.fill f9=[sp],16;;  ldf.fill f8=[sp],16;;
409	ldf.fill f7=[sp],16;;  ldf.fill f6=[sp],16;;  ldf.fill f5=[sp],16;;  ldf.fill f4=[sp],16;;
410	ldf.fill f3=[sp],16;;  ldf.fill f2=[sp],16;;
411	invala;;
412	br	b7;;
413
414//-----------------------------------------------------------------------------
415//++
416// EsalSetSalDataArea
417//
418// Register physical address of Esal Data Area
419//
420// On Entry :
421//  in0 = Reverse Thunk Address
422//  in1 = IntThunk Address
423//
424// Return Value:
425//  r8 = SAL_SUCCESS
426//
427// As per static calling conventions.
428//
429//--
430//---------------------------------------------------------------------------
431
432PROCEDURE_ENTRY (EsalSetSalDataArea)
433
434      NESTED_SETUP (4,8,0,0)
435
436EsalCalcStart1_3::
437      mov   r8   = ip;;
438      add   r8   = (ReverseThunkAddress - EsalCalcStart1_3), r8;;
439      st8   [r8] = in0;;
440
441EsalCalcStart1_4::
442      mov   r8   = ip;;
443      add   r8   = (IntThunkAddress - EsalCalcStart1_4), r8;;
444      st8   [r8] = in1;;
445
446      mov   r8   = r0;;
447
448      NESTED_RETURN
449
450PROCEDURE_EXIT (EsalSetSalDataArea)
451
452//-----------------------------------------------------------------------------
453//++
454// EsagGetReverseThunkAddress
455//
456// Register physical address of Esal Data Area
457//
458// On Entry :
459//  out0 = CodeStart
460//  out1 = CodeEnd
461//  out1 = ReverseThunkCode
462//
463// Return Value:
464//  r8 = SAL_SUCCESS
465//
466// As per static calling conventions.
467//
468//--
469//---------------------------------------------------------------------------
470
471PROCEDURE_ENTRY (EsalGetReverseThunkAddress)
472
473          NESTED_SETUP (4,8,0,0)
474
475EsalCalcStart1_31::
476          mov       r8 = ip;;
477          add       r8 = (Ia32CodeStart - EsalCalcStart1_31), r8;;
478          mov       r9 = r8;;
479
480EsalCalcStart1_41::
481          mov       r8  = ip;;
482          add       r8  = (Ia32CodeEnd - EsalCalcStart1_41), r8;;
483          mov       r10 = r8;;
484
485EsalCalcStart1_51::
486          mov       r8  = ip;;
487          add       r8  = (ReverseThunkAddress - EsalCalcStart1_51), r8;;
488          mov       r11 = r8;;
489          mov       r8  = r0;;
490
491          NESTED_RETURN
492
493PROCEDURE_EXIT (EsalGetReverseThunkAddress)
494
495
496.align 16
497PROCEDURE_ENTRY (InterruptRedirectionTemplate)
498          data8	    0x90CFCD08
499          data8	    0x90CFCD09
500          data8	    0x90CFCD0A
501          data8	    0x90CFCD0B
502          data8	    0x90CFCD0C
503          data8	    0x90CFCD0D
504          data8	    0x90CFCD0E
505          data8	    0x90CFCD0F
506PROCEDURE_EXIT (InterruptRedirectionTemplate)
507
508//------------------------------//
509// Reverse Thunk Code           //
510//------------------------------//
511
512Ia32CodeStart::
513          br.sptk.few Ia32CodeStart;;             // IPF CSM integration -Bug (Write This Code)
514ReverseThunkCode::
515	        data8	      0xb80f66fa			            // CLI, JMPE xxxx
516ReverseThunkAddress::
517	        data8	      0					                  // Return Address
518IntThunkAddress::
519	        data8	      0					                  // IntThunk Address
520Ia32CodeEnd::
521
522
523
524
525