1/** @file 2 3 This file contains the definination for host controller memory management routines. 4 5Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR> 6This program and the accompanying materials 7are licensed and made available under the terms and conditions of the BSD License 8which accompanies this distribution. The full text of the license may be found at 9http://opensource.org/licenses/bsd-license.php 10 11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14**/ 15 16#ifndef _EFI_EHCI_MEM_H_ 17#define _EFI_EHCI_MEM_H_ 18 19#define USB_HC_BIT(a) ((UINTN)(1 << (a))) 20 21#define USB_HC_BIT_IS_SET(Data, Bit) \ 22 ((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit))) 23 24#define USB_HC_HIGH_32BIT(Addr64) \ 25 ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF)) 26 27typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK; 28struct _USBHC_MEM_BLOCK { 29 UINT8 *Bits; // Bit array to record which unit is allocated 30 UINTN BitsLen; 31 UINT8 *Buf; 32 UINT8 *BufHost; 33 UINTN BufLen; // Memory size in bytes 34 VOID *Mapping; 35 USBHC_MEM_BLOCK *Next; 36}; 37 38// 39// USBHC_MEM_POOL is used to manage the memory used by USB 40// host controller. EHCI requires the control memory and transfer 41// data to be on the same 4G memory. 42// 43typedef struct _USBHC_MEM_POOL { 44 EFI_PCI_IO_PROTOCOL *PciIo; 45 BOOLEAN Check4G; 46 UINT32 Which4G; 47 USBHC_MEM_BLOCK *Head; 48} USBHC_MEM_POOL; 49 50// 51// Memory allocation unit, must be 2^n, n>4 52// 53#define USBHC_MEM_UNIT 64 54 55#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1) 56#define USBHC_MEM_DEFAULT_PAGES 16 57 58#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK)) 59 60// 61// Advance the byte and bit to the next bit, adjust byte accordingly. 62// 63#define NEXT_BIT(Byte, Bit) \ 64 do { \ 65 (Bit)++; \ 66 if ((Bit) > 7) { \ 67 (Byte)++; \ 68 (Bit) = 0; \ 69 } \ 70 } while (0) 71 72 73 74/** 75 Initialize the memory management pool for the host controller. 76 77 @param PciIo The PciIo that can be used to access the host controller. 78 @param Check4G Whether the host controller requires allocated memory 79 from one 4G address space. 80 @param Which4G The 4G memory area each memory allocated should be from. 81 82 @retval EFI_SUCCESS The memory pool is initialized. 83 @retval EFI_OUT_OF_RESOURCE Fail to init the memory pool. 84 85**/ 86USBHC_MEM_POOL * 87UsbHcInitMemPool ( 88 IN EFI_PCI_IO_PROTOCOL *PciIo, 89 IN BOOLEAN Check4G, 90 IN UINT32 Which4G 91 ); 92 93 94/** 95 Release the memory management pool. 96 97 @param Pool The USB memory pool to free. 98 99 @retval EFI_SUCCESS The memory pool is freed. 100 @retval EFI_DEVICE_ERROR Failed to free the memory pool. 101 102**/ 103EFI_STATUS 104UsbHcFreeMemPool ( 105 IN USBHC_MEM_POOL *Pool 106 ); 107 108 109/** 110 Allocate some memory from the host controller's memory pool 111 which can be used to communicate with host controller. 112 113 @param Pool The host controller's memory pool. 114 @param Size Size of the memory to allocate. 115 116 @return The allocated memory or NULL. 117 118**/ 119VOID * 120UsbHcAllocateMem ( 121 IN USBHC_MEM_POOL *Pool, 122 IN UINTN Size 123 ); 124 125 126/** 127 Free the allocated memory back to the memory pool. 128 129 @param Pool The memory pool of the host controller. 130 @param Mem The memory to free. 131 @param Size The size of the memory to free. 132 133**/ 134VOID 135UsbHcFreeMem ( 136 IN USBHC_MEM_POOL *Pool, 137 IN VOID *Mem, 138 IN UINTN Size 139 ); 140 141/** 142 Calculate the corresponding pci bus address according to the Mem parameter. 143 144 @param Pool The memory pool of the host controller. 145 @param Mem The pointer to host memory. 146 @param Size The size of the memory region. 147 148 @return the pci memory address 149**/ 150EFI_PHYSICAL_ADDRESS 151UsbHcGetPciAddressForHostMem ( 152 IN USBHC_MEM_POOL *Pool, 153 IN VOID *Mem, 154 IN UINTN Size 155 ); 156 157#endif 158