1/** @file
2Registers onboard PCI ROMs with PCI.IO
3
4Copyright (c) 2013-2015 Intel Corporation.
5
6This program and the accompanying materials
7are licensed and made available under the terms and conditions of the BSD License
8which accompanies this distribution.  The full text of the license may be found at
9http://opensource.org/licenses/bsd-license.php
10
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14
15**/
16
17#include "CommonHeader.h"
18
19#include "PciPlatform.h"
20
21
22PCI_OPTION_ROM_TABLE mPciOptionRomTable[] = {
23  { NULL_ROM_FILE_GUID,                    0, 0, 0, 0, 0xffff, 0xffff }
24};
25EFI_PCI_PLATFORM_PROTOCOL mPciPlatform = {
26  PhaseNotify,
27  PlatformPrepController,
28  GetPlatformPolicy,
29  GetPciRom
30};
31
32EFI_HANDLE mPciPlatformHandle = NULL;
33EFI_HANDLE mImageHandle       = NULL;
34
35
36EFI_STATUS
37PhaseNotify (
38  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,
39  IN EFI_HANDLE                                     HostBridge,
40  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,
41  IN EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase
42  )
43{
44  UINT8                  UsbHostBusNumber = IOH_BUS;
45  if (Phase == EfiPciHostBridgeEndResourceAllocation) {
46    // Required for QuarkSouthCluster.
47    // Enable USB controller memory, io and bus master before Ehci driver.
48    EnableUsbMemIoBusMaster (UsbHostBusNumber);
49    return EFI_SUCCESS;
50  }
51  return EFI_UNSUPPORTED;
52}
53
54
55EFI_STATUS
56PlatformPrepController (
57  IN  EFI_PCI_PLATFORM_PROTOCOL                      *This,
58  IN  EFI_HANDLE                                     HostBridge,
59  IN  EFI_HANDLE                                     RootBridge,
60  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS    PciAddress,
61  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE   Phase,
62  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase
63  )
64{
65  return EFI_UNSUPPORTED;
66}
67
68EFI_STATUS
69GetPlatformPolicy (
70  IN  CONST EFI_PCI_PLATFORM_PROTOCOL                     *This,
71  OUT       EFI_PCI_PLATFORM_POLICY                       *PciPolicy
72  )
73{
74  if (PciPolicy == NULL) {
75    return EFI_INVALID_PARAMETER;
76  }
77
78  return EFI_UNSUPPORTED;
79}
80
81EFI_STATUS
82GetPciRom (
83  IN  CONST EFI_PCI_PLATFORM_PROTOCOL                   *This,
84  IN        EFI_HANDLE                                  PciHandle,
85  OUT       VOID                                        **RomImage,
86  OUT       UINTN                                       *RomSize
87  )
88/*++
89
90  Routine Description:
91    Return a PCI ROM image for the onboard device represented by PciHandle
92
93  Arguments:
94    This      - Protocol instance pointer.
95    PciHandle - PCI device to return the ROM image for.
96    RomImage  - PCI Rom Image for onboard device
97    RomSize   - Size of RomImage in bytes
98
99  Returns:
100    EFI_SUCCESS   - RomImage is valid
101    EFI_NOT_FOUND - No RomImage
102
103--*/
104{
105  EFI_STATUS                    Status;
106  EFI_PCI_IO_PROTOCOL           *PciIo;
107  UINTN                         Segment;
108  UINTN                         Bus;
109  UINTN                         Device;
110  UINTN                         Function;
111  UINT16                        VendorId;
112  UINT16                        DeviceId;
113  UINT16                        DeviceClass;
114  UINTN                         TableIndex;
115
116  Status = gBS->HandleProtocol (
117                  PciHandle,
118                  &gEfiPciIoProtocolGuid,
119                  (VOID **) &PciIo
120                  );
121  if (EFI_ERROR (Status)) {
122    return EFI_NOT_FOUND;
123  }
124
125  PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);
126
127  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0x0A, 1, &DeviceClass);
128
129  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0, 1, &VendorId);
130
131  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 2, 1, &DeviceId);
132
133  //
134  // Loop through table of video option rom descriptions
135  //
136  for (TableIndex = 0; mPciOptionRomTable[TableIndex].VendorId != 0xffff; TableIndex++) {
137
138    //
139    // See if the PCI device specified by PciHandle matches at device in mPciOptionRomTable
140    //
141    if (VendorId != mPciOptionRomTable[TableIndex].VendorId ||
142        DeviceId != mPciOptionRomTable[TableIndex].DeviceId ||
143        Segment != mPciOptionRomTable[TableIndex].Segment ||
144        Bus != mPciOptionRomTable[TableIndex].Bus ||
145        Device != mPciOptionRomTable[TableIndex].Device ||
146        Function != mPciOptionRomTable[TableIndex].Function) {
147      continue;
148    }
149
150    Status = GetSectionFromFv (
151               &mPciOptionRomTable[TableIndex].FileName,
152               EFI_SECTION_RAW,
153               0,
154               RomImage,
155               RomSize
156               );
157
158    if (EFI_ERROR (Status)) {
159      continue;
160    }
161
162    return EFI_SUCCESS;
163  }
164
165  return EFI_NOT_FOUND;
166}
167
168EFI_STATUS
169PciPlatformDriverEntry (
170  IN EFI_HANDLE        ImageHandle,
171  IN EFI_SYSTEM_TABLE  *SystemTable
172  )
173/*++
174
175Routine Description:
176
177Arguments:
178  (Standard EFI Image entry - EFI_IMAGE_ENTRY_POINT)
179
180Returns:
181  EFI_STATUS
182
183--*/
184{
185  EFI_STATUS  Status;
186
187  mImageHandle = ImageHandle;
188
189  //
190  // Install on a new handle
191  //
192  Status = gBS->InstallProtocolInterface (
193                  &mPciPlatformHandle,
194                  &gEfiPciPlatformProtocolGuid,
195                  EFI_NATIVE_INTERFACE,
196                  &mPciPlatform
197                  );
198
199  return Status;
200}
201