1//===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements float type expansion and softening for LegalizeTypes. 11// Softening is the act of turning a computation in an illegal floating point 12// type into a computation in an integer type of the same size; also known as 13// "soft float". For example, turning f32 arithmetic into operations using i32. 14// The resulting integer value is the same as what you would get by performing 15// the floating point operation and bitcasting the result to the integer type. 16// Expansion is the act of changing a computation in an illegal type to be a 17// computation in two identical registers of a smaller type. For example, 18// implementing ppcf128 arithmetic in two f64 registers. 19// 20//===----------------------------------------------------------------------===// 21 22#include "LegalizeTypes.h" 23#include "llvm/Support/ErrorHandling.h" 24#include "llvm/Support/raw_ostream.h" 25using namespace llvm; 26 27#define DEBUG_TYPE "legalize-types" 28 29/// GetFPLibCall - Return the right libcall for the given floating point type. 30static RTLIB::Libcall GetFPLibCall(EVT VT, 31 RTLIB::Libcall Call_F32, 32 RTLIB::Libcall Call_F64, 33 RTLIB::Libcall Call_F80, 34 RTLIB::Libcall Call_F128, 35 RTLIB::Libcall Call_PPCF128) { 36 return 37 VT == MVT::f32 ? Call_F32 : 38 VT == MVT::f64 ? Call_F64 : 39 VT == MVT::f80 ? Call_F80 : 40 VT == MVT::f128 ? Call_F128 : 41 VT == MVT::ppcf128 ? Call_PPCF128 : 42 RTLIB::UNKNOWN_LIBCALL; 43} 44 45//===----------------------------------------------------------------------===// 46// Convert Float Results to Integer for Non-HW-supported Operations. 47//===----------------------------------------------------------------------===// 48 49bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { 50 DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG); 51 dbgs() << "\n"); 52 SDValue R = SDValue(); 53 54 switch (N->getOpcode()) { 55 default: 56#ifndef NDEBUG 57 dbgs() << "SoftenFloatResult #" << ResNo << ": "; 58 N->dump(&DAG); dbgs() << "\n"; 59#endif 60 llvm_unreachable("Do not know how to soften the result of this operator!"); 61 62 case ISD::Register: 63 case ISD::CopyFromReg: 64 case ISD::CopyToReg: 65 assert(isLegalInHWReg(N->getValueType(ResNo)) && 66 "Unsupported SoftenFloatRes opcode!"); 67 // Only when isLegalInHWReg, we can skip check of the operands. 68 R = SDValue(N, ResNo); 69 break; 70 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break; 71 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N, ResNo); break; 72 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break; 73 case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break; 74 case ISD::EXTRACT_VECTOR_ELT: 75 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N); break; 76 case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break; 77 case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break; 78 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break; 79 case ISD::FADD: R = SoftenFloatRes_FADD(N); break; 80 case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break; 81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break; 82 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break; 83 case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break; 84 case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break; 85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; 86 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break; 87 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break; 88 case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break; 89 case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break; 90 case ISD::FMA: R = SoftenFloatRes_FMA(N); break; 91 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break; 92 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break; 93 case ISD::FNEG: R = SoftenFloatRes_FNEG(N, ResNo); break; 94 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break; 95 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break; 96 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break; 97 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break; 98 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break; 99 case ISD::FREM: R = SoftenFloatRes_FREM(N); break; 100 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break; 101 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; 102 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break; 103 case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break; 104 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break; 105 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break; 106 case ISD::LOAD: R = SoftenFloatRes_LOAD(N, ResNo); break; 107 case ISD::SELECT: R = SoftenFloatRes_SELECT(N, ResNo); break; 108 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N, ResNo); break; 109 case ISD::SINT_TO_FP: 110 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break; 111 case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break; 112 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break; 113 } 114 115 // If R is null, the sub-method took care of registering the result. 116 if (R.getNode()) { 117 SetSoftenedFloat(SDValue(N, ResNo), R); 118 ReplaceSoftenFloatResult(N, ResNo, R); 119 } 120 // Return true only if the node is changed, 121 // assuming that the operands are also converted when necessary. 122 // Otherwise, return false to tell caller to scan operands. 123 return R.getNode() && R.getNode() != N; 124} 125 126SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) { 127 if (isLegalInHWReg(N->getValueType(ResNo))) 128 return SDValue(N, ResNo); 129 return BitConvertToInteger(N->getOperand(0)); 130} 131 132SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N, 133 unsigned ResNo) { 134 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); 135 return BitConvertToInteger(Op); 136} 137 138SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) { 139 // Convert the inputs to integers, and build a new pair out of them. 140 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), 141 TLI.getTypeToTransformTo(*DAG.getContext(), 142 N->getValueType(0)), 143 BitConvertToInteger(N->getOperand(0)), 144 BitConvertToInteger(N->getOperand(1))); 145} 146 147SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) { 148 // When LegalInHWReg, we can load better from the constant pool. 149 if (isLegalInHWReg(N->getValueType(ResNo))) 150 return SDValue(N, ResNo); 151 ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N); 152 // In ppcf128, the high 64 bits are always first in memory regardless 153 // of Endianness. LLVM's APFloat representation is not Endian sensitive, 154 // and so always converts into a 128-bit APInt in a non-Endian-sensitive 155 // way. However, APInt's are serialized in an Endian-sensitive fashion, 156 // so on big-Endian targets, the two doubles are output in the wrong 157 // order. Fix this by manually flipping the order of the high 64 bits 158 // and the low 64 bits here. 159 if (DAG.getDataLayout().isBigEndian() && 160 CN->getValueType(0).getSimpleVT() == llvm::MVT::ppcf128) { 161 uint64_t words[2] = { CN->getValueAPF().bitcastToAPInt().getRawData()[1], 162 CN->getValueAPF().bitcastToAPInt().getRawData()[0] }; 163 APInt Val(128, words); 164 return DAG.getConstant(Val, SDLoc(CN), 165 TLI.getTypeToTransformTo(*DAG.getContext(), 166 CN->getValueType(0))); 167 } else { 168 return DAG.getConstant(CN->getValueAPF().bitcastToAPInt(), SDLoc(CN), 169 TLI.getTypeToTransformTo(*DAG.getContext(), 170 CN->getValueType(0))); 171 } 172} 173 174SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) { 175 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0)); 176 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), 177 NewOp.getValueType().getVectorElementType(), 178 NewOp, N->getOperand(1)); 179} 180 181SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) { 182 // When LegalInHWReg, FABS can be implemented as native bitwise operations. 183 if (isLegalInHWReg(N->getValueType(ResNo))) 184 return SDValue(N, ResNo); 185 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 186 unsigned Size = NVT.getSizeInBits(); 187 188 // Mask = ~(1 << (Size-1)) 189 APInt API = APInt::getAllOnesValue(Size); 190 API.clearBit(Size - 1); 191 SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT); 192 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 193 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask); 194} 195 196SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) { 197 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 198 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), 199 GetSoftenedFloat(N->getOperand(1)) }; 200 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 201 RTLIB::FMIN_F32, 202 RTLIB::FMIN_F64, 203 RTLIB::FMIN_F80, 204 RTLIB::FMIN_F128, 205 RTLIB::FMIN_PPCF128), 206 NVT, Ops, false, SDLoc(N)).first; 207} 208 209SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) { 210 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 211 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), 212 GetSoftenedFloat(N->getOperand(1)) }; 213 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 214 RTLIB::FMAX_F32, 215 RTLIB::FMAX_F64, 216 RTLIB::FMAX_F80, 217 RTLIB::FMAX_F128, 218 RTLIB::FMAX_PPCF128), 219 NVT, Ops, false, SDLoc(N)).first; 220} 221 222SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) { 223 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 224 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), 225 GetSoftenedFloat(N->getOperand(1)) }; 226 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 227 RTLIB::ADD_F32, 228 RTLIB::ADD_F64, 229 RTLIB::ADD_F80, 230 RTLIB::ADD_F128, 231 RTLIB::ADD_PPCF128), 232 NVT, Ops, false, SDLoc(N)).first; 233} 234 235SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) { 236 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 237 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 238 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 239 RTLIB::CEIL_F32, 240 RTLIB::CEIL_F64, 241 RTLIB::CEIL_F80, 242 RTLIB::CEIL_F128, 243 RTLIB::CEIL_PPCF128), 244 NVT, Op, false, SDLoc(N)).first; 245} 246 247SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo) { 248 // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations. 249 if (isLegalInHWReg(N->getValueType(ResNo))) 250 return SDValue(N, ResNo); 251 SDValue LHS = GetSoftenedFloat(N->getOperand(0)); 252 SDValue RHS = BitConvertToInteger(N->getOperand(1)); 253 SDLoc dl(N); 254 255 EVT LVT = LHS.getValueType(); 256 EVT RVT = RHS.getValueType(); 257 258 unsigned LSize = LVT.getSizeInBits(); 259 unsigned RSize = RVT.getSizeInBits(); 260 261 // First get the sign bit of second operand. 262 SDValue SignBit = DAG.getNode( 263 ISD::SHL, dl, RVT, DAG.getConstant(1, dl, RVT), 264 DAG.getConstant(RSize - 1, dl, 265 TLI.getShiftAmountTy(RVT, DAG.getDataLayout()))); 266 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); 267 268 // Shift right or sign-extend it if the two operands have different types. 269 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits(); 270 if (SizeDiff > 0) { 271 SignBit = 272 DAG.getNode(ISD::SRL, dl, RVT, SignBit, 273 DAG.getConstant(SizeDiff, dl, 274 TLI.getShiftAmountTy(SignBit.getValueType(), 275 DAG.getDataLayout()))); 276 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); 277 } else if (SizeDiff < 0) { 278 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit); 279 SignBit = 280 DAG.getNode(ISD::SHL, dl, LVT, SignBit, 281 DAG.getConstant(-SizeDiff, dl, 282 TLI.getShiftAmountTy(SignBit.getValueType(), 283 DAG.getDataLayout()))); 284 } 285 286 // Clear the sign bit of the first operand. 287 SDValue Mask = DAG.getNode( 288 ISD::SHL, dl, LVT, DAG.getConstant(1, dl, LVT), 289 DAG.getConstant(LSize - 1, dl, 290 TLI.getShiftAmountTy(LVT, DAG.getDataLayout()))); 291 Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT)); 292 LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask); 293 294 // Or the value with the sign bit. 295 return DAG.getNode(ISD::OR, dl, LVT, LHS, SignBit); 296} 297 298SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) { 299 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 300 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 301 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 302 RTLIB::COS_F32, 303 RTLIB::COS_F64, 304 RTLIB::COS_F80, 305 RTLIB::COS_F128, 306 RTLIB::COS_PPCF128), 307 NVT, Op, false, SDLoc(N)).first; 308} 309 310SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) { 311 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 312 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), 313 GetSoftenedFloat(N->getOperand(1)) }; 314 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 315 RTLIB::DIV_F32, 316 RTLIB::DIV_F64, 317 RTLIB::DIV_F80, 318 RTLIB::DIV_F128, 319 RTLIB::DIV_PPCF128), 320 NVT, Ops, false, SDLoc(N)).first; 321} 322 323SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) { 324 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 325 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 326 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 327 RTLIB::EXP_F32, 328 RTLIB::EXP_F64, 329 RTLIB::EXP_F80, 330 RTLIB::EXP_F128, 331 RTLIB::EXP_PPCF128), 332 NVT, Op, false, SDLoc(N)).first; 333} 334 335SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) { 336 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 337 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 338 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 339 RTLIB::EXP2_F32, 340 RTLIB::EXP2_F64, 341 RTLIB::EXP2_F80, 342 RTLIB::EXP2_F128, 343 RTLIB::EXP2_PPCF128), 344 NVT, Op, false, SDLoc(N)).first; 345} 346 347SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) { 348 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 349 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 350 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 351 RTLIB::FLOOR_F32, 352 RTLIB::FLOOR_F64, 353 RTLIB::FLOOR_F80, 354 RTLIB::FLOOR_F128, 355 RTLIB::FLOOR_PPCF128), 356 NVT, Op, false, SDLoc(N)).first; 357} 358 359SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) { 360 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 361 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 362 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 363 RTLIB::LOG_F32, 364 RTLIB::LOG_F64, 365 RTLIB::LOG_F80, 366 RTLIB::LOG_F128, 367 RTLIB::LOG_PPCF128), 368 NVT, Op, false, SDLoc(N)).first; 369} 370 371SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) { 372 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 373 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 374 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 375 RTLIB::LOG2_F32, 376 RTLIB::LOG2_F64, 377 RTLIB::LOG2_F80, 378 RTLIB::LOG2_F128, 379 RTLIB::LOG2_PPCF128), 380 NVT, Op, false, SDLoc(N)).first; 381} 382 383SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) { 384 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 385 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 386 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 387 RTLIB::LOG10_F32, 388 RTLIB::LOG10_F64, 389 RTLIB::LOG10_F80, 390 RTLIB::LOG10_F128, 391 RTLIB::LOG10_PPCF128), 392 NVT, Op, false, SDLoc(N)).first; 393} 394 395SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) { 396 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 397 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)), 398 GetSoftenedFloat(N->getOperand(1)), 399 GetSoftenedFloat(N->getOperand(2)) }; 400 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 401 RTLIB::FMA_F32, 402 RTLIB::FMA_F64, 403 RTLIB::FMA_F80, 404 RTLIB::FMA_F128, 405 RTLIB::FMA_PPCF128), 406 NVT, Ops, false, SDLoc(N)).first; 407} 408 409SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) { 410 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 411 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), 412 GetSoftenedFloat(N->getOperand(1)) }; 413 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 414 RTLIB::MUL_F32, 415 RTLIB::MUL_F64, 416 RTLIB::MUL_F80, 417 RTLIB::MUL_F128, 418 RTLIB::MUL_PPCF128), 419 NVT, Ops, false, SDLoc(N)).first; 420} 421 422SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) { 423 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 424 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 425 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 426 RTLIB::NEARBYINT_F32, 427 RTLIB::NEARBYINT_F64, 428 RTLIB::NEARBYINT_F80, 429 RTLIB::NEARBYINT_F128, 430 RTLIB::NEARBYINT_PPCF128), 431 NVT, Op, false, SDLoc(N)).first; 432} 433 434SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo) { 435 // When LegalInHWReg, FNEG can be implemented as native bitwise operations. 436 if (isLegalInHWReg(N->getValueType(ResNo))) 437 return SDValue(N, ResNo); 438 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 439 SDLoc dl(N); 440 // Expand Y = FNEG(X) -> Y = SUB -0.0, X 441 SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)), 442 GetSoftenedFloat(N->getOperand(0)) }; 443 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 444 RTLIB::SUB_F32, 445 RTLIB::SUB_F64, 446 RTLIB::SUB_F80, 447 RTLIB::SUB_F128, 448 RTLIB::SUB_PPCF128), 449 NVT, Ops, false, dl).first; 450} 451 452SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) { 453 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 454 SDValue Op = N->getOperand(0); 455 456 // There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's 457 // entirely possible for both f16 and f32 to be legal, so use the fully 458 // hard-float FP_EXTEND rather than FP16_TO_FP. 459 if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32) { 460 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op); 461 if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat) 462 SoftenFloatResult(Op.getNode(), 0); 463 } 464 465 if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat) { 466 Op = GetPromotedFloat(Op); 467 // If the promotion did the FP_EXTEND to the destination type for us, 468 // there's nothing left to do here. 469 if (Op.getValueType() == N->getValueType(0)) { 470 return BitConvertToInteger(Op); 471 } 472 } 473 474 RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0)); 475 if (getTypeAction(Op.getValueType()) == TargetLowering::TypeSoftenFloat) 476 Op = GetSoftenedFloat(Op); 477 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!"); 478 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first; 479} 480 481// FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special 482// nodes? 483SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) { 484 EVT MidVT = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::f32); 485 SDValue Op = N->getOperand(0); 486 SDValue Res32 = TLI.makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MidVT, Op, 487 false, SDLoc(N)).first; 488 if (N->getValueType(0) == MVT::f32) 489 return Res32; 490 491 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 492 RTLIB::Libcall LC = RTLIB::getFPEXT(MVT::f32, N->getValueType(0)); 493 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!"); 494 return TLI.makeLibCall(DAG, LC, NVT, Res32, false, SDLoc(N)).first; 495} 496 497SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) { 498 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 499 SDValue Op = N->getOperand(0); 500 if (N->getValueType(0) == MVT::f16) { 501 // Semi-soften first, to FP_TO_FP16, so that targets which support f16 as a 502 // storage-only type get a chance to select things. 503 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op); 504 } 505 506 RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), N->getValueType(0)); 507 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!"); 508 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first; 509} 510 511SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) { 512 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 513 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), 514 GetSoftenedFloat(N->getOperand(1)) }; 515 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 516 RTLIB::POW_F32, 517 RTLIB::POW_F64, 518 RTLIB::POW_F80, 519 RTLIB::POW_F128, 520 RTLIB::POW_PPCF128), 521 NVT, Ops, false, SDLoc(N)).first; 522} 523 524SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) { 525 assert(N->getOperand(1).getValueType() == MVT::i32 && 526 "Unsupported power type!"); 527 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 528 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) }; 529 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 530 RTLIB::POWI_F32, 531 RTLIB::POWI_F64, 532 RTLIB::POWI_F80, 533 RTLIB::POWI_F128, 534 RTLIB::POWI_PPCF128), 535 NVT, Ops, false, SDLoc(N)).first; 536} 537 538SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) { 539 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 540 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), 541 GetSoftenedFloat(N->getOperand(1)) }; 542 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 543 RTLIB::REM_F32, 544 RTLIB::REM_F64, 545 RTLIB::REM_F80, 546 RTLIB::REM_F128, 547 RTLIB::REM_PPCF128), 548 NVT, Ops, false, SDLoc(N)).first; 549} 550 551SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) { 552 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 553 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 554 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 555 RTLIB::RINT_F32, 556 RTLIB::RINT_F64, 557 RTLIB::RINT_F80, 558 RTLIB::RINT_F128, 559 RTLIB::RINT_PPCF128), 560 NVT, Op, false, SDLoc(N)).first; 561} 562 563SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) { 564 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 565 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 566 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 567 RTLIB::ROUND_F32, 568 RTLIB::ROUND_F64, 569 RTLIB::ROUND_F80, 570 RTLIB::ROUND_F128, 571 RTLIB::ROUND_PPCF128), 572 NVT, Op, false, SDLoc(N)).first; 573} 574 575SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) { 576 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 577 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 578 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 579 RTLIB::SIN_F32, 580 RTLIB::SIN_F64, 581 RTLIB::SIN_F80, 582 RTLIB::SIN_F128, 583 RTLIB::SIN_PPCF128), 584 NVT, Op, false, SDLoc(N)).first; 585} 586 587SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) { 588 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 589 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 590 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 591 RTLIB::SQRT_F32, 592 RTLIB::SQRT_F64, 593 RTLIB::SQRT_F80, 594 RTLIB::SQRT_F128, 595 RTLIB::SQRT_PPCF128), 596 NVT, Op, false, SDLoc(N)).first; 597} 598 599SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) { 600 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 601 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), 602 GetSoftenedFloat(N->getOperand(1)) }; 603 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 604 RTLIB::SUB_F32, 605 RTLIB::SUB_F64, 606 RTLIB::SUB_F80, 607 RTLIB::SUB_F128, 608 RTLIB::SUB_PPCF128), 609 NVT, Ops, false, SDLoc(N)).first; 610} 611 612SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) { 613 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 614 if (N->getValueType(0) == MVT::f16) 615 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0)); 616 617 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 618 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 619 RTLIB::TRUNC_F32, 620 RTLIB::TRUNC_F64, 621 RTLIB::TRUNC_F80, 622 RTLIB::TRUNC_F128, 623 RTLIB::TRUNC_PPCF128), 624 NVT, Op, false, SDLoc(N)).first; 625} 626 627SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo) { 628 bool LegalInHWReg = isLegalInHWReg(N->getValueType(ResNo)); 629 LoadSDNode *L = cast<LoadSDNode>(N); 630 EVT VT = N->getValueType(0); 631 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 632 SDLoc dl(N); 633 634 SDValue NewL; 635 if (L->getExtensionType() == ISD::NON_EXTLOAD) { 636 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), 637 NVT, dl, L->getChain(), L->getBasePtr(), L->getOffset(), 638 L->getPointerInfo(), NVT, L->isVolatile(), 639 L->isNonTemporal(), false, L->getAlignment(), 640 L->getAAInfo()); 641 // Legalized the chain result - switch anything that used the old chain to 642 // use the new one. 643 if (N != NewL.getValue(1).getNode()) 644 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1)); 645 return NewL; 646 } 647 648 // Do a non-extending load followed by FP_EXTEND. 649 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, 650 L->getMemoryVT(), dl, L->getChain(), 651 L->getBasePtr(), L->getOffset(), L->getPointerInfo(), 652 L->getMemoryVT(), L->isVolatile(), 653 L->isNonTemporal(), false, L->getAlignment(), 654 L->getAAInfo()); 655 // Legalized the chain result - switch anything that used the old chain to 656 // use the new one. 657 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1)); 658 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL); 659 if (LegalInHWReg) 660 return ExtendNode; 661 return BitConvertToInteger(ExtendNode); 662} 663 664SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo) { 665 if (isLegalInHWReg(N->getValueType(ResNo))) 666 return SDValue(N, ResNo); 667 SDValue LHS = GetSoftenedFloat(N->getOperand(1)); 668 SDValue RHS = GetSoftenedFloat(N->getOperand(2)); 669 return DAG.getSelect(SDLoc(N), 670 LHS.getValueType(), N->getOperand(0), LHS, RHS); 671} 672 673SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo) { 674 if (isLegalInHWReg(N->getValueType(ResNo))) 675 return SDValue(N, ResNo); 676 SDValue LHS = GetSoftenedFloat(N->getOperand(2)); 677 SDValue RHS = GetSoftenedFloat(N->getOperand(3)); 678 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), 679 LHS.getValueType(), N->getOperand(0), 680 N->getOperand(1), LHS, RHS, N->getOperand(4)); 681} 682 683SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) { 684 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), 685 N->getValueType(0))); 686} 687 688SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) { 689 SDValue Chain = N->getOperand(0); // Get the chain. 690 SDValue Ptr = N->getOperand(1); // Get the pointer. 691 EVT VT = N->getValueType(0); 692 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 693 SDLoc dl(N); 694 695 SDValue NewVAARG; 696 NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), 697 N->getConstantOperandVal(3)); 698 699 // Legalized the chain result - switch anything that used the old chain to 700 // use the new one. 701 if (N != NewVAARG.getValue(1).getNode()) 702 ReplaceValueWith(SDValue(N, 1), NewVAARG.getValue(1)); 703 return NewVAARG; 704} 705 706SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) { 707 bool Signed = N->getOpcode() == ISD::SINT_TO_FP; 708 EVT SVT = N->getOperand(0).getValueType(); 709 EVT RVT = N->getValueType(0); 710 EVT NVT = EVT(); 711 SDLoc dl(N); 712 713 // If the input is not legal, eg: i1 -> fp, then it needs to be promoted to 714 // a larger type, eg: i8 -> fp. Even if it is legal, no libcall may exactly 715 // match. Look for an appropriate libcall. 716 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL; 717 for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE; 718 t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) { 719 NVT = (MVT::SimpleValueType)t; 720 // The source needs to big enough to hold the operand. 721 if (NVT.bitsGE(SVT)) 722 LC = Signed ? RTLIB::getSINTTOFP(NVT, RVT):RTLIB::getUINTTOFP (NVT, RVT); 723 } 724 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!"); 725 726 // Sign/zero extend the argument if the libcall takes a larger type. 727 SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl, 728 NVT, N->getOperand(0)); 729 return TLI.makeLibCall(DAG, LC, 730 TLI.getTypeToTransformTo(*DAG.getContext(), RVT), 731 Op, Signed, dl).first; 732} 733 734 735//===----------------------------------------------------------------------===// 736// Convert Float Operand to Integer for Non-HW-supported Operations. 737//===----------------------------------------------------------------------===// 738 739bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) { 740 DEBUG(dbgs() << "Soften float operand " << OpNo << ": "; N->dump(&DAG); 741 dbgs() << "\n"); 742 SDValue Res = SDValue(); 743 744 switch (N->getOpcode()) { 745 default: 746 if (CanSkipSoftenFloatOperand(N, OpNo)) 747 return false; 748#ifndef NDEBUG 749 dbgs() << "SoftenFloatOperand Op #" << OpNo << ": "; 750 N->dump(&DAG); dbgs() << "\n"; 751#endif 752 llvm_unreachable("Do not know how to soften this operator's operand!"); 753 754 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break; 755 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break; 756 case ISD::FP_EXTEND: Res = SoftenFloatOp_FP_EXTEND(N); break; 757 case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes 758 case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break; 759 case ISD::FP_TO_SINT: 760 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break; 761 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break; 762 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break; 763 case ISD::STORE: 764 Res = SoftenFloatOp_STORE(N, OpNo); 765 // Do not try to analyze or soften this node again if the value is 766 // or can be held in a register. In that case, Res.getNode() should 767 // be equal to N. 768 if (Res.getNode() == N && 769 isLegalInHWReg(N->getOperand(OpNo).getValueType())) 770 return false; 771 // Otherwise, we need to reanalyze and lower the new Res nodes. 772 break; 773 } 774 775 // If the result is null, the sub-method took care of registering results etc. 776 if (!Res.getNode()) return false; 777 778 // If the result is N, the sub-method updated N in place. Tell the legalizer 779 // core about this to re-analyze. 780 if (Res.getNode() == N) 781 return true; 782 783 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && 784 "Invalid operand expansion"); 785 786 ReplaceValueWith(SDValue(N, 0), Res); 787 return false; 788} 789 790bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) { 791 if (!isLegalInHWReg(N->getOperand(OpNo).getValueType())) 792 return false; 793 // When the operand type can be kept in registers, SoftenFloatResult 794 // will call ReplaceValueWith to replace all references and we can 795 // skip softening this operand. 796 switch (N->getOperand(OpNo).getOpcode()) { 797 case ISD::BITCAST: 798 case ISD::ConstantFP: 799 case ISD::CopyFromReg: 800 case ISD::CopyToReg: 801 case ISD::FABS: 802 case ISD::FCOPYSIGN: 803 case ISD::FNEG: 804 case ISD::Register: 805 case ISD::SELECT: 806 case ISD::SELECT_CC: 807 return true; 808 } 809 // For some opcodes, SoftenFloatResult handles all conversion of softening 810 // and replacing operands, so that there is no need to soften operands 811 // again, although such opcode could be scanned for other illegal operands. 812 switch (N->getOpcode()) { 813 case ISD::ConstantFP: 814 case ISD::CopyFromReg: 815 case ISD::CopyToReg: 816 case ISD::FABS: 817 case ISD::FCOPYSIGN: 818 case ISD::FNEG: 819 case ISD::Register: 820 case ISD::SELECT: 821 return true; 822 } 823 return false; 824} 825 826SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) { 827 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), 828 GetSoftenedFloat(N->getOperand(0))); 829} 830 831SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) { 832 // If we get here, the result must be legal but the source illegal. 833 EVT SVT = N->getOperand(0).getValueType(); 834 EVT RVT = N->getValueType(0); 835 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 836 837 if (SVT == MVT::f16) 838 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op); 839 840 RTLIB::Libcall LC = RTLIB::getFPEXT(SVT, RVT); 841 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND libcall"); 842 843 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first; 844} 845 846 847SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) { 848 // We actually deal with the partially-softened FP_TO_FP16 node too, which 849 // returns an i16 so doesn't meet the constraints necessary for FP_ROUND. 850 assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16); 851 852 EVT SVT = N->getOperand(0).getValueType(); 853 EVT RVT = N->getValueType(0); 854 EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT; 855 856 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT); 857 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall"); 858 859 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 860 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first; 861} 862 863SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) { 864 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3); 865 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get(); 866 867 EVT VT = NewLHS.getValueType(); 868 NewLHS = GetSoftenedFloat(NewLHS); 869 NewRHS = GetSoftenedFloat(NewRHS); 870 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N)); 871 872 // If softenSetCCOperands returned a scalar, we need to compare the result 873 // against zero to select between true and false values. 874 if (!NewRHS.getNode()) { 875 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType()); 876 CCCode = ISD::SETNE; 877 } 878 879 // Update N to have the operands specified. 880 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), 881 DAG.getCondCode(CCCode), NewLHS, NewRHS, 882 N->getOperand(4)), 883 0); 884} 885 886SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) { 887 bool Signed = N->getOpcode() == ISD::FP_TO_SINT; 888 EVT SVT = N->getOperand(0).getValueType(); 889 EVT RVT = N->getValueType(0); 890 EVT NVT = EVT(); 891 SDLoc dl(N); 892 893 // If the result is not legal, eg: fp -> i1, then it needs to be promoted to 894 // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly 895 // match, eg. we don't have fp -> i8 conversions. 896 // Look for an appropriate libcall. 897 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL; 898 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; 899 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; 900 ++IntVT) { 901 NVT = (MVT::SimpleValueType)IntVT; 902 // The type needs to big enough to hold the result. 903 if (NVT.bitsGE(RVT)) 904 LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT):RTLIB::getFPTOUINT(SVT, NVT); 905 } 906 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!"); 907 908 SDValue Op = GetSoftenedFloat(N->getOperand(0)); 909 SDValue Res = TLI.makeLibCall(DAG, LC, NVT, Op, false, dl).first; 910 911 // Truncate the result if the libcall returns a larger type. 912 return DAG.getNode(ISD::TRUNCATE, dl, RVT, Res); 913} 914 915SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) { 916 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1); 917 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get(); 918 919 EVT VT = NewLHS.getValueType(); 920 NewLHS = GetSoftenedFloat(NewLHS); 921 NewRHS = GetSoftenedFloat(NewRHS); 922 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N)); 923 924 // If softenSetCCOperands returned a scalar, we need to compare the result 925 // against zero to select between true and false values. 926 if (!NewRHS.getNode()) { 927 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType()); 928 CCCode = ISD::SETNE; 929 } 930 931 // Update N to have the operands specified. 932 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS, 933 N->getOperand(2), N->getOperand(3), 934 DAG.getCondCode(CCCode)), 935 0); 936} 937 938SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) { 939 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1); 940 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get(); 941 942 EVT VT = NewLHS.getValueType(); 943 NewLHS = GetSoftenedFloat(NewLHS); 944 NewRHS = GetSoftenedFloat(NewRHS); 945 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N)); 946 947 // If softenSetCCOperands returned a scalar, use it. 948 if (!NewRHS.getNode()) { 949 assert(NewLHS.getValueType() == N->getValueType(0) && 950 "Unexpected setcc expansion!"); 951 return NewLHS; 952 } 953 954 // Otherwise, update N to have the operands specified. 955 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS, 956 DAG.getCondCode(CCCode)), 957 0); 958} 959 960SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) { 961 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!"); 962 assert(OpNo == 1 && "Can only soften the stored value!"); 963 StoreSDNode *ST = cast<StoreSDNode>(N); 964 SDValue Val = ST->getValue(); 965 SDLoc dl(N); 966 967 if (ST->isTruncatingStore()) 968 // Do an FP_ROUND followed by a non-truncating store. 969 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(), 970 Val, DAG.getIntPtrConstant(0, dl))); 971 else 972 Val = GetSoftenedFloat(Val); 973 974 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(), 975 ST->getMemOperand()); 976} 977 978 979//===----------------------------------------------------------------------===// 980// Float Result Expansion 981//===----------------------------------------------------------------------===// 982 983/// ExpandFloatResult - This method is called when the specified result of the 984/// specified node is found to need expansion. At this point, the node may also 985/// have invalid operands or may have other results that need promotion, we just 986/// know that (at least) one result needs expansion. 987void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) { 988 DEBUG(dbgs() << "Expand float result: "; N->dump(&DAG); dbgs() << "\n"); 989 SDValue Lo, Hi; 990 Lo = Hi = SDValue(); 991 992 // See if the target wants to custom expand this node. 993 if (CustomLowerNode(N, N->getValueType(ResNo), true)) 994 return; 995 996 switch (N->getOpcode()) { 997 default: 998#ifndef NDEBUG 999 dbgs() << "ExpandFloatResult #" << ResNo << ": "; 1000 N->dump(&DAG); dbgs() << "\n"; 1001#endif 1002 llvm_unreachable("Do not know how to expand the result of this operator!"); 1003 1004 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; 1005 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break; 1006 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; 1007 1008 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; 1009 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break; 1010 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; 1011 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; 1012 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break; 1013 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break; 1014 1015 case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break; 1016 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break; 1017 case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break; 1018 case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break; 1019 case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break; 1020 case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break; 1021 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; 1022 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break; 1023 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break; 1024 case ISD::FEXP: ExpandFloatRes_FEXP(N, Lo, Hi); break; 1025 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break; 1026 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break; 1027 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break; 1028 case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break; 1029 case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break; 1030 case ISD::FMA: ExpandFloatRes_FMA(N, Lo, Hi); break; 1031 case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break; 1032 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break; 1033 case ISD::FNEG: ExpandFloatRes_FNEG(N, Lo, Hi); break; 1034 case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break; 1035 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break; 1036 case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break; 1037 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break; 1038 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; 1039 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break; 1040 case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break; 1041 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break; 1042 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break; 1043 case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break; 1044 case ISD::SINT_TO_FP: 1045 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break; 1046 case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break; 1047 } 1048 1049 // If Lo/Hi is null, the sub-method took care of registering results etc. 1050 if (Lo.getNode()) 1051 SetExpandedFloat(SDValue(N, ResNo), Lo, Hi); 1052} 1053 1054void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, 1055 SDValue &Hi) { 1056 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1057 assert(NVT.getSizeInBits() == integerPartWidth && 1058 "Do not know how to expand this float constant!"); 1059 APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().bitcastToAPInt(); 1060 SDLoc dl(N); 1061 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT), 1062 APInt(integerPartWidth, C.getRawData()[1])), 1063 dl, NVT); 1064 Hi = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT), 1065 APInt(integerPartWidth, C.getRawData()[0])), 1066 dl, NVT); 1067} 1068 1069void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo, 1070 SDValue &Hi) { 1071 assert(N->getValueType(0) == MVT::ppcf128 && 1072 "Logic only correct for ppcf128!"); 1073 SDLoc dl(N); 1074 SDValue Tmp; 1075 GetExpandedFloat(N->getOperand(0), Lo, Tmp); 1076 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp); 1077 // Lo = Hi==fabs(Hi) ? Lo : -Lo; 1078 Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo, 1079 DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo), 1080 ISD::SETEQ); 1081} 1082 1083void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo, 1084 SDValue &Hi) { 1085 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1086 RTLIB::FMIN_F32, RTLIB::FMIN_F64, 1087 RTLIB::FMIN_F80, RTLIB::FMIN_F128, 1088 RTLIB::FMIN_PPCF128), 1089 N, false); 1090 GetPairElements(Call, Lo, Hi); 1091} 1092 1093void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo, 1094 SDValue &Hi) { 1095 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1096 RTLIB::FMAX_F32, RTLIB::FMAX_F64, 1097 RTLIB::FMAX_F80, RTLIB::FMAX_F128, 1098 RTLIB::FMAX_PPCF128), 1099 N, false); 1100 GetPairElements(Call, Lo, Hi); 1101} 1102 1103void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo, 1104 SDValue &Hi) { 1105 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1106 RTLIB::ADD_F32, RTLIB::ADD_F64, 1107 RTLIB::ADD_F80, RTLIB::ADD_F128, 1108 RTLIB::ADD_PPCF128), 1109 N, false); 1110 GetPairElements(Call, Lo, Hi); 1111} 1112 1113void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N, 1114 SDValue &Lo, SDValue &Hi) { 1115 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1116 RTLIB::CEIL_F32, RTLIB::CEIL_F64, 1117 RTLIB::CEIL_F80, RTLIB::CEIL_F128, 1118 RTLIB::CEIL_PPCF128), 1119 N, false); 1120 GetPairElements(Call, Lo, Hi); 1121} 1122 1123void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N, 1124 SDValue &Lo, SDValue &Hi) { 1125 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1126 RTLIB::COPYSIGN_F32, 1127 RTLIB::COPYSIGN_F64, 1128 RTLIB::COPYSIGN_F80, 1129 RTLIB::COPYSIGN_F128, 1130 RTLIB::COPYSIGN_PPCF128), 1131 N, false); 1132 GetPairElements(Call, Lo, Hi); 1133} 1134 1135void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N, 1136 SDValue &Lo, SDValue &Hi) { 1137 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1138 RTLIB::COS_F32, RTLIB::COS_F64, 1139 RTLIB::COS_F80, RTLIB::COS_F128, 1140 RTLIB::COS_PPCF128), 1141 N, false); 1142 GetPairElements(Call, Lo, Hi); 1143} 1144 1145void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo, 1146 SDValue &Hi) { 1147 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; 1148 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 1149 RTLIB::DIV_F32, 1150 RTLIB::DIV_F64, 1151 RTLIB::DIV_F80, 1152 RTLIB::DIV_F128, 1153 RTLIB::DIV_PPCF128), 1154 N->getValueType(0), Ops, false, 1155 SDLoc(N)).first; 1156 GetPairElements(Call, Lo, Hi); 1157} 1158 1159void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N, 1160 SDValue &Lo, SDValue &Hi) { 1161 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1162 RTLIB::EXP_F32, RTLIB::EXP_F64, 1163 RTLIB::EXP_F80, RTLIB::EXP_F128, 1164 RTLIB::EXP_PPCF128), 1165 N, false); 1166 GetPairElements(Call, Lo, Hi); 1167} 1168 1169void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N, 1170 SDValue &Lo, SDValue &Hi) { 1171 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1172 RTLIB::EXP2_F32, RTLIB::EXP2_F64, 1173 RTLIB::EXP2_F80, RTLIB::EXP2_F128, 1174 RTLIB::EXP2_PPCF128), 1175 N, false); 1176 GetPairElements(Call, Lo, Hi); 1177} 1178 1179void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N, 1180 SDValue &Lo, SDValue &Hi) { 1181 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1182 RTLIB::FLOOR_F32, RTLIB::FLOOR_F64, 1183 RTLIB::FLOOR_F80, RTLIB::FLOOR_F128, 1184 RTLIB::FLOOR_PPCF128), 1185 N, false); 1186 GetPairElements(Call, Lo, Hi); 1187} 1188 1189void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N, 1190 SDValue &Lo, SDValue &Hi) { 1191 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1192 RTLIB::LOG_F32, RTLIB::LOG_F64, 1193 RTLIB::LOG_F80, RTLIB::LOG_F128, 1194 RTLIB::LOG_PPCF128), 1195 N, false); 1196 GetPairElements(Call, Lo, Hi); 1197} 1198 1199void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N, 1200 SDValue &Lo, SDValue &Hi) { 1201 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1202 RTLIB::LOG2_F32, RTLIB::LOG2_F64, 1203 RTLIB::LOG2_F80, RTLIB::LOG2_F128, 1204 RTLIB::LOG2_PPCF128), 1205 N, false); 1206 GetPairElements(Call, Lo, Hi); 1207} 1208 1209void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N, 1210 SDValue &Lo, SDValue &Hi) { 1211 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1212 RTLIB::LOG10_F32, RTLIB::LOG10_F64, 1213 RTLIB::LOG10_F80, RTLIB::LOG10_F128, 1214 RTLIB::LOG10_PPCF128), 1215 N, false); 1216 GetPairElements(Call, Lo, Hi); 1217} 1218 1219void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo, 1220 SDValue &Hi) { 1221 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) }; 1222 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 1223 RTLIB::FMA_F32, 1224 RTLIB::FMA_F64, 1225 RTLIB::FMA_F80, 1226 RTLIB::FMA_F128, 1227 RTLIB::FMA_PPCF128), 1228 N->getValueType(0), Ops, false, 1229 SDLoc(N)).first; 1230 GetPairElements(Call, Lo, Hi); 1231} 1232 1233void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo, 1234 SDValue &Hi) { 1235 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; 1236 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 1237 RTLIB::MUL_F32, 1238 RTLIB::MUL_F64, 1239 RTLIB::MUL_F80, 1240 RTLIB::MUL_F128, 1241 RTLIB::MUL_PPCF128), 1242 N->getValueType(0), Ops, false, 1243 SDLoc(N)).first; 1244 GetPairElements(Call, Lo, Hi); 1245} 1246 1247void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N, 1248 SDValue &Lo, SDValue &Hi) { 1249 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1250 RTLIB::NEARBYINT_F32, 1251 RTLIB::NEARBYINT_F64, 1252 RTLIB::NEARBYINT_F80, 1253 RTLIB::NEARBYINT_F128, 1254 RTLIB::NEARBYINT_PPCF128), 1255 N, false); 1256 GetPairElements(Call, Lo, Hi); 1257} 1258 1259void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo, 1260 SDValue &Hi) { 1261 SDLoc dl(N); 1262 GetExpandedFloat(N->getOperand(0), Lo, Hi); 1263 Lo = DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo); 1264 Hi = DAG.getNode(ISD::FNEG, dl, Hi.getValueType(), Hi); 1265} 1266 1267void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo, 1268 SDValue &Hi) { 1269 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 1270 SDLoc dl(N); 1271 Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0)); 1272 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT), 1273 APInt(NVT.getSizeInBits(), 0)), dl, NVT); 1274} 1275 1276void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N, 1277 SDValue &Lo, SDValue &Hi) { 1278 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1279 RTLIB::POW_F32, RTLIB::POW_F64, 1280 RTLIB::POW_F80, RTLIB::POW_F128, 1281 RTLIB::POW_PPCF128), 1282 N, false); 1283 GetPairElements(Call, Lo, Hi); 1284} 1285 1286void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N, 1287 SDValue &Lo, SDValue &Hi) { 1288 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1289 RTLIB::POWI_F32, RTLIB::POWI_F64, 1290 RTLIB::POWI_F80, RTLIB::POWI_F128, 1291 RTLIB::POWI_PPCF128), 1292 N, false); 1293 GetPairElements(Call, Lo, Hi); 1294} 1295 1296void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N, 1297 SDValue &Lo, SDValue &Hi) { 1298 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1299 RTLIB::REM_F32, RTLIB::REM_F64, 1300 RTLIB::REM_F80, RTLIB::REM_F128, 1301 RTLIB::REM_PPCF128), 1302 N, false); 1303 GetPairElements(Call, Lo, Hi); 1304} 1305 1306void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N, 1307 SDValue &Lo, SDValue &Hi) { 1308 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1309 RTLIB::RINT_F32, RTLIB::RINT_F64, 1310 RTLIB::RINT_F80, RTLIB::RINT_F128, 1311 RTLIB::RINT_PPCF128), 1312 N, false); 1313 GetPairElements(Call, Lo, Hi); 1314} 1315 1316void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N, 1317 SDValue &Lo, SDValue &Hi) { 1318 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1319 RTLIB::ROUND_F32, 1320 RTLIB::ROUND_F64, 1321 RTLIB::ROUND_F80, 1322 RTLIB::ROUND_F128, 1323 RTLIB::ROUND_PPCF128), 1324 N, false); 1325 GetPairElements(Call, Lo, Hi); 1326} 1327 1328void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N, 1329 SDValue &Lo, SDValue &Hi) { 1330 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1331 RTLIB::SIN_F32, RTLIB::SIN_F64, 1332 RTLIB::SIN_F80, RTLIB::SIN_F128, 1333 RTLIB::SIN_PPCF128), 1334 N, false); 1335 GetPairElements(Call, Lo, Hi); 1336} 1337 1338void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N, 1339 SDValue &Lo, SDValue &Hi) { 1340 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1341 RTLIB::SQRT_F32, RTLIB::SQRT_F64, 1342 RTLIB::SQRT_F80, RTLIB::SQRT_F128, 1343 RTLIB::SQRT_PPCF128), 1344 N, false); 1345 GetPairElements(Call, Lo, Hi); 1346} 1347 1348void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo, 1349 SDValue &Hi) { 1350 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; 1351 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), 1352 RTLIB::SUB_F32, 1353 RTLIB::SUB_F64, 1354 RTLIB::SUB_F80, 1355 RTLIB::SUB_F128, 1356 RTLIB::SUB_PPCF128), 1357 N->getValueType(0), Ops, false, 1358 SDLoc(N)).first; 1359 GetPairElements(Call, Lo, Hi); 1360} 1361 1362void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N, 1363 SDValue &Lo, SDValue &Hi) { 1364 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0), 1365 RTLIB::TRUNC_F32, RTLIB::TRUNC_F64, 1366 RTLIB::TRUNC_F80, RTLIB::TRUNC_F128, 1367 RTLIB::TRUNC_PPCF128), 1368 N, false); 1369 GetPairElements(Call, Lo, Hi); 1370} 1371 1372void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo, 1373 SDValue &Hi) { 1374 if (ISD::isNormalLoad(N)) { 1375 ExpandRes_NormalLoad(N, Lo, Hi); 1376 return; 1377 } 1378 1379 assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!"); 1380 LoadSDNode *LD = cast<LoadSDNode>(N); 1381 SDValue Chain = LD->getChain(); 1382 SDValue Ptr = LD->getBasePtr(); 1383 SDLoc dl(N); 1384 1385 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0)); 1386 assert(NVT.isByteSized() && "Expanded type not byte sized!"); 1387 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?"); 1388 1389 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr, 1390 LD->getMemoryVT(), LD->getMemOperand()); 1391 1392 // Remember the chain. 1393 Chain = Hi.getValue(1); 1394 1395 // The low part is zero. 1396 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT), 1397 APInt(NVT.getSizeInBits(), 0)), dl, NVT); 1398 1399 // Modified the chain - switch anything that used the old chain to use the 1400 // new one. 1401 ReplaceValueWith(SDValue(LD, 1), Chain); 1402} 1403 1404void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, 1405 SDValue &Hi) { 1406 assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!"); 1407 EVT VT = N->getValueType(0); 1408 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1409 SDValue Src = N->getOperand(0); 1410 EVT SrcVT = Src.getValueType(); 1411 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP; 1412 SDLoc dl(N); 1413 1414 // First do an SINT_TO_FP, whether the original was signed or unsigned. 1415 // When promoting partial word types to i32 we must honor the signedness, 1416 // though. 1417 if (SrcVT.bitsLE(MVT::i32)) { 1418 // The integer can be represented exactly in an f64. 1419 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl, 1420 MVT::i32, Src); 1421 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT), 1422 APInt(NVT.getSizeInBits(), 0)), dl, NVT); 1423 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src); 1424 } else { 1425 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL; 1426 if (SrcVT.bitsLE(MVT::i64)) { 1427 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl, 1428 MVT::i64, Src); 1429 LC = RTLIB::SINTTOFP_I64_PPCF128; 1430 } else if (SrcVT.bitsLE(MVT::i128)) { 1431 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src); 1432 LC = RTLIB::SINTTOFP_I128_PPCF128; 1433 } 1434 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!"); 1435 1436 Hi = TLI.makeLibCall(DAG, LC, VT, Src, true, dl).first; 1437 GetPairElements(Hi, Lo, Hi); 1438 } 1439 1440 if (isSigned) 1441 return; 1442 1443 // Unsigned - fix up the SINT_TO_FP value just calculated. 1444 Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi); 1445 SrcVT = Src.getValueType(); 1446 1447 // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128. 1448 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 }; 1449 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 }; 1450 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 }; 1451 ArrayRef<uint64_t> Parts; 1452 1453 switch (SrcVT.getSimpleVT().SimpleTy) { 1454 default: 1455 llvm_unreachable("Unsupported UINT_TO_FP!"); 1456 case MVT::i32: 1457 Parts = TwoE32; 1458 break; 1459 case MVT::i64: 1460 Parts = TwoE64; 1461 break; 1462 case MVT::i128: 1463 Parts = TwoE128; 1464 break; 1465 } 1466 1467 // TODO: Are there fast-math-flags to propagate to this FADD? 1468 Lo = DAG.getNode(ISD::FADD, dl, VT, Hi, 1469 DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble, 1470 APInt(128, Parts)), 1471 dl, MVT::ppcf128)); 1472 Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT), 1473 Lo, Hi, ISD::SETLT); 1474 GetPairElements(Lo, Lo, Hi); 1475} 1476 1477 1478//===----------------------------------------------------------------------===// 1479// Float Operand Expansion 1480//===----------------------------------------------------------------------===// 1481 1482/// ExpandFloatOperand - This method is called when the specified operand of the 1483/// specified node is found to need expansion. At this point, all of the result 1484/// types of the node are known to be legal, but other operands of the node may 1485/// need promotion or expansion as well as the specified one. 1486bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) { 1487 DEBUG(dbgs() << "Expand float operand: "; N->dump(&DAG); dbgs() << "\n"); 1488 SDValue Res = SDValue(); 1489 1490 // See if the target wants to custom expand this node. 1491 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) 1492 return false; 1493 1494 switch (N->getOpcode()) { 1495 default: 1496#ifndef NDEBUG 1497 dbgs() << "ExpandFloatOperand Op #" << OpNo << ": "; 1498 N->dump(&DAG); dbgs() << "\n"; 1499#endif 1500 llvm_unreachable("Do not know how to expand this operator's operand!"); 1501 1502 case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break; 1503 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break; 1504 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; 1505 1506 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break; 1507 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break; 1508 case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break; 1509 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break; 1510 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break; 1511 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break; 1512 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break; 1513 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N), 1514 OpNo); break; 1515 } 1516 1517 // If the result is null, the sub-method took care of registering results etc. 1518 if (!Res.getNode()) return false; 1519 1520 // If the result is N, the sub-method updated N in place. Tell the legalizer 1521 // core about this. 1522 if (Res.getNode() == N) 1523 return true; 1524 1525 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && 1526 "Invalid operand expansion"); 1527 1528 ReplaceValueWith(SDValue(N, 0), Res); 1529 return false; 1530} 1531 1532/// FloatExpandSetCCOperands - Expand the operands of a comparison. This code 1533/// is shared among BR_CC, SELECT_CC, and SETCC handlers. 1534void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS, 1535 SDValue &NewRHS, 1536 ISD::CondCode &CCCode, 1537 const SDLoc &dl) { 1538 SDValue LHSLo, LHSHi, RHSLo, RHSHi; 1539 GetExpandedFloat(NewLHS, LHSLo, LHSHi); 1540 GetExpandedFloat(NewRHS, RHSLo, RHSHi); 1541 1542 assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!"); 1543 1544 // FIXME: This generated code sucks. We want to generate 1545 // FCMPU crN, hi1, hi2 1546 // BNE crN, L: 1547 // FCMPU crN, lo1, lo2 1548 // The following can be improved, but not that much. 1549 SDValue Tmp1, Tmp2, Tmp3; 1550 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), 1551 LHSHi, RHSHi, ISD::SETOEQ); 1552 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), 1553 LHSLo, RHSLo, CCCode); 1554 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); 1555 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), 1556 LHSHi, RHSHi, ISD::SETUNE); 1557 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), 1558 LHSHi, RHSHi, CCCode); 1559 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); 1560 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3); 1561 NewRHS = SDValue(); // LHS is the result, not a compare. 1562} 1563 1564SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) { 1565 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3); 1566 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get(); 1567 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N)); 1568 1569 // If ExpandSetCCOperands returned a scalar, we need to compare the result 1570 // against zero to select between true and false values. 1571 if (!NewRHS.getNode()) { 1572 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType()); 1573 CCCode = ISD::SETNE; 1574 } 1575 1576 // Update N to have the operands specified. 1577 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), 1578 DAG.getCondCode(CCCode), NewLHS, NewRHS, 1579 N->getOperand(4)), 0); 1580} 1581 1582SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) { 1583 assert(N->getOperand(1).getValueType() == MVT::ppcf128 && 1584 "Logic only correct for ppcf128!"); 1585 SDValue Lo, Hi; 1586 GetExpandedFloat(N->getOperand(1), Lo, Hi); 1587 // The ppcf128 value is providing only the sign; take it from the 1588 // higher-order double (which must have the larger magnitude). 1589 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), 1590 N->getValueType(0), N->getOperand(0), Hi); 1591} 1592 1593SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) { 1594 assert(N->getOperand(0).getValueType() == MVT::ppcf128 && 1595 "Logic only correct for ppcf128!"); 1596 SDValue Lo, Hi; 1597 GetExpandedFloat(N->getOperand(0), Lo, Hi); 1598 // Round it the rest of the way (e.g. to f32) if needed. 1599 return DAG.getNode(ISD::FP_ROUND, SDLoc(N), 1600 N->getValueType(0), Hi, N->getOperand(1)); 1601} 1602 1603SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) { 1604 EVT RVT = N->getValueType(0); 1605 SDLoc dl(N); 1606 1607 // Expand ppcf128 to i32 by hand for the benefit of llvm-gcc bootstrap on 1608 // PPC (the libcall is not available). FIXME: Do this in a less hacky way. 1609 if (RVT == MVT::i32) { 1610 assert(N->getOperand(0).getValueType() == MVT::ppcf128 && 1611 "Logic only correct for ppcf128!"); 1612 SDValue Res = DAG.getNode(ISD::FP_ROUND_INREG, dl, MVT::ppcf128, 1613 N->getOperand(0), DAG.getValueType(MVT::f64)); 1614 Res = DAG.getNode(ISD::FP_ROUND, dl, MVT::f64, Res, 1615 DAG.getIntPtrConstant(1, dl)); 1616 return DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Res); 1617 } 1618 1619 RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT); 1620 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!"); 1621 return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), false, dl).first; 1622} 1623 1624SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) { 1625 EVT RVT = N->getValueType(0); 1626 SDLoc dl(N); 1627 1628 // Expand ppcf128 to i32 by hand for the benefit of llvm-gcc bootstrap on 1629 // PPC (the libcall is not available). FIXME: Do this in a less hacky way. 1630 if (RVT == MVT::i32) { 1631 assert(N->getOperand(0).getValueType() == MVT::ppcf128 && 1632 "Logic only correct for ppcf128!"); 1633 const uint64_t TwoE31[] = {0x41e0000000000000LL, 0}; 1634 APFloat APF = APFloat(APFloat::PPCDoubleDouble, APInt(128, TwoE31)); 1635 SDValue Tmp = DAG.getConstantFP(APF, dl, MVT::ppcf128); 1636 // X>=2^31 ? (int)(X-2^31)+0x80000000 : (int)X 1637 // FIXME: generated code sucks. 1638 // TODO: Are there fast-math-flags to propagate to this FSUB? 1639 return DAG.getSelectCC(dl, N->getOperand(0), Tmp, 1640 DAG.getNode(ISD::ADD, dl, MVT::i32, 1641 DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, 1642 DAG.getNode(ISD::FSUB, dl, 1643 MVT::ppcf128, 1644 N->getOperand(0), 1645 Tmp)), 1646 DAG.getConstant(0x80000000, dl, 1647 MVT::i32)), 1648 DAG.getNode(ISD::FP_TO_SINT, dl, 1649 MVT::i32, N->getOperand(0)), 1650 ISD::SETGE); 1651 } 1652 1653 RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT); 1654 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!"); 1655 return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0), 1656 false, dl).first; 1657} 1658 1659SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) { 1660 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1); 1661 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get(); 1662 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N)); 1663 1664 // If ExpandSetCCOperands returned a scalar, we need to compare the result 1665 // against zero to select between true and false values. 1666 if (!NewRHS.getNode()) { 1667 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType()); 1668 CCCode = ISD::SETNE; 1669 } 1670 1671 // Update N to have the operands specified. 1672 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS, 1673 N->getOperand(2), N->getOperand(3), 1674 DAG.getCondCode(CCCode)), 0); 1675} 1676 1677SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) { 1678 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1); 1679 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get(); 1680 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N)); 1681 1682 // If ExpandSetCCOperands returned a scalar, use it. 1683 if (!NewRHS.getNode()) { 1684 assert(NewLHS.getValueType() == N->getValueType(0) && 1685 "Unexpected setcc expansion!"); 1686 return NewLHS; 1687 } 1688 1689 // Otherwise, update N to have the operands specified. 1690 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS, 1691 DAG.getCondCode(CCCode)), 0); 1692} 1693 1694SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) { 1695 if (ISD::isNormalStore(N)) 1696 return ExpandOp_NormalStore(N, OpNo); 1697 1698 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!"); 1699 assert(OpNo == 1 && "Can only expand the stored value so far"); 1700 StoreSDNode *ST = cast<StoreSDNode>(N); 1701 1702 SDValue Chain = ST->getChain(); 1703 SDValue Ptr = ST->getBasePtr(); 1704 1705 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), 1706 ST->getValue().getValueType()); 1707 assert(NVT.isByteSized() && "Expanded type not byte sized!"); 1708 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?"); 1709 (void)NVT; 1710 1711 SDValue Lo, Hi; 1712 GetExpandedOp(ST->getValue(), Lo, Hi); 1713 1714 return DAG.getTruncStore(Chain, SDLoc(N), Hi, Ptr, 1715 ST->getMemoryVT(), ST->getMemOperand()); 1716} 1717 1718//===----------------------------------------------------------------------===// 1719// Float Operand Promotion 1720//===----------------------------------------------------------------------===// 1721// 1722 1723static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) { 1724 if (OpVT == MVT::f16) { 1725 return ISD::FP16_TO_FP; 1726 } else if (RetVT == MVT::f16) { 1727 return ISD::FP_TO_FP16; 1728 } 1729 1730 report_fatal_error("Attempt at an invalid promotion-related conversion"); 1731} 1732 1733bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) { 1734 SDValue R = SDValue(); 1735 1736 // Nodes that use a promotion-requiring floating point operand, but doesn't 1737 // produce a promotion-requiring floating point result, need to be legalized 1738 // to use the promoted float operand. Nodes that produce at least one 1739 // promotion-requiring floating point result have their operands legalized as 1740 // a part of PromoteFloatResult. 1741 switch (N->getOpcode()) { 1742 default: 1743 llvm_unreachable("Do not know how to promote this operator's operand!"); 1744 1745 case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break; 1746 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break; 1747 case ISD::FP_TO_SINT: 1748 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break; 1749 case ISD::FP_EXTEND: R = PromoteFloatOp_FP_EXTEND(N, OpNo); break; 1750 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break; 1751 case ISD::SETCC: R = PromoteFloatOp_SETCC(N, OpNo); break; 1752 case ISD::STORE: R = PromoteFloatOp_STORE(N, OpNo); break; 1753 } 1754 1755 if (R.getNode()) 1756 ReplaceValueWith(SDValue(N, 0), R); 1757 return false; 1758} 1759 1760SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) { 1761 SDValue Op = N->getOperand(0); 1762 EVT OpVT = Op->getValueType(0); 1763 1764 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits()); 1765 assert (IVT == N->getValueType(0) && "Bitcast to type of different size"); 1766 1767 SDValue Promoted = GetPromotedFloat(N->getOperand(0)); 1768 EVT PromotedVT = Promoted->getValueType(0); 1769 1770 // Convert the promoted float value to the desired IVT. 1771 return DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N), IVT, 1772 Promoted); 1773} 1774 1775// Promote Operand 1 of FCOPYSIGN. Operand 0 ought to be handled by 1776// PromoteFloatRes_FCOPYSIGN. 1777SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) { 1778 assert (OpNo == 1 && "Only Operand 1 must need promotion here"); 1779 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); 1780 1781 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), 1782 N->getOperand(0), Op1); 1783} 1784 1785// Convert the promoted float value to the desired integer type 1786SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) { 1787 SDValue Op = GetPromotedFloat(N->getOperand(0)); 1788 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), Op); 1789} 1790 1791SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) { 1792 SDValue Op = GetPromotedFloat(N->getOperand(0)); 1793 EVT VT = N->getValueType(0); 1794 1795 // Desired VT is same as promoted type. Use promoted float directly. 1796 if (VT == Op->getValueType(0)) 1797 return Op; 1798 1799 // Else, extend the promoted float value to the desired VT. 1800 return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op); 1801} 1802 1803// Promote the float operands used for comparison. The true- and false- 1804// operands have the same type as the result and are promoted, if needed, by 1805// PromoteFloatRes_SELECT_CC 1806SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) { 1807 SDValue LHS = GetPromotedFloat(N->getOperand(0)); 1808 SDValue RHS = GetPromotedFloat(N->getOperand(1)); 1809 1810 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0), 1811 LHS, RHS, N->getOperand(2), N->getOperand(3), 1812 N->getOperand(4)); 1813} 1814 1815// Construct a SETCC that compares the promoted values and sets the conditional 1816// code. 1817SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) { 1818 EVT VT = N->getValueType(0); 1819 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1820 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); 1821 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); 1822 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get(); 1823 1824 return DAG.getSetCC(SDLoc(N), NVT, Op0, Op1, CCCode); 1825 1826} 1827 1828// Lower the promoted Float down to the integer value of same size and construct 1829// a STORE of the integer value. 1830SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) { 1831 StoreSDNode *ST = cast<StoreSDNode>(N); 1832 SDValue Val = ST->getValue(); 1833 SDLoc DL(N); 1834 1835 SDValue Promoted = GetPromotedFloat(Val); 1836 EVT VT = ST->getOperand(1)->getValueType(0); 1837 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); 1838 1839 SDValue NewVal; 1840 NewVal = DAG.getNode(GetPromotionOpcode(Promoted.getValueType(), VT), DL, 1841 IVT, Promoted); 1842 1843 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(), 1844 ST->getMemOperand()); 1845} 1846 1847//===----------------------------------------------------------------------===// 1848// Float Result Promotion 1849//===----------------------------------------------------------------------===// 1850 1851void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) { 1852 SDValue R = SDValue(); 1853 1854 switch (N->getOpcode()) { 1855 // These opcodes cannot appear if promotion of FP16 is done in the backend 1856 // instead of Clang 1857 case ISD::FP16_TO_FP: 1858 case ISD::FP_TO_FP16: 1859 default: 1860 llvm_unreachable("Do not know how to promote this operator's result!"); 1861 1862 case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break; 1863 case ISD::ConstantFP: R = PromoteFloatRes_ConstantFP(N); break; 1864 case ISD::EXTRACT_VECTOR_ELT: 1865 R = PromoteFloatRes_EXTRACT_VECTOR_ELT(N); break; 1866 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break; 1867 1868 // Unary FP Operations 1869 case ISD::FABS: 1870 case ISD::FCEIL: 1871 case ISD::FCOS: 1872 case ISD::FEXP: 1873 case ISD::FEXP2: 1874 case ISD::FFLOOR: 1875 case ISD::FLOG: 1876 case ISD::FLOG2: 1877 case ISD::FLOG10: 1878 case ISD::FNEARBYINT: 1879 case ISD::FNEG: 1880 case ISD::FRINT: 1881 case ISD::FROUND: 1882 case ISD::FSIN: 1883 case ISD::FSQRT: 1884 case ISD::FTRUNC: R = PromoteFloatRes_UnaryOp(N); break; 1885 1886 // Binary FP Operations 1887 case ISD::FADD: 1888 case ISD::FDIV: 1889 case ISD::FMAXNAN: 1890 case ISD::FMINNAN: 1891 case ISD::FMAXNUM: 1892 case ISD::FMINNUM: 1893 case ISD::FMUL: 1894 case ISD::FPOW: 1895 case ISD::FREM: 1896 case ISD::FSUB: R = PromoteFloatRes_BinOp(N); break; 1897 1898 case ISD::FMA: // FMA is same as FMAD 1899 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break; 1900 1901 case ISD::FPOWI: R = PromoteFloatRes_FPOWI(N); break; 1902 1903 case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break; 1904 case ISD::LOAD: R = PromoteFloatRes_LOAD(N); break; 1905 case ISD::SELECT: R = PromoteFloatRes_SELECT(N); break; 1906 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break; 1907 1908 case ISD::SINT_TO_FP: 1909 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break; 1910 case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break; 1911 1912 } 1913 1914 if (R.getNode()) 1915 SetPromotedFloat(SDValue(N, ResNo), R); 1916} 1917 1918// Bitcast from i16 to f16: convert the i16 to a f32 value instead. 1919// At this point, it is not possible to determine if the bitcast value is 1920// eventually stored to memory or promoted to f32 or promoted to a floating 1921// point at a higher precision. Some of these cases are handled by FP_EXTEND, 1922// STORE promotion handlers. 1923SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) { 1924 EVT VT = N->getValueType(0); 1925 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1926 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, 1927 N->getOperand(0)); 1928} 1929 1930SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) { 1931 ConstantFPSDNode *CFPNode = cast<ConstantFPSDNode>(N); 1932 EVT VT = N->getValueType(0); 1933 SDLoc DL(N); 1934 1935 // Get the (bit-cast) APInt of the APFloat and build an integer constant 1936 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); 1937 SDValue C = DAG.getConstant(CFPNode->getValueAPF().bitcastToAPInt(), DL, 1938 IVT); 1939 1940 // Convert the Constant to the desired FP type 1941 // FIXME We might be able to do the conversion during compilation and get rid 1942 // of it from the object code 1943 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 1944 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C); 1945} 1946 1947// If the Index operand is a constant, try to redirect the extract operation to 1948// the correct legalized vector. If not, bit-convert the input vector to 1949// equivalent integer vector. Extract the element as an (bit-cast) integer 1950// value and convert it to the promoted type. 1951SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) { 1952 SDLoc DL(N); 1953 1954 // If the index is constant, try to extract the value from the legalized 1955 // vector type. 1956 if (isa<ConstantSDNode>(N->getOperand(1))) { 1957 SDValue Vec = N->getOperand(0); 1958 SDValue Idx = N->getOperand(1); 1959 EVT VecVT = Vec->getValueType(0); 1960 EVT EltVT = VecVT.getVectorElementType(); 1961 1962 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); 1963 1964 switch (getTypeAction(VecVT)) { 1965 default: break; 1966 case TargetLowering::TypeScalarizeVector: { 1967 SDValue Res = GetScalarizedVector(N->getOperand(0)); 1968 ReplaceValueWith(SDValue(N, 0), Res); 1969 return SDValue(); 1970 } 1971 case TargetLowering::TypeWidenVector: { 1972 Vec = GetWidenedVector(Vec); 1973 SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx); 1974 ReplaceValueWith(SDValue(N, 0), Res); 1975 return SDValue(); 1976 } 1977 case TargetLowering::TypeSplitVector: { 1978 SDValue Lo, Hi; 1979 GetSplitVector(Vec, Lo, Hi); 1980 1981 uint64_t LoElts = Lo.getValueType().getVectorNumElements(); 1982 SDValue Res; 1983 if (IdxVal < LoElts) 1984 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Lo, Idx); 1985 else 1986 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Hi, 1987 DAG.getConstant(IdxVal - LoElts, DL, 1988 Idx.getValueType())); 1989 ReplaceValueWith(SDValue(N, 0), Res); 1990 return SDValue(); 1991 } 1992 1993 } 1994 } 1995 1996 // Bit-convert the input vector to the equivalent integer vector 1997 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0)); 1998 EVT IVT = NewOp.getValueType().getVectorElementType(); 1999 2000 // Extract the element as an (bit-cast) integer value 2001 SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT, 2002 NewOp, N->getOperand(1)); 2003 2004 // Convert the element to the desired FP type 2005 EVT VT = N->getValueType(0); 2006 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 2007 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, NewVal); 2008} 2009 2010// FCOPYSIGN(X, Y) returns the value of X with the sign of Y. If the result 2011// needs promotion, so does the argument X. Note that Y, if needed, will be 2012// handled during operand promotion. 2013SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) { 2014 EVT VT = N->getValueType(0); 2015 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 2016 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); 2017 2018 SDValue Op1 = N->getOperand(1); 2019 2020 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1); 2021} 2022 2023// Unary operation where the result and the operand have PromoteFloat type 2024// action. Construct a new SDNode with the promoted float value of the old 2025// operand. 2026SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) { 2027 EVT VT = N->getValueType(0); 2028 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 2029 SDValue Op = GetPromotedFloat(N->getOperand(0)); 2030 2031 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op); 2032} 2033 2034// Binary operations where the result and both operands have PromoteFloat type 2035// action. Construct a new SDNode with the promoted float values of the old 2036// operands. 2037SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) { 2038 EVT VT = N->getValueType(0); 2039 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 2040 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); 2041 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); 2042 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, N->getFlags()); 2043} 2044 2045SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) { 2046 EVT VT = N->getValueType(0); 2047 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 2048 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); 2049 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); 2050 SDValue Op2 = GetPromotedFloat(N->getOperand(2)); 2051 2052 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, Op2); 2053} 2054 2055// Promote the Float (first) operand and retain the Integer (second) operand 2056SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) { 2057 EVT VT = N->getValueType(0); 2058 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 2059 SDValue Op0 = GetPromotedFloat(N->getOperand(0)); 2060 SDValue Op1 = N->getOperand(1); 2061 2062 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1); 2063} 2064 2065// Explicit operation to reduce precision. Reduce the value to half precision 2066// and promote it back to the legal type. 2067SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) { 2068 SDLoc DL(N); 2069 2070 SDValue Op = N->getOperand(0); 2071 EVT VT = N->getValueType(0); 2072 EVT OpVT = Op->getValueType(0); 2073 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 2074 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); 2075 2076 // Round promoted float to desired precision 2077 SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op); 2078 // Promote it back to the legal output type 2079 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round); 2080} 2081 2082SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) { 2083 LoadSDNode *L = cast<LoadSDNode>(N); 2084 EVT VT = N->getValueType(0); 2085 2086 // Load the value as an integer value with the same number of bits 2087 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); 2088 SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), 2089 IVT, SDLoc(N), L->getChain(), L->getBasePtr(), 2090 L->getOffset(), L->getPointerInfo(), IVT, L->isVolatile(), 2091 L->isNonTemporal(), false, L->getAlignment(), 2092 L->getAAInfo()); 2093 // Legalize the chain result by replacing uses of the old value chain with the 2094 // new one 2095 ReplaceValueWith(SDValue(N, 1), newL.getValue(1)); 2096 2097 // Convert the integer value to the desired FP type 2098 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 2099 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, newL); 2100} 2101 2102// Construct a new SELECT node with the promoted true- and false- values. 2103SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) { 2104 SDValue TrueVal = GetPromotedFloat(N->getOperand(1)); 2105 SDValue FalseVal = GetPromotedFloat(N->getOperand(2)); 2106 2107 return DAG.getNode(ISD::SELECT, SDLoc(N), TrueVal->getValueType(0), 2108 N->getOperand(0), TrueVal, FalseVal); 2109} 2110 2111// Construct a new SELECT_CC node with the promoted true- and false- values. 2112// The operands used for comparison are promoted by PromoteFloatOp_SELECT_CC. 2113SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) { 2114 SDValue TrueVal = GetPromotedFloat(N->getOperand(2)); 2115 SDValue FalseVal = GetPromotedFloat(N->getOperand(3)); 2116 2117 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0), 2118 N->getOperand(0), N->getOperand(1), TrueVal, FalseVal, 2119 N->getOperand(4)); 2120} 2121 2122// Construct a SDNode that transforms the SINT or UINT operand to the promoted 2123// float type. 2124SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) { 2125 SDLoc DL(N); 2126 EVT VT = N->getValueType(0); 2127 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 2128 SDValue NV = DAG.getNode(N->getOpcode(), DL, NVT, N->getOperand(0)); 2129 // Round the value to the desired precision (that of the source type). 2130 return DAG.getNode( 2131 ISD::FP_EXTEND, DL, NVT, 2132 DAG.getNode(ISD::FP_ROUND, DL, VT, NV, DAG.getIntPtrConstant(0, DL))); 2133} 2134 2135SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) { 2136 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), 2137 N->getValueType(0))); 2138} 2139 2140