1; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
2; RUN: llc < %s -mtriple=x86_64-linux -join-physregs | FileCheck %s -check-prefix=X64
3; RUN: llc < %s -mtriple=x86_64-win32 -join-physregs | FileCheck %s -check-prefix=X64
4
5; Some of these tests depend on -join-physregs to commute instructions.
6
7; The immediate can be encoded in a smaller way if the
8; instruction is a sub instead of an add.
9
10define i32 @test1(i32 inreg %a) nounwind {
11  %b = add i32 %a, 128
12  ret i32 %b
13; X32: subl	$-128, %eax
14; X64: subl $-128, 
15}
16define i64 @test2(i64 inreg %a) nounwind {
17  %b = add i64 %a, 2147483648
18  ret i64 %b
19; X32: addl	$-2147483648, %eax
20; X64: subq	$-2147483648,
21}
22define i64 @test3(i64 inreg %a) nounwind {
23  %b = add i64 %a, 128
24  ret i64 %b
25  
26; X32: addl $128, %eax
27; X64: subq	$-128,
28}
29
30define i1 @test4(i32 %v1, i32 %v2, i32* %X) nounwind {
31entry:
32  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
33  %sum = extractvalue {i32, i1} %t, 0
34  %obit = extractvalue {i32, i1} %t, 1
35  br i1 %obit, label %overflow, label %normal
36
37normal:
38  store i32 0, i32* %X
39  br label %overflow
40
41overflow:
42  ret i1 false
43  
44; X32: test4:
45; X32: addl
46; X32-NEXT: jo
47
48; X64:        test4:
49; X64:          addl	%e[[A1:si|dx]], %e[[A0:di|cx]]
50; X64-NEXT:	jo
51}
52
53define i1 @test5(i32 %v1, i32 %v2, i32* %X) nounwind {
54entry:
55  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
56  %sum = extractvalue {i32, i1} %t, 0
57  %obit = extractvalue {i32, i1} %t, 1
58  br i1 %obit, label %carry, label %normal
59
60normal:
61  store i32 0, i32* %X
62  br label %carry
63
64carry:
65  ret i1 false
66
67; X32: test5:
68; X32: addl
69; X32-NEXT: jb
70
71; X64:        test5:
72; X64:          addl	%e[[A1]], %e[[A0]]
73; X64-NEXT:	jb
74}
75
76declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
77declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
78
79
80define i64 @test6(i64 %A, i32 %B) nounwind {
81        %tmp12 = zext i32 %B to i64             ; <i64> [#uses=1]
82        %tmp3 = shl i64 %tmp12, 32              ; <i64> [#uses=1]
83        %tmp5 = add i64 %tmp3, %A               ; <i64> [#uses=1]
84        ret i64 %tmp5
85
86; X32: test6:
87; X32:	    movl 12(%esp), %edx
88; X32-NEXT: addl 8(%esp), %edx
89; X32-NEXT: movl 4(%esp), %eax
90; X32-NEXT: ret
91        
92; X64: test6:
93; X64:	shlq	$32, %r[[A1]]
94; X64:	leaq	(%r[[A1]],%r[[A0]]), %rax
95; X64:	ret
96}
97
98define {i32, i1} @test7(i32 %v1, i32 %v2) nounwind {
99   %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
100   ret {i32, i1} %t
101}
102
103; X64: test7:
104; X64: addl %e[[A1]], %eax
105; X64-NEXT: setb %dl
106; X64-NEXT: ret
107
108; PR5443
109define {i64, i1} @test8(i64 %left, i64 %right) nounwind {
110entry:
111    %extleft = zext i64 %left to i65
112    %extright = zext i64 %right to i65
113    %sum = add i65 %extleft, %extright
114    %res.0 = trunc i65 %sum to i64
115    %overflow = and i65 %sum, -18446744073709551616
116    %res.1 = icmp ne i65 %overflow, 0
117    %final0 = insertvalue {i64, i1} undef, i64 %res.0, 0
118    %final1 = insertvalue {i64, i1} %final0, i1 %res.1, 1
119    ret {i64, i1} %final1
120}
121
122; X64: test8:
123; X64: addq
124; X64-NEXT: sbbq
125; X64-NEXT: testb
126
127define i32 @test9(i32 %x, i32 %y) nounwind readnone {
128  %cmp = icmp eq i32 %x, 10
129  %sub = sext i1 %cmp to i32
130  %cond = add i32 %sub, %y
131  ret i32 %cond
132; X64: test9:
133; X64: cmpl $10
134; X64: sete
135; X64: subl
136; X64: ret
137}
138
139define i1 @test10(i32 %x) nounwind {
140entry:
141  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %x, i32 1)
142  %obit = extractvalue {i32, i1} %t, 1
143  ret i1 %obit
144
145; X32: test10:
146; X32: incl
147; X32-NEXT: seto
148
149; X64: test10:
150; X64: incl
151; X64-NEXT: seto
152}
153