assembler-aarch32.h revision 1e85b7f2e8ad2bfb233de29405aade635ed207ce 
1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27#ifndef VIXL_AARCH32_ASSEMBLER_AARCH32_H_
28#define VIXL_AARCH32_ASSEMBLER_AARCH32_H_
29
30#include "code-buffer-vixl.h"
31#include "aarch32/label-aarch32.h"
32
33namespace vixl {
34namespace aarch32 {
35
36class Assembler : public Instructions {
37  InstructionSet isa_;
38  Condition first_condition_;
39  uint16_t it_mask_;
40  bool has_32_dregs_;
41
42 protected:
43  CodeBuffer buffer_;
44
45  void EmitT32_16(uint16_t instr);
46  void EmitT32_32(uint32_t instr);
47  void EmitA32(uint32_t instr);
48  // Check that the condition of the current instruction is consistent with the
49  // IT state.
50  void CheckIT(Condition condition) {
51#ifdef VIXL_DEBUG
52    PerformCheckIT(condition);
53#else
54    USE(condition);
55#endif
56  }
57#ifdef VIXL_DEBUG
58  void PerformCheckIT(Condition condition);
59#endif
60  void AdvanceIT() { it_mask_ = (it_mask_ << 1) & 0xf; }
61
62 public:
63  explicit Assembler(InstructionSet isa = A32)
64      : isa_(isa), first_condition_(al), it_mask_(0), has_32_dregs_(true) {}
65  explicit Assembler(size_t size, InstructionSet isa = A32)
66      : isa_(isa),
67        first_condition_(al),
68        it_mask_(0),
69        has_32_dregs_(true),
70        buffer_(size) {}
71  Assembler(void* buffer, size_t size, InstructionSet isa = A32)
72      : isa_(isa),
73        first_condition_(al),
74        it_mask_(0),
75        has_32_dregs_(true),
76        buffer_(buffer, size) {}
77  virtual ~Assembler() {}
78  void UseInstructionSet(InstructionSet isa) {
79    VIXL_ASSERT((isa_ == isa) || (GetCursorOffset() == 0));
80    isa_ = isa;
81  }
82  InstructionSet GetInstructionSetInUse() const { return isa_; }
83  void UseT32() { UseInstructionSet(T32); }
84  void UseA32() { UseInstructionSet(A32); }
85  bool IsUsingT32() const { return GetInstructionSetInUse() == T32; }
86  bool IsUsingA32() const { return GetInstructionSetInUse() == A32; }
87  void SetIT(Condition first_condition, uint16_t it_mask) {
88    VIXL_ASSERT(it_mask_ == 0);
89    first_condition_ = first_condition;
90    it_mask_ = it_mask;
91  }
92  bool Is16BitEncoding(uint16_t instr) const {
93    VIXL_ASSERT(IsUsingT32());
94    return instr < 0xe800;
95  }
96  bool InITBlock() { return it_mask_ != 0; }
97  bool OutsideITBlock() { return it_mask_ == 0; }
98  bool OutsideITBlockOrLast() { return (it_mask_ == 0) || (it_mask_ == 0x8); }
99  bool OutsideITBlockAndAlOrLast(Condition cond) {
100    return ((it_mask_ == 0) && cond.Is(al)) || (it_mask_ == 0x8);
101  }
102  void CheckNotIT() { VIXL_ASSERT(it_mask_ == 0); }
103  bool Has32DRegs() const { return has_32_dregs_; }
104  void SetHas32DRegs(bool has_32_dregs) { has_32_dregs_ = has_32_dregs; }
105
106  CodeBuffer& GetBuffer() { return buffer_; }
107  uint32_t GetCursorOffset() const { return buffer_.GetCursorOffset(); }
108  // Return the address of an offset in the buffer.
109  template <typename T>
110  T GetOffsetAddress(ptrdiff_t offset) const {
111    VIXL_STATIC_ASSERT(sizeof(T) >= sizeof(uintptr_t));
112    return buffer_.GetOffsetAddress<T>(offset);
113  }
114  uint32_t GetArchitectureStatePCOffset() const { return IsUsingT32() ? 4 : 8; }
115  // Return the address of the start of the buffer.
116  template <typename T>
117  T GetStartAddress() const {
118    VIXL_STATIC_ASSERT(sizeof(T) >= sizeof(uintptr_t));
119    return GetOffsetAddress<T>(0);
120  }
121  void EncodeLabelFor(const Label::ForwardReference& forward, Label* label);
122  uint32_t Link(uint32_t instr,
123                Label* label,
124                const Label::LabelEmitOperator& op);
125  void bind(Label* label);
126  void place(RawLiteral* literal) {
127    bind(literal);
128    GetBuffer().EmitData(literal->GetDataAddress(), literal->GetSize());
129    GetBuffer().Align();
130  }
131  void FinalizeCode() { GetBuffer().SetClean(); }
132
133  size_t GetSizeOfCodeGeneratedSince(Label* label) const {
134    VIXL_ASSERT(label->IsBound());
135    return buffer_.GetOffsetFrom(label->GetLocation());
136  }
137
138  size_t GetSizeOfCodeGenerated() const { return buffer_.GetOffsetFrom(0); }
139
140  // Helpers for it instruction.
141  void it(Condition cond) { it(cond, 0x8); }
142  void itt(Condition cond) { it(cond, 0x4); }
143  void ite(Condition cond) { it(cond, 0xc); }
144  void ittt(Condition cond) { it(cond, 0x2); }
145  void itet(Condition cond) { it(cond, 0xa); }
146  void itte(Condition cond) { it(cond, 0x6); }
147  void itee(Condition cond) { it(cond, 0xe); }
148  void itttt(Condition cond) { it(cond, 0x1); }
149  void itett(Condition cond) { it(cond, 0x9); }
150  void ittet(Condition cond) { it(cond, 0x5); }
151  void iteet(Condition cond) { it(cond, 0xd); }
152  void ittte(Condition cond) { it(cond, 0x3); }
153  void itete(Condition cond) { it(cond, 0xb); }
154  void ittee(Condition cond) { it(cond, 0x7); }
155  void iteee(Condition cond) { it(cond, 0xf); }
156
157  // Start of generated code.
158  enum InstructionType {
159    kAdc,
160    kAdcs,
161    kAdd,
162    kAdds,
163    kAddw,
164    kAdr,
165    kAnd,
166    kAnds,
167    kAsr,
168    kAsrs,
169    kB,
170    kBfc,
171    kBfi,
172    kBic,
173    kBics,
174    kBkpt,
175    kBl,
176    kBlx,
177    kBx,
178    kBxj,
179    kCbnz,
180    kCbz,
181    kClrex,
182    kClz,
183    kCmn,
184    kCmp,
185    kCrc32b,
186    kCrc32cb,
187    kCrc32ch,
188    kCrc32cw,
189    kCrc32h,
190    kCrc32w,
191    kDmb,
192    kDsb,
193    kEor,
194    kEors,
195    kFldmdbx,
196    kFldmiax,
197    kFstmdbx,
198    kFstmiax,
199    kHlt,
200    kHvc,
201    kIsb,
202    kIt,
203    kLda,
204    kLdab,
205    kLdaex,
206    kLdaexb,
207    kLdaexd,
208    kLdaexh,
209    kLdah,
210    kLdm,
211    kLdmda,
212    kLdmdb,
213    kLdmea,
214    kLdmed,
215    kLdmfa,
216    kLdmfd,
217    kLdmib,
218    kLdr,
219    kLdrb,
220    kLdrd,
221    kLdrex,
222    kLdrexb,
223    kLdrexd,
224    kLdrexh,
225    kLdrh,
226    kLdrsb,
227    kLdrsh,
228    kLsl,
229    kLsls,
230    kLsr,
231    kLsrs,
232    kMla,
233    kMlas,
234    kMls,
235    kMov,
236    kMovs,
237    kMovt,
238    kMovw,
239    kMrs,
240    kMsr,
241    kMul,
242    kMuls,
243    kMvn,
244    kMvns,
245    kNop,
246    kOrn,
247    kOrns,
248    kOrr,
249    kOrrs,
250    kPkhbt,
251    kPkhtb,
252    kPld,
253    kPldw,
254    kPli,
255    kPop,
256    kPush,
257    kQadd,
258    kQadd16,
259    kQadd8,
260    kQasx,
261    kQdadd,
262    kQdsub,
263    kQsax,
264    kQsub,
265    kQsub16,
266    kQsub8,
267    kRbit,
268    kRev,
269    kRev16,
270    kRevsh,
271    kRor,
272    kRors,
273    kRrx,
274    kRrxs,
275    kRsb,
276    kRsbs,
277    kRsc,
278    kRscs,
279    kSadd16,
280    kSadd8,
281    kSasx,
282    kSbc,
283    kSbcs,
284    kSbfx,
285    kSdiv,
286    kSel,
287    kShadd16,
288    kShadd8,
289    kShasx,
290    kShsax,
291    kShsub16,
292    kShsub8,
293    kSmlabb,
294    kSmlabt,
295    kSmlad,
296    kSmladx,
297    kSmlal,
298    kSmlalbb,
299    kSmlalbt,
300    kSmlald,
301    kSmlaldx,
302    kSmlals,
303    kSmlaltb,
304    kSmlaltt,
305    kSmlatb,
306    kSmlatt,
307    kSmlawb,
308    kSmlawt,
309    kSmlsd,
310    kSmlsdx,
311    kSmlsld,
312    kSmlsldx,
313    kSmmla,
314    kSmmlar,
315    kSmmls,
316    kSmmlsr,
317    kSmmul,
318    kSmmulr,
319    kSmuad,
320    kSmuadx,
321    kSmulbb,
322    kSmulbt,
323    kSmull,
324    kSmulls,
325    kSmultb,
326    kSmultt,
327    kSmulwb,
328    kSmulwt,
329    kSmusd,
330    kSmusdx,
331    kSsat,
332    kSsat16,
333    kSsax,
334    kSsub16,
335    kSsub8,
336    kStl,
337    kStlb,
338    kStlex,
339    kStlexb,
340    kStlexd,
341    kStlexh,
342    kStlh,
343    kStm,
344    kStmda,
345    kStmdb,
346    kStmea,
347    kStmed,
348    kStmfa,
349    kStmfd,
350    kStmib,
351    kStr,
352    kStrb,
353    kStrd,
354    kStrex,
355    kStrexb,
356    kStrexd,
357    kStrexh,
358    kStrh,
359    kSub,
360    kSubs,
361    kSubw,
362    kSvc,
363    kSxtab,
364    kSxtab16,
365    kSxtah,
366    kSxtb,
367    kSxtb16,
368    kSxth,
369    kTbb,
370    kTbh,
371    kTeq,
372    kTst,
373    kUadd16,
374    kUadd8,
375    kUasx,
376    kUbfx,
377    kUdf,
378    kUdiv,
379    kUhadd16,
380    kUhadd8,
381    kUhasx,
382    kUhsax,
383    kUhsub16,
384    kUhsub8,
385    kUmaal,
386    kUmlal,
387    kUmlals,
388    kUmull,
389    kUmulls,
390    kUqadd16,
391    kUqadd8,
392    kUqasx,
393    kUqsax,
394    kUqsub16,
395    kUqsub8,
396    kUsad8,
397    kUsada8,
398    kUsat,
399    kUsat16,
400    kUsax,
401    kUsub16,
402    kUsub8,
403    kUxtab,
404    kUxtab16,
405    kUxtah,
406    kUxtb,
407    kUxtb16,
408    kUxth,
409    kVaba,
410    kVabal,
411    kVabd,
412    kVabdl,
413    kVabs,
414    kVacge,
415    kVacgt,
416    kVacle,
417    kVaclt,
418    kVadd,
419    kVaddhn,
420    kVaddl,
421    kVaddw,
422    kVand,
423    kVbic,
424    kVbif,
425    kVbit,
426    kVbsl,
427    kVceq,
428    kVcge,
429    kVcgt,
430    kVcle,
431    kVcls,
432    kVclt,
433    kVclz,
434    kVcmp,
435    kVcmpe,
436    kVcnt,
437    kVcvt,
438    kVcvta,
439    kVcvtb,
440    kVcvtm,
441    kVcvtn,
442    kVcvtp,
443    kVcvtr,
444    kVcvtt,
445    kVdiv,
446    kVdup,
447    kVeor,
448    kVext,
449    kVfma,
450    kVfms,
451    kVfnma,
452    kVfnms,
453    kVhadd,
454    kVhsub,
455    kVld1,
456    kVld2,
457    kVld3,
458    kVld4,
459    kVldm,
460    kVldmdb,
461    kVldmia,
462    kVldr,
463    kVmax,
464    kVmaxnm,
465    kVmin,
466    kVminnm,
467    kVmla,
468    kVmlal,
469    kVmls,
470    kVmlsl,
471    kVmov,
472    kVmovl,
473    kVmovn,
474    kVmrs,
475    kVmsr,
476    kVmul,
477    kVmull,
478    kVmvn,
479    kVneg,
480    kVnmla,
481    kVnmls,
482    kVnmul,
483    kVorn,
484    kVorr,
485    kVpadal,
486    kVpadd,
487    kVpaddl,
488    kVpmax,
489    kVpmin,
490    kVpop,
491    kVpush,
492    kVqabs,
493    kVqadd,
494    kVqdmlal,
495    kVqdmlsl,
496    kVqdmulh,
497    kVqdmull,
498    kVqmovn,
499    kVqmovun,
500    kVqneg,
501    kVqrdmulh,
502    kVqrshl,
503    kVqrshrn,
504    kVqrshrun,
505    kVqshl,
506    kVqshlu,
507    kVqshrn,
508    kVqshrun,
509    kVqsub,
510    kVraddhn,
511    kVrecpe,
512    kVrecps,
513    kVrev16,
514    kVrev32,
515    kVrev64,
516    kVrhadd,
517    kVrinta,
518    kVrintm,
519    kVrintn,
520    kVrintp,
521    kVrintr,
522    kVrintx,
523    kVrintz,
524    kVrshl,
525    kVrshr,
526    kVrshrn,
527    kVrsqrte,
528    kVrsqrts,
529    kVrsra,
530    kVrsubhn,
531    kVseleq,
532    kVselge,
533    kVselgt,
534    kVselvs,
535    kVshl,
536    kVshll,
537    kVshr,
538    kVshrn,
539    kVsli,
540    kVsqrt,
541    kVsra,
542    kVsri,
543    kVst1,
544    kVst2,
545    kVst3,
546    kVst4,
547    kVstm,
548    kVstmdb,
549    kVstmia,
550    kVstr,
551    kVsub,
552    kVsubhn,
553    kVsubl,
554    kVsubw,
555    kVswp,
556    kVtbl,
557    kVtbx,
558    kVtrn,
559    kVtst,
560    kVuzp,
561    kVzip,
562    kYield
563  };
564  typedef void (Assembler::*InstructionCondSizeRROp)(Condition cond,
565                                                     EncodingSize size,
566                                                     Register rd,
567                                                     Register rn,
568                                                     const Operand& operand);
569  typedef void (Assembler::*InstructionCondROp)(Condition cond,
570                                                Register rd,
571                                                const Operand& operand);
572  typedef void (Assembler::*InstructionROp)(Register rd,
573                                            const Operand& operand);
574  typedef void (Assembler::*InstructionCondRROp)(Condition cond,
575                                                 Register rd,
576                                                 Register rn,
577                                                 const Operand& operand);
578  typedef void (Assembler::*InstructionCondSizeRL)(Condition cond,
579                                                   EncodingSize size,
580                                                   Register rd,
581                                                   Label* label);
582  typedef void (Assembler::*InstructionCondSizeL)(Condition cond,
583                                                  EncodingSize size,
584                                                  Label* label);
585  typedef void (Assembler::*InstructionCondRIOp)(Condition cond,
586                                                 Register rd,
587                                                 uint32_t lsb,
588                                                 const Operand& operand);
589  typedef void (Assembler::*InstructionCondRRIOp)(Condition cond,
590                                                  Register rd,
591                                                  Register rn,
592                                                  uint32_t lsb,
593                                                  const Operand& operand);
594  typedef void (Assembler::*InstructionCondI)(Condition cond, uint32_t imm);
595  typedef void (Assembler::*InstructionCondL)(Condition cond, Label* label);
596  typedef void (Assembler::*InstructionCondR)(Condition cond, Register rm);
597  typedef void (Assembler::*InstructionRL)(Register rn, Label* label);
598  typedef void (Assembler::*InstructionCond)(Condition cond);
599  typedef void (Assembler::*InstructionCondRR)(Condition cond,
600                                               Register rd,
601                                               Register rm);
602  typedef void (Assembler::*InstructionCondSizeROp)(Condition cond,
603                                                    EncodingSize size,
604                                                    Register rn,
605                                                    const Operand& operand);
606  typedef void (Assembler::*InstructionCondRRR)(Condition cond,
607                                                Register rd,
608                                                Register rn,
609                                                Register rm);
610  typedef void (Assembler::*InstructionCondBa)(Condition cond,
611                                               MemoryBarrier option);
612  typedef void (Assembler::*InstructionCondRwbDrl)(Condition cond,
613                                                   Register rn,
614                                                   WriteBack write_back,
615                                                   DRegisterList dreglist);
616  typedef void (Assembler::*InstructionCondRMop)(Condition cond,
617                                                 Register rt,
618                                                 const MemOperand& operand);
619  typedef void (Assembler::*InstructionCondRRMop)(Condition cond,
620                                                  Register rt,
621                                                  Register rt2,
622                                                  const MemOperand& operand);
623  typedef void (Assembler::*InstructionCondSizeRwbRl)(Condition cond,
624                                                      EncodingSize size,
625                                                      Register rn,
626                                                      WriteBack write_back,
627                                                      RegisterList registers);
628  typedef void (Assembler::*InstructionCondRwbRl)(Condition cond,
629                                                  Register rn,
630                                                  WriteBack write_back,
631                                                  RegisterList registers);
632  typedef void (Assembler::*InstructionCondSizeRMop)(Condition cond,
633                                                     EncodingSize size,
634                                                     Register rt,
635                                                     const MemOperand& operand);
636  typedef void (Assembler::*InstructionCondRL)(Condition cond,
637                                               Register rt,
638                                               Label* label);
639  typedef void (Assembler::*InstructionCondRRL)(Condition cond,
640                                                Register rt,
641                                                Register rt2,
642                                                Label* label);
643  typedef void (Assembler::*InstructionCondRRRR)(
644      Condition cond, Register rd, Register rn, Register rm, Register ra);
645  typedef void (Assembler::*InstructionCondRSr)(Condition cond,
646                                                Register rd,
647                                                SpecialRegister spec_reg);
648  typedef void (Assembler::*InstructionCondMsrOp)(
649      Condition cond, MaskedSpecialRegister spec_reg, const Operand& operand);
650  typedef void (Assembler::*InstructionCondSizeRRR)(
651      Condition cond, EncodingSize size, Register rd, Register rn, Register rm);
652  typedef void (Assembler::*InstructionCondSize)(Condition cond,
653                                                 EncodingSize size);
654  typedef void (Assembler::*InstructionCondMop)(Condition cond,
655                                                const MemOperand& operand);
656  typedef void (Assembler::*InstructionCondSizeRl)(Condition cond,
657                                                   EncodingSize size,
658                                                   RegisterList registers);
659  typedef void (Assembler::*InstructionCondSizeOrl)(Condition cond,
660                                                    EncodingSize size,
661                                                    Register rt);
662  typedef void (Assembler::*InstructionCondSizeRR)(Condition cond,
663                                                   EncodingSize size,
664                                                   Register rd,
665                                                   Register rm);
666  typedef void (Assembler::*InstructionDtQQQ)(DataType dt,
667                                              QRegister rd,
668                                              QRegister rn,
669                                              QRegister rm);
670  typedef void (Assembler::*InstructionCondRIR)(Condition cond,
671                                                Register rd,
672                                                uint32_t imm,
673                                                Register rn);
674  typedef void (Assembler::*InstructionCondRRRMop)(Condition cond,
675                                                   Register rd,
676                                                   Register rt,
677                                                   Register rt2,
678                                                   const MemOperand& operand);
679  typedef void (Assembler::*InstructionCondSizeI)(Condition cond,
680                                                  EncodingSize size,
681                                                  uint32_t imm);
682  typedef void (Assembler::*InstructionCondDtDDD)(
683      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
684  typedef void (Assembler::*InstructionCondDtQQQ)(
685      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
686  typedef void (Assembler::*InstructionCondDtQDD)(
687      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
688  typedef void (Assembler::*InstructionCondDtDD)(Condition cond,
689                                                 DataType dt,
690                                                 DRegister rd,
691                                                 DRegister rm);
692  typedef void (Assembler::*InstructionCondDtQQ)(Condition cond,
693                                                 DataType dt,
694                                                 QRegister rd,
695                                                 QRegister rm);
696  typedef void (Assembler::*InstructionCondDtSS)(Condition cond,
697                                                 DataType dt,
698                                                 SRegister rd,
699                                                 SRegister rm);
700  typedef void (Assembler::*InstructionCondDtSSS)(
701      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
702  typedef void (Assembler::*InstructionCondDtDQQ)(
703      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
704  typedef void (Assembler::*InstructionCondDtQQD)(
705      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
706  typedef void (Assembler::*InstructionCondDtDDDop)(Condition cond,
707                                                    DataType dt,
708                                                    DRegister rd,
709                                                    DRegister rn,
710                                                    const DOperand& operand);
711  typedef void (Assembler::*InstructionCondDtQQQop)(Condition cond,
712                                                    DataType dt,
713                                                    QRegister rd,
714                                                    QRegister rn,
715                                                    const QOperand& operand);
716  typedef void (Assembler::*InstructionCondDtSFi)(Condition cond,
717                                                  DataType dt,
718                                                  SRegister rd,
719                                                  double imm);
720  typedef void (Assembler::*InstructionCondDtDFi)(Condition cond,
721                                                  DataType dt,
722                                                  DRegister rd,
723                                                  double imm);
724  typedef void (Assembler::*InstructionCondDtDtDS)(
725      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
726  typedef void (Assembler::*InstructionCondDtDtSD)(
727      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
728  typedef void (Assembler::*InstructionCondDtDtDDSi)(Condition cond,
729                                                     DataType dt1,
730                                                     DataType dt2,
731                                                     DRegister rd,
732                                                     DRegister rm,
733                                                     int32_t fbits);
734  typedef void (Assembler::*InstructionCondDtDtQQSi)(Condition cond,
735                                                     DataType dt1,
736                                                     DataType dt2,
737                                                     QRegister rd,
738                                                     QRegister rm,
739                                                     int32_t fbits);
740  typedef void (Assembler::*InstructionCondDtDtSSSi)(Condition cond,
741                                                     DataType dt1,
742                                                     DataType dt2,
743                                                     SRegister rd,
744                                                     SRegister rm,
745                                                     int32_t fbits);
746  typedef void (Assembler::*InstructionCondDtDtDD)(
747      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
748  typedef void (Assembler::*InstructionCondDtDtQQ)(
749      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm);
750  typedef void (Assembler::*InstructionCondDtDtDQ)(
751      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm);
752  typedef void (Assembler::*InstructionCondDtDtQD)(
753      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm);
754  typedef void (Assembler::*InstructionCondDtDtSS)(
755      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
756  typedef void (Assembler::*InstructionDtDtDD)(DataType dt1,
757                                               DataType dt2,
758                                               DRegister rd,
759                                               DRegister rm);
760  typedef void (Assembler::*InstructionDtDtQQ)(DataType dt1,
761                                               DataType dt2,
762                                               QRegister rd,
763                                               QRegister rm);
764  typedef void (Assembler::*InstructionDtDtSS)(DataType dt1,
765                                               DataType dt2,
766                                               SRegister rd,
767                                               SRegister rm);
768  typedef void (Assembler::*InstructionDtDtSD)(DataType dt1,
769                                               DataType dt2,
770                                               SRegister rd,
771                                               DRegister rm);
772  typedef void (Assembler::*InstructionCondDtQR)(Condition cond,
773                                                 DataType dt,
774                                                 QRegister rd,
775                                                 Register rt);
776  typedef void (Assembler::*InstructionCondDtDR)(Condition cond,
777                                                 DataType dt,
778                                                 DRegister rd,
779                                                 Register rt);
780  typedef void (Assembler::*InstructionCondDtDDx)(Condition cond,
781                                                  DataType dt,
782                                                  DRegister rd,
783                                                  DRegisterLane rm);
784  typedef void (Assembler::*InstructionCondDtQDx)(Condition cond,
785                                                  DataType dt,
786                                                  QRegister rd,
787                                                  DRegisterLane rm);
788  typedef void (Assembler::*InstructionCondDtDDDDop)(Condition cond,
789                                                     DataType dt,
790                                                     DRegister rd,
791                                                     DRegister rn,
792                                                     DRegister rm,
793                                                     const DOperand& operand);
794  typedef void (Assembler::*InstructionCondDtQQQQop)(Condition cond,
795                                                     DataType dt,
796                                                     QRegister rd,
797                                                     QRegister rn,
798                                                     QRegister rm,
799                                                     const QOperand& operand);
800  typedef void (Assembler::*InstructionCondDtNrlAmop)(
801      Condition cond,
802      DataType dt,
803      const NeonRegisterList& nreglist,
804      const AlignedMemOperand& operand);
805  typedef void (Assembler::*InstructionCondDtNrlMop)(
806      Condition cond,
807      DataType dt,
808      const NeonRegisterList& nreglist,
809      const MemOperand& operand);
810  typedef void (Assembler::*InstructionCondDtRwbDrl)(Condition cond,
811                                                     DataType dt,
812                                                     Register rn,
813                                                     WriteBack write_back,
814                                                     DRegisterList dreglist);
815  typedef void (Assembler::*InstructionCondDtRwbSrl)(Condition cond,
816                                                     DataType dt,
817                                                     Register rn,
818                                                     WriteBack write_back,
819                                                     SRegisterList sreglist);
820  typedef void (Assembler::*InstructionCondDtDL)(Condition cond,
821                                                 DataType dt,
822                                                 DRegister rd,
823                                                 Label* label);
824  typedef void (Assembler::*InstructionCondDtDMop)(Condition cond,
825                                                   DataType dt,
826                                                   DRegister rd,
827                                                   const MemOperand& operand);
828  typedef void (Assembler::*InstructionCondDtSL)(Condition cond,
829                                                 DataType dt,
830                                                 SRegister rd,
831                                                 Label* label);
832  typedef void (Assembler::*InstructionCondDtSMop)(Condition cond,
833                                                   DataType dt,
834                                                   SRegister rd,
835                                                   const MemOperand& operand);
836  typedef void (Assembler::*InstructionDtDDD)(DataType dt,
837                                              DRegister rd,
838                                              DRegister rn,
839                                              DRegister rm);
840  typedef void (Assembler::*InstructionDtSSS)(DataType dt,
841                                              SRegister rd,
842                                              SRegister rn,
843                                              SRegister rm);
844  typedef void (Assembler::*InstructionCondDtDDDx)(Condition cond,
845                                                   DataType dt,
846                                                   DRegister rd,
847                                                   DRegister rn,
848                                                   DRegisterLane rm);
849  typedef void (Assembler::*InstructionCondDtQQDx)(Condition cond,
850                                                   DataType dt,
851                                                   QRegister rd,
852                                                   QRegister rn,
853                                                   DRegisterLane rm);
854  typedef void (Assembler::*InstructionCondDtQDDx)(Condition cond,
855                                                   DataType dt,
856                                                   QRegister rd,
857                                                   DRegister rn,
858                                                   DRegisterLane rm);
859  typedef void (Assembler::*InstructionCondRS)(Condition cond,
860                                               Register rt,
861                                               SRegister rn);
862  typedef void (Assembler::*InstructionCondSR)(Condition cond,
863                                               SRegister rn,
864                                               Register rt);
865  typedef void (Assembler::*InstructionCondRRD)(Condition cond,
866                                                Register rt,
867                                                Register rt2,
868                                                DRegister rm);
869  typedef void (Assembler::*InstructionCondDRR)(Condition cond,
870                                                DRegister rm,
871                                                Register rt,
872                                                Register rt2);
873  typedef void (Assembler::*InstructionCondRRSS)(
874      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
875  typedef void (Assembler::*InstructionCondSSRR)(
876      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
877  typedef void (Assembler::*InstructionCondDtDxR)(Condition cond,
878                                                  DataType dt,
879                                                  DRegisterLane rd,
880                                                  Register rt);
881  typedef void (Assembler::*InstructionCondDtDDop)(Condition cond,
882                                                   DataType dt,
883                                                   DRegister rd,
884                                                   const DOperand& operand);
885  typedef void (Assembler::*InstructionCondDtQQop)(Condition cond,
886                                                   DataType dt,
887                                                   QRegister rd,
888                                                   const QOperand& operand);
889  typedef void (Assembler::*InstructionCondDtSSop)(Condition cond,
890                                                   DataType dt,
891                                                   SRegister rd,
892                                                   const SOperand& operand);
893  typedef void (Assembler::*InstructionCondDtRDx)(Condition cond,
894                                                  DataType dt,
895                                                  Register rt,
896                                                  DRegisterLane rn);
897  typedef void (Assembler::*InstructionCondDtQD)(Condition cond,
898                                                 DataType dt,
899                                                 QRegister rd,
900                                                 DRegister rm);
901  typedef void (Assembler::*InstructionCondDtDQ)(Condition cond,
902                                                 DataType dt,
903                                                 DRegister rd,
904                                                 QRegister rm);
905  typedef void (Assembler::*InstructionCondRoaSfp)(Condition cond,
906                                                   RegisterOrAPSR_nzcv rt,
907                                                   SpecialFPRegister spec_reg);
908  typedef void (Assembler::*InstructionCondSfpR)(Condition cond,
909                                                 SpecialFPRegister spec_reg,
910                                                 Register rt);
911  typedef void (Assembler::*InstructionCondDtDDIr)(Condition cond,
912                                                   DataType dt,
913                                                   DRegister rd,
914                                                   DRegister rn,
915                                                   DRegister dm,
916                                                   unsigned index);
917  typedef void (Assembler::*InstructionCondDtQQIr)(Condition cond,
918                                                   DataType dt,
919                                                   QRegister rd,
920                                                   QRegister rn,
921                                                   DRegister dm,
922                                                   unsigned index);
923  typedef void (Assembler::*InstructionCondDtQDIr)(Condition cond,
924                                                   DataType dt,
925                                                   QRegister rd,
926                                                   DRegister rn,
927                                                   DRegister dm,
928                                                   unsigned index);
929  typedef void (Assembler::*InstructionCondDtDrl)(Condition cond,
930                                                  DataType dt,
931                                                  DRegisterList dreglist);
932  typedef void (Assembler::*InstructionCondDtSrl)(Condition cond,
933                                                  DataType dt,
934                                                  SRegisterList sreglist);
935  typedef void (Assembler::*InstructionCondDtDQQop)(Condition cond,
936                                                    DataType dt,
937                                                    DRegister rd,
938                                                    QRegister rm,
939                                                    const QOperand& operand);
940  typedef void (Assembler::*InstructionCondDtQDDop)(Condition cond,
941                                                    DataType dt,
942                                                    QRegister rd,
943                                                    DRegister rm,
944                                                    const DOperand& operand);
945  typedef void (Assembler::*InstructionCondDtDNrlD)(
946      Condition cond,
947      DataType dt,
948      DRegister rd,
949      const NeonRegisterList& nreglist,
950      DRegister rm);
951  virtual void Delegate(InstructionType type,
952                        InstructionCondSizeRROp /*instruction*/,
953                        Condition /*cond*/,
954                        EncodingSize /*size*/,
955                        Register /*rd*/,
956                        Register /*rn*/,
957                        const Operand& /*operand*/) {
958    UnimplementedDelegate(type);
959  }
960  virtual void Delegate(InstructionType type,
961                        InstructionCondROp /*instruction*/,
962                        Condition /*cond*/,
963                        Register /*rd*/,
964                        const Operand& /*operand*/) {
965    UnimplementedDelegate(type);
966  }
967  virtual void Delegate(InstructionType type,
968                        InstructionROp /*instruction*/,
969                        Register /*rd*/,
970                        const Operand& /*operand*/) {
971    UnimplementedDelegate(type);
972  }
973  virtual void Delegate(InstructionType type,
974                        InstructionCondRROp /*instruction*/,
975                        Condition /*cond*/,
976                        Register /*rd*/,
977                        Register /*rn*/,
978                        const Operand& /*operand*/) {
979    UnimplementedDelegate(type);
980  }
981  virtual void Delegate(InstructionType type,
982                        InstructionCondSizeRL /*instruction*/,
983                        Condition /*cond*/,
984                        EncodingSize /*size*/,
985                        Register /*rd*/,
986                        Label* /*label*/) {
987    UnimplementedDelegate(type);
988  }
989  virtual void Delegate(InstructionType type,
990                        InstructionCondSizeL /*instruction*/,
991                        Condition /*cond*/,
992                        EncodingSize /*size*/,
993                        Label* /*label*/) {
994    UnimplementedDelegate(type);
995  }
996  virtual void Delegate(InstructionType type,
997                        InstructionCondRIOp /*instruction*/,
998                        Condition /*cond*/,
999                        Register /*rd*/,
1000                        uint32_t /*lsb*/,
1001                        const Operand& /*operand*/) {
1002    UnimplementedDelegate(type);
1003  }
1004  virtual void Delegate(InstructionType type,
1005                        InstructionCondRRIOp /*instruction*/,
1006                        Condition /*cond*/,
1007                        Register /*rd*/,
1008                        Register /*rn*/,
1009                        uint32_t /*lsb*/,
1010                        const Operand& /*operand*/) {
1011    UnimplementedDelegate(type);
1012  }
1013  virtual void Delegate(InstructionType type,
1014                        InstructionCondI /*instruction*/,
1015                        Condition /*cond*/,
1016                        uint32_t /*imm*/) {
1017    UnimplementedDelegate(type);
1018  }
1019  virtual void Delegate(InstructionType type,
1020                        InstructionCondL /*instruction*/,
1021                        Condition /*cond*/,
1022                        Label* /*label*/) {
1023    UnimplementedDelegate(type);
1024  }
1025  virtual void Delegate(InstructionType type,
1026                        InstructionCondR /*instruction*/,
1027                        Condition /*cond*/,
1028                        Register /*rm*/) {
1029    UnimplementedDelegate(type);
1030  }
1031  virtual void Delegate(InstructionType type,
1032                        InstructionRL /*instruction*/,
1033                        Register /*rn*/,
1034                        Label* /*label*/) {
1035    UnimplementedDelegate(type);
1036  }
1037  virtual void Delegate(InstructionType type,
1038                        InstructionCond /*instruction*/,
1039                        Condition /*cond*/) {
1040    UnimplementedDelegate(type);
1041  }
1042  virtual void Delegate(InstructionType type,
1043                        InstructionCondRR /*instruction*/,
1044                        Condition /*cond*/,
1045                        Register /*rd*/,
1046                        Register /*rm*/) {
1047    UnimplementedDelegate(type);
1048  }
1049  virtual void Delegate(InstructionType type,
1050                        InstructionCondSizeROp /*instruction*/,
1051                        Condition /*cond*/,
1052                        EncodingSize /*size*/,
1053                        Register /*rn*/,
1054                        const Operand& /*operand*/) {
1055    UnimplementedDelegate(type);
1056  }
1057  virtual void Delegate(InstructionType type,
1058                        InstructionCondRRR /*instruction*/,
1059                        Condition /*cond*/,
1060                        Register /*rd*/,
1061                        Register /*rn*/,
1062                        Register /*rm*/) {
1063    UnimplementedDelegate(type);
1064  }
1065  virtual void Delegate(InstructionType type,
1066                        InstructionCondBa /*instruction*/,
1067                        Condition /*cond*/,
1068                        MemoryBarrier /*option*/) {
1069    UnimplementedDelegate(type);
1070  }
1071  virtual void Delegate(InstructionType type,
1072                        InstructionCondRwbDrl /*instruction*/,
1073                        Condition /*cond*/,
1074                        Register /*rn*/,
1075                        WriteBack /*write_back*/,
1076                        DRegisterList /*dreglist*/) {
1077    UnimplementedDelegate(type);
1078  }
1079  virtual void DelegateIt(Condition /*cond*/, uint16_t /*mask*/) {
1080    UnimplementedDelegate(kIt);
1081  }
1082  virtual void Delegate(InstructionType type,
1083                        InstructionCondRMop /*instruction*/,
1084                        Condition /*cond*/,
1085                        Register /*rt*/,
1086                        const MemOperand& /*operand*/) {
1087    UnimplementedDelegate(type);
1088  }
1089  virtual void Delegate(InstructionType type,
1090                        InstructionCondRRMop /*instruction*/,
1091                        Condition /*cond*/,
1092                        Register /*rt*/,
1093                        Register /*rt2*/,
1094                        const MemOperand& /*operand*/) {
1095    UnimplementedDelegate(type);
1096  }
1097  virtual void Delegate(InstructionType type,
1098                        InstructionCondSizeRwbRl /*instruction*/,
1099                        Condition /*cond*/,
1100                        EncodingSize /*size*/,
1101                        Register /*rn*/,
1102                        WriteBack /*write_back*/,
1103                        RegisterList /*registers*/) {
1104    UnimplementedDelegate(type);
1105  }
1106  virtual void Delegate(InstructionType type,
1107                        InstructionCondRwbRl /*instruction*/,
1108                        Condition /*cond*/,
1109                        Register /*rn*/,
1110                        WriteBack /*write_back*/,
1111                        RegisterList /*registers*/) {
1112    UnimplementedDelegate(type);
1113  }
1114  virtual void Delegate(InstructionType type,
1115                        InstructionCondSizeRMop /*instruction*/,
1116                        Condition /*cond*/,
1117                        EncodingSize /*size*/,
1118                        Register /*rt*/,
1119                        const MemOperand& /*operand*/) {
1120    UnimplementedDelegate(type);
1121  }
1122  virtual void Delegate(InstructionType type,
1123                        InstructionCondRL /*instruction*/,
1124                        Condition /*cond*/,
1125                        Register /*rt*/,
1126                        Label* /*label*/) {
1127    UnimplementedDelegate(type);
1128  }
1129  virtual void Delegate(InstructionType type,
1130                        InstructionCondRRL /*instruction*/,
1131                        Condition /*cond*/,
1132                        Register /*rt*/,
1133                        Register /*rt2*/,
1134                        Label* /*label*/) {
1135    UnimplementedDelegate(type);
1136  }
1137  virtual void Delegate(InstructionType type,
1138                        InstructionCondRRRR /*instruction*/,
1139                        Condition /*cond*/,
1140                        Register /*rd*/,
1141                        Register /*rn*/,
1142                        Register /*rm*/,
1143                        Register /*ra*/) {
1144    UnimplementedDelegate(type);
1145  }
1146  virtual void Delegate(InstructionType type,
1147                        InstructionCondRSr /*instruction*/,
1148                        Condition /*cond*/,
1149                        Register /*rd*/,
1150                        SpecialRegister /*spec_reg*/) {
1151    UnimplementedDelegate(type);
1152  }
1153  virtual void Delegate(InstructionType type,
1154                        InstructionCondMsrOp /*instruction*/,
1155                        Condition /*cond*/,
1156                        MaskedSpecialRegister /*spec_reg*/,
1157                        const Operand& /*operand*/) {
1158    UnimplementedDelegate(type);
1159  }
1160  virtual void Delegate(InstructionType type,
1161                        InstructionCondSizeRRR /*instruction*/,
1162                        Condition /*cond*/,
1163                        EncodingSize /*size*/,
1164                        Register /*rd*/,
1165                        Register /*rn*/,
1166                        Register /*rm*/) {
1167    UnimplementedDelegate(type);
1168  }
1169  virtual void Delegate(InstructionType type,
1170                        InstructionCondSize /*instruction*/,
1171                        Condition /*cond*/,
1172                        EncodingSize /*size*/) {
1173    UnimplementedDelegate(type);
1174  }
1175  virtual void Delegate(InstructionType type,
1176                        InstructionCondMop /*instruction*/,
1177                        Condition /*cond*/,
1178                        const MemOperand& /*operand*/) {
1179    UnimplementedDelegate(type);
1180  }
1181  virtual void Delegate(InstructionType type,
1182                        InstructionCondSizeRl /*instruction*/,
1183                        Condition /*cond*/,
1184                        EncodingSize /*size*/,
1185                        RegisterList /*registers*/) {
1186    UnimplementedDelegate(type);
1187  }
1188  virtual void Delegate(InstructionType type,
1189                        InstructionCondSizeOrl /*instruction*/,
1190                        Condition /*cond*/,
1191                        EncodingSize /*size*/,
1192                        Register /*rt*/) {
1193    UnimplementedDelegate(type);
1194  }
1195  virtual void Delegate(InstructionType type,
1196                        InstructionCondSizeRR /*instruction*/,
1197                        Condition /*cond*/,
1198                        EncodingSize /*size*/,
1199                        Register /*rd*/,
1200                        Register /*rm*/) {
1201    UnimplementedDelegate(type);
1202  }
1203  virtual void Delegate(InstructionType type,
1204                        InstructionDtQQQ /*instruction*/,
1205                        DataType /*dt*/,
1206                        QRegister /*rd*/,
1207                        QRegister /*rn*/,
1208                        QRegister /*rm*/) {
1209    UnimplementedDelegate(type);
1210  }
1211  virtual void Delegate(InstructionType type,
1212                        InstructionCondRIR /*instruction*/,
1213                        Condition /*cond*/,
1214                        Register /*rd*/,
1215                        uint32_t /*imm*/,
1216                        Register /*rn*/) {
1217    UnimplementedDelegate(type);
1218  }
1219  virtual void Delegate(InstructionType type,
1220                        InstructionCondRRRMop /*instruction*/,
1221                        Condition /*cond*/,
1222                        Register /*rd*/,
1223                        Register /*rt*/,
1224                        Register /*rt2*/,
1225                        const MemOperand& /*operand*/) {
1226    UnimplementedDelegate(type);
1227  }
1228  virtual void Delegate(InstructionType type,
1229                        InstructionCondSizeI /*instruction*/,
1230                        Condition /*cond*/,
1231                        EncodingSize /*size*/,
1232                        uint32_t /*imm*/) {
1233    UnimplementedDelegate(type);
1234  }
1235  virtual void Delegate(InstructionType type,
1236                        InstructionCondDtDDD /*instruction*/,
1237                        Condition /*cond*/,
1238                        DataType /*dt*/,
1239                        DRegister /*rd*/,
1240                        DRegister /*rn*/,
1241                        DRegister /*rm*/) {
1242    UnimplementedDelegate(type);
1243  }
1244  virtual void Delegate(InstructionType type,
1245                        InstructionCondDtQQQ /*instruction*/,
1246                        Condition /*cond*/,
1247                        DataType /*dt*/,
1248                        QRegister /*rd*/,
1249                        QRegister /*rn*/,
1250                        QRegister /*rm*/) {
1251    UnimplementedDelegate(type);
1252  }
1253  virtual void Delegate(InstructionType type,
1254                        InstructionCondDtQDD /*instruction*/,
1255                        Condition /*cond*/,
1256                        DataType /*dt*/,
1257                        QRegister /*rd*/,
1258                        DRegister /*rn*/,
1259                        DRegister /*rm*/) {
1260    UnimplementedDelegate(type);
1261  }
1262  virtual void Delegate(InstructionType type,
1263                        InstructionCondDtDD /*instruction*/,
1264                        Condition /*cond*/,
1265                        DataType /*dt*/,
1266                        DRegister /*rd*/,
1267                        DRegister /*rm*/) {
1268    UnimplementedDelegate(type);
1269  }
1270  virtual void Delegate(InstructionType type,
1271                        InstructionCondDtQQ /*instruction*/,
1272                        Condition /*cond*/,
1273                        DataType /*dt*/,
1274                        QRegister /*rd*/,
1275                        QRegister /*rm*/) {
1276    UnimplementedDelegate(type);
1277  }
1278  virtual void Delegate(InstructionType type,
1279                        InstructionCondDtSS /*instruction*/,
1280                        Condition /*cond*/,
1281                        DataType /*dt*/,
1282                        SRegister /*rd*/,
1283                        SRegister /*rm*/) {
1284    UnimplementedDelegate(type);
1285  }
1286  virtual void Delegate(InstructionType type,
1287                        InstructionCondDtSSS /*instruction*/,
1288                        Condition /*cond*/,
1289                        DataType /*dt*/,
1290                        SRegister /*rd*/,
1291                        SRegister /*rn*/,
1292                        SRegister /*rm*/) {
1293    UnimplementedDelegate(type);
1294  }
1295  virtual void Delegate(InstructionType type,
1296                        InstructionCondDtDQQ /*instruction*/,
1297                        Condition /*cond*/,
1298                        DataType /*dt*/,
1299                        DRegister /*rd*/,
1300                        QRegister /*rn*/,
1301                        QRegister /*rm*/) {
1302    UnimplementedDelegate(type);
1303  }
1304  virtual void Delegate(InstructionType type,
1305                        InstructionCondDtQQD /*instruction*/,
1306                        Condition /*cond*/,
1307                        DataType /*dt*/,
1308                        QRegister /*rd*/,
1309                        QRegister /*rn*/,
1310                        DRegister /*rm*/) {
1311    UnimplementedDelegate(type);
1312  }
1313  virtual void Delegate(InstructionType type,
1314                        InstructionCondDtDDDop /*instruction*/,
1315                        Condition /*cond*/,
1316                        DataType /*dt*/,
1317                        DRegister /*rd*/,
1318                        DRegister /*rn*/,
1319                        const DOperand& /*operand*/) {
1320    UnimplementedDelegate(type);
1321  }
1322  virtual void Delegate(InstructionType type,
1323                        InstructionCondDtQQQop /*instruction*/,
1324                        Condition /*cond*/,
1325                        DataType /*dt*/,
1326                        QRegister /*rd*/,
1327                        QRegister /*rn*/,
1328                        const QOperand& /*operand*/) {
1329    UnimplementedDelegate(type);
1330  }
1331  virtual void Delegate(InstructionType type,
1332                        InstructionCondDtSFi /*instruction*/,
1333                        Condition /*cond*/,
1334                        DataType /*dt*/,
1335                        SRegister /*rd*/,
1336                        double /*imm*/) {
1337    UnimplementedDelegate(type);
1338  }
1339  virtual void Delegate(InstructionType type,
1340                        InstructionCondDtDFi /*instruction*/,
1341                        Condition /*cond*/,
1342                        DataType /*dt*/,
1343                        DRegister /*rd*/,
1344                        double /*imm*/) {
1345    UnimplementedDelegate(type);
1346  }
1347  virtual void Delegate(InstructionType type,
1348                        InstructionCondDtDtDS /*instruction*/,
1349                        Condition /*cond*/,
1350                        DataType /*dt1*/,
1351                        DataType /*dt2*/,
1352                        DRegister /*rd*/,
1353                        SRegister /*rm*/) {
1354    UnimplementedDelegate(type);
1355  }
1356  virtual void Delegate(InstructionType type,
1357                        InstructionCondDtDtSD /*instruction*/,
1358                        Condition /*cond*/,
1359                        DataType /*dt1*/,
1360                        DataType /*dt2*/,
1361                        SRegister /*rd*/,
1362                        DRegister /*rm*/) {
1363    UnimplementedDelegate(type);
1364  }
1365  virtual void Delegate(InstructionType type,
1366                        InstructionCondDtDtDDSi /*instruction*/,
1367                        Condition /*cond*/,
1368                        DataType /*dt1*/,
1369                        DataType /*dt2*/,
1370                        DRegister /*rd*/,
1371                        DRegister /*rm*/,
1372                        int32_t /*fbits*/) {
1373    UnimplementedDelegate(type);
1374  }
1375  virtual void Delegate(InstructionType type,
1376                        InstructionCondDtDtQQSi /*instruction*/,
1377                        Condition /*cond*/,
1378                        DataType /*dt1*/,
1379                        DataType /*dt2*/,
1380                        QRegister /*rd*/,
1381                        QRegister /*rm*/,
1382                        int32_t /*fbits*/) {
1383    UnimplementedDelegate(type);
1384  }
1385  virtual void Delegate(InstructionType type,
1386                        InstructionCondDtDtSSSi /*instruction*/,
1387                        Condition /*cond*/,
1388                        DataType /*dt1*/,
1389                        DataType /*dt2*/,
1390                        SRegister /*rd*/,
1391                        SRegister /*rm*/,
1392                        int32_t /*fbits*/) {
1393    UnimplementedDelegate(type);
1394  }
1395  virtual void Delegate(InstructionType type,
1396                        InstructionCondDtDtDD /*instruction*/,
1397                        Condition /*cond*/,
1398                        DataType /*dt1*/,
1399                        DataType /*dt2*/,
1400                        DRegister /*rd*/,
1401                        DRegister /*rm*/) {
1402    UnimplementedDelegate(type);
1403  }
1404  virtual void Delegate(InstructionType type,
1405                        InstructionCondDtDtQQ /*instruction*/,
1406                        Condition /*cond*/,
1407                        DataType /*dt1*/,
1408                        DataType /*dt2*/,
1409                        QRegister /*rd*/,
1410                        QRegister /*rm*/) {
1411    UnimplementedDelegate(type);
1412  }
1413  virtual void Delegate(InstructionType type,
1414                        InstructionCondDtDtDQ /*instruction*/,
1415                        Condition /*cond*/,
1416                        DataType /*dt1*/,
1417                        DataType /*dt2*/,
1418                        DRegister /*rd*/,
1419                        QRegister /*rm*/) {
1420    UnimplementedDelegate(type);
1421  }
1422  virtual void Delegate(InstructionType type,
1423                        InstructionCondDtDtQD /*instruction*/,
1424                        Condition /*cond*/,
1425                        DataType /*dt1*/,
1426                        DataType /*dt2*/,
1427                        QRegister /*rd*/,
1428                        DRegister /*rm*/) {
1429    UnimplementedDelegate(type);
1430  }
1431  virtual void Delegate(InstructionType type,
1432                        InstructionCondDtDtSS /*instruction*/,
1433                        Condition /*cond*/,
1434                        DataType /*dt1*/,
1435                        DataType /*dt2*/,
1436                        SRegister /*rd*/,
1437                        SRegister /*rm*/) {
1438    UnimplementedDelegate(type);
1439  }
1440  virtual void Delegate(InstructionType type,
1441                        InstructionDtDtDD /*instruction*/,
1442                        DataType /*dt1*/,
1443                        DataType /*dt2*/,
1444                        DRegister /*rd*/,
1445                        DRegister /*rm*/) {
1446    UnimplementedDelegate(type);
1447  }
1448  virtual void Delegate(InstructionType type,
1449                        InstructionDtDtQQ /*instruction*/,
1450                        DataType /*dt1*/,
1451                        DataType /*dt2*/,
1452                        QRegister /*rd*/,
1453                        QRegister /*rm*/) {
1454    UnimplementedDelegate(type);
1455  }
1456  virtual void Delegate(InstructionType type,
1457                        InstructionDtDtSS /*instruction*/,
1458                        DataType /*dt1*/,
1459                        DataType /*dt2*/,
1460                        SRegister /*rd*/,
1461                        SRegister /*rm*/) {
1462    UnimplementedDelegate(type);
1463  }
1464  virtual void Delegate(InstructionType type,
1465                        InstructionDtDtSD /*instruction*/,
1466                        DataType /*dt1*/,
1467                        DataType /*dt2*/,
1468                        SRegister /*rd*/,
1469                        DRegister /*rm*/) {
1470    UnimplementedDelegate(type);
1471  }
1472  virtual void Delegate(InstructionType type,
1473                        InstructionCondDtQR /*instruction*/,
1474                        Condition /*cond*/,
1475                        DataType /*dt*/,
1476                        QRegister /*rd*/,
1477                        Register /*rt*/) {
1478    UnimplementedDelegate(type);
1479  }
1480  virtual void Delegate(InstructionType type,
1481                        InstructionCondDtDR /*instruction*/,
1482                        Condition /*cond*/,
1483                        DataType /*dt*/,
1484                        DRegister /*rd*/,
1485                        Register /*rt*/) {
1486    UnimplementedDelegate(type);
1487  }
1488  virtual void Delegate(InstructionType type,
1489                        InstructionCondDtDDx /*instruction*/,
1490                        Condition /*cond*/,
1491                        DataType /*dt*/,
1492                        DRegister /*rd*/,
1493                        DRegisterLane /*rm*/) {
1494    UnimplementedDelegate(type);
1495  }
1496  virtual void Delegate(InstructionType type,
1497                        InstructionCondDtQDx /*instruction*/,
1498                        Condition /*cond*/,
1499                        DataType /*dt*/,
1500                        QRegister /*rd*/,
1501                        DRegisterLane /*rm*/) {
1502    UnimplementedDelegate(type);
1503  }
1504  virtual void Delegate(InstructionType type,
1505                        InstructionCondDtDDDDop /*instruction*/,
1506                        Condition /*cond*/,
1507                        DataType /*dt*/,
1508                        DRegister /*rd*/,
1509                        DRegister /*rn*/,
1510                        DRegister /*rm*/,
1511                        const DOperand& /*operand*/) {
1512    UnimplementedDelegate(type);
1513  }
1514  virtual void Delegate(InstructionType type,
1515                        InstructionCondDtQQQQop /*instruction*/,
1516                        Condition /*cond*/,
1517                        DataType /*dt*/,
1518                        QRegister /*rd*/,
1519                        QRegister /*rn*/,
1520                        QRegister /*rm*/,
1521                        const QOperand& /*operand*/) {
1522    UnimplementedDelegate(type);
1523  }
1524  virtual void Delegate(InstructionType type,
1525                        InstructionCondDtNrlAmop /*instruction*/,
1526                        Condition /*cond*/,
1527                        DataType /*dt*/,
1528                        const NeonRegisterList& /*nreglist*/,
1529                        const AlignedMemOperand& /*operand*/) {
1530    UnimplementedDelegate(type);
1531  }
1532  virtual void Delegate(InstructionType type,
1533                        InstructionCondDtNrlMop /*instruction*/,
1534                        Condition /*cond*/,
1535                        DataType /*dt*/,
1536                        const NeonRegisterList& /*nreglist*/,
1537                        const MemOperand& /*operand*/) {
1538    UnimplementedDelegate(type);
1539  }
1540  virtual void Delegate(InstructionType type,
1541                        InstructionCondDtRwbDrl /*instruction*/,
1542                        Condition /*cond*/,
1543                        DataType /*dt*/,
1544                        Register /*rn*/,
1545                        WriteBack /*write_back*/,
1546                        DRegisterList /*dreglist*/) {
1547    UnimplementedDelegate(type);
1548  }
1549  virtual void Delegate(InstructionType type,
1550                        InstructionCondDtRwbSrl /*instruction*/,
1551                        Condition /*cond*/,
1552                        DataType /*dt*/,
1553                        Register /*rn*/,
1554                        WriteBack /*write_back*/,
1555                        SRegisterList /*sreglist*/) {
1556    UnimplementedDelegate(type);
1557  }
1558  virtual void Delegate(InstructionType type,
1559                        InstructionCondDtDL /*instruction*/,
1560                        Condition /*cond*/,
1561                        DataType /*dt*/,
1562                        DRegister /*rd*/,
1563                        Label* /*label*/) {
1564    UnimplementedDelegate(type);
1565  }
1566  virtual void Delegate(InstructionType type,
1567                        InstructionCondDtDMop /*instruction*/,
1568                        Condition /*cond*/,
1569                        DataType /*dt*/,
1570                        DRegister /*rd*/,
1571                        const MemOperand& /*operand*/) {
1572    UnimplementedDelegate(type);
1573  }
1574  virtual void Delegate(InstructionType type,
1575                        InstructionCondDtSL /*instruction*/,
1576                        Condition /*cond*/,
1577                        DataType /*dt*/,
1578                        SRegister /*rd*/,
1579                        Label* /*label*/) {
1580    UnimplementedDelegate(type);
1581  }
1582  virtual void Delegate(InstructionType type,
1583                        InstructionCondDtSMop /*instruction*/,
1584                        Condition /*cond*/,
1585                        DataType /*dt*/,
1586                        SRegister /*rd*/,
1587                        const MemOperand& /*operand*/) {
1588    UnimplementedDelegate(type);
1589  }
1590  virtual void Delegate(InstructionType type,
1591                        InstructionDtDDD /*instruction*/,
1592                        DataType /*dt*/,
1593                        DRegister /*rd*/,
1594                        DRegister /*rn*/,
1595                        DRegister /*rm*/) {
1596    UnimplementedDelegate(type);
1597  }
1598  virtual void Delegate(InstructionType type,
1599                        InstructionDtSSS /*instruction*/,
1600                        DataType /*dt*/,
1601                        SRegister /*rd*/,
1602                        SRegister /*rn*/,
1603                        SRegister /*rm*/) {
1604    UnimplementedDelegate(type);
1605  }
1606  virtual void Delegate(InstructionType type,
1607                        InstructionCondDtDDDx /*instruction*/,
1608                        Condition /*cond*/,
1609                        DataType /*dt*/,
1610                        DRegister /*rd*/,
1611                        DRegister /*rn*/,
1612                        DRegisterLane /*rm*/) {
1613    UnimplementedDelegate(type);
1614  }
1615  virtual void Delegate(InstructionType type,
1616                        InstructionCondDtQQDx /*instruction*/,
1617                        Condition /*cond*/,
1618                        DataType /*dt*/,
1619                        QRegister /*rd*/,
1620                        QRegister /*rn*/,
1621                        DRegisterLane /*rm*/) {
1622    UnimplementedDelegate(type);
1623  }
1624  virtual void Delegate(InstructionType type,
1625                        InstructionCondDtQDDx /*instruction*/,
1626                        Condition /*cond*/,
1627                        DataType /*dt*/,
1628                        QRegister /*rd*/,
1629                        DRegister /*rn*/,
1630                        DRegisterLane /*rm*/) {
1631    UnimplementedDelegate(type);
1632  }
1633  virtual void Delegate(InstructionType type,
1634                        InstructionCondRS /*instruction*/,
1635                        Condition /*cond*/,
1636                        Register /*rt*/,
1637                        SRegister /*rn*/) {
1638    UnimplementedDelegate(type);
1639  }
1640  virtual void Delegate(InstructionType type,
1641                        InstructionCondSR /*instruction*/,
1642                        Condition /*cond*/,
1643                        SRegister /*rn*/,
1644                        Register /*rt*/) {
1645    UnimplementedDelegate(type);
1646  }
1647  virtual void Delegate(InstructionType type,
1648                        InstructionCondRRD /*instruction*/,
1649                        Condition /*cond*/,
1650                        Register /*rt*/,
1651                        Register /*rt2*/,
1652                        DRegister /*rm*/) {
1653    UnimplementedDelegate(type);
1654  }
1655  virtual void Delegate(InstructionType type,
1656                        InstructionCondDRR /*instruction*/,
1657                        Condition /*cond*/,
1658                        DRegister /*rm*/,
1659                        Register /*rt*/,
1660                        Register /*rt2*/) {
1661    UnimplementedDelegate(type);
1662  }
1663  virtual void Delegate(InstructionType type,
1664                        InstructionCondRRSS /*instruction*/,
1665                        Condition /*cond*/,
1666                        Register /*rt*/,
1667                        Register /*rt2*/,
1668                        SRegister /*rm*/,
1669                        SRegister /*rm1*/) {
1670    UnimplementedDelegate(type);
1671  }
1672  virtual void Delegate(InstructionType type,
1673                        InstructionCondSSRR /*instruction*/,
1674                        Condition /*cond*/,
1675                        SRegister /*rm*/,
1676                        SRegister /*rm1*/,
1677                        Register /*rt*/,
1678                        Register /*rt2*/) {
1679    UnimplementedDelegate(type);
1680  }
1681  virtual void Delegate(InstructionType type,
1682                        InstructionCondDtDxR /*instruction*/,
1683                        Condition /*cond*/,
1684                        DataType /*dt*/,
1685                        DRegisterLane /*rd*/,
1686                        Register /*rt*/) {
1687    UnimplementedDelegate(type);
1688  }
1689  virtual void Delegate(InstructionType type,
1690                        InstructionCondDtDDop /*instruction*/,
1691                        Condition /*cond*/,
1692                        DataType /*dt*/,
1693                        DRegister /*rd*/,
1694                        const DOperand& /*operand*/) {
1695    UnimplementedDelegate(type);
1696  }
1697  virtual void Delegate(InstructionType type,
1698                        InstructionCondDtQQop /*instruction*/,
1699                        Condition /*cond*/,
1700                        DataType /*dt*/,
1701                        QRegister /*rd*/,
1702                        const QOperand& /*operand*/) {
1703    UnimplementedDelegate(type);
1704  }
1705  virtual void Delegate(InstructionType type,
1706                        InstructionCondDtSSop /*instruction*/,
1707                        Condition /*cond*/,
1708                        DataType /*dt*/,
1709                        SRegister /*rd*/,
1710                        const SOperand& /*operand*/) {
1711    UnimplementedDelegate(type);
1712  }
1713  virtual void Delegate(InstructionType type,
1714                        InstructionCondDtRDx /*instruction*/,
1715                        Condition /*cond*/,
1716                        DataType /*dt*/,
1717                        Register /*rt*/,
1718                        DRegisterLane /*rn*/) {
1719    UnimplementedDelegate(type);
1720  }
1721  virtual void Delegate(InstructionType type,
1722                        InstructionCondDtQD /*instruction*/,
1723                        Condition /*cond*/,
1724                        DataType /*dt*/,
1725                        QRegister /*rd*/,
1726                        DRegister /*rm*/) {
1727    UnimplementedDelegate(type);
1728  }
1729  virtual void Delegate(InstructionType type,
1730                        InstructionCondDtDQ /*instruction*/,
1731                        Condition /*cond*/,
1732                        DataType /*dt*/,
1733                        DRegister /*rd*/,
1734                        QRegister /*rm*/) {
1735    UnimplementedDelegate(type);
1736  }
1737  virtual void Delegate(InstructionType type,
1738                        InstructionCondRoaSfp /*instruction*/,
1739                        Condition /*cond*/,
1740                        RegisterOrAPSR_nzcv /*rt*/,
1741                        SpecialFPRegister /*spec_reg*/) {
1742    UnimplementedDelegate(type);
1743  }
1744  virtual void Delegate(InstructionType type,
1745                        InstructionCondSfpR /*instruction*/,
1746                        Condition /*cond*/,
1747                        SpecialFPRegister /*spec_reg*/,
1748                        Register /*rt*/) {
1749    UnimplementedDelegate(type);
1750  }
1751  virtual void Delegate(InstructionType type,
1752                        InstructionCondDtDDIr /*instruction*/,
1753                        Condition /*cond*/,
1754                        DataType /*dt*/,
1755                        DRegister /*rd*/,
1756                        DRegister /*rn*/,
1757                        DRegister /*dm*/,
1758                        unsigned /*index*/) {
1759    UnimplementedDelegate(type);
1760  }
1761  virtual void Delegate(InstructionType type,
1762                        InstructionCondDtQQIr /*instruction*/,
1763                        Condition /*cond*/,
1764                        DataType /*dt*/,
1765                        QRegister /*rd*/,
1766                        QRegister /*rn*/,
1767                        DRegister /*dm*/,
1768                        unsigned /*index*/) {
1769    UnimplementedDelegate(type);
1770  }
1771  virtual void Delegate(InstructionType type,
1772                        InstructionCondDtQDIr /*instruction*/,
1773                        Condition /*cond*/,
1774                        DataType /*dt*/,
1775                        QRegister /*rd*/,
1776                        DRegister /*rn*/,
1777                        DRegister /*dm*/,
1778                        unsigned /*index*/) {
1779    UnimplementedDelegate(type);
1780  }
1781  virtual void Delegate(InstructionType type,
1782                        InstructionCondDtDrl /*instruction*/,
1783                        Condition /*cond*/,
1784                        DataType /*dt*/,
1785                        DRegisterList /*dreglist*/) {
1786    UnimplementedDelegate(type);
1787  }
1788  virtual void Delegate(InstructionType type,
1789                        InstructionCondDtSrl /*instruction*/,
1790                        Condition /*cond*/,
1791                        DataType /*dt*/,
1792                        SRegisterList /*sreglist*/) {
1793    UnimplementedDelegate(type);
1794  }
1795  virtual void Delegate(InstructionType type,
1796                        InstructionCondDtDQQop /*instruction*/,
1797                        Condition /*cond*/,
1798                        DataType /*dt*/,
1799                        DRegister /*rd*/,
1800                        QRegister /*rm*/,
1801                        const QOperand& /*operand*/) {
1802    UnimplementedDelegate(type);
1803  }
1804  virtual void Delegate(InstructionType type,
1805                        InstructionCondDtQDDop /*instruction*/,
1806                        Condition /*cond*/,
1807                        DataType /*dt*/,
1808                        QRegister /*rd*/,
1809                        DRegister /*rm*/,
1810                        const DOperand& /*operand*/) {
1811    UnimplementedDelegate(type);
1812  }
1813  virtual void Delegate(InstructionType type,
1814                        InstructionCondDtDNrlD /*instruction*/,
1815                        Condition /*cond*/,
1816                        DataType /*dt*/,
1817                        DRegister /*rd*/,
1818                        const NeonRegisterList& /*nreglist*/,
1819                        DRegister /*rm*/) {
1820    UnimplementedDelegate(type);
1821  }
1822
1823  void adc(Condition cond,
1824           EncodingSize size,
1825           Register rd,
1826           Register rn,
1827           const Operand& operand);
1828  void adc(Register rd, Register rn, const Operand& operand) {
1829    adc(al, Best, rd, rn, operand);
1830  }
1831  void adc(Condition cond, Register rd, Register rn, const Operand& operand) {
1832    adc(cond, Best, rd, rn, operand);
1833  }
1834  void adc(EncodingSize size,
1835           Register rd,
1836           Register rn,
1837           const Operand& operand) {
1838    adc(al, size, rd, rn, operand);
1839  }
1840
1841  void adcs(Condition cond,
1842            EncodingSize size,
1843            Register rd,
1844            Register rn,
1845            const Operand& operand);
1846  void adcs(Register rd, Register rn, const Operand& operand) {
1847    adcs(al, Best, rd, rn, operand);
1848  }
1849  void adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1850    adcs(cond, Best, rd, rn, operand);
1851  }
1852  void adcs(EncodingSize size,
1853            Register rd,
1854            Register rn,
1855            const Operand& operand) {
1856    adcs(al, size, rd, rn, operand);
1857  }
1858
1859  void add(Condition cond,
1860           EncodingSize size,
1861           Register rd,
1862           Register rn,
1863           const Operand& operand);
1864  void add(Register rd, Register rn, const Operand& operand) {
1865    add(al, Best, rd, rn, operand);
1866  }
1867  void add(Condition cond, Register rd, Register rn, const Operand& operand) {
1868    add(cond, Best, rd, rn, operand);
1869  }
1870  void add(EncodingSize size,
1871           Register rd,
1872           Register rn,
1873           const Operand& operand) {
1874    add(al, size, rd, rn, operand);
1875  }
1876
1877  void add(Condition cond, Register rd, const Operand& operand);
1878  void add(Register rd, const Operand& operand) { add(al, rd, operand); }
1879
1880  void adds(Condition cond,
1881            EncodingSize size,
1882            Register rd,
1883            Register rn,
1884            const Operand& operand);
1885  void adds(Register rd, Register rn, const Operand& operand) {
1886    adds(al, Best, rd, rn, operand);
1887  }
1888  void adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1889    adds(cond, Best, rd, rn, operand);
1890  }
1891  void adds(EncodingSize size,
1892            Register rd,
1893            Register rn,
1894            const Operand& operand) {
1895    adds(al, size, rd, rn, operand);
1896  }
1897
1898  void adds(Register rd, const Operand& operand);
1899
1900  void addw(Condition cond, Register rd, Register rn, const Operand& operand);
1901  void addw(Register rd, Register rn, const Operand& operand) {
1902    addw(al, rd, rn, operand);
1903  }
1904
1905  void adr(Condition cond, EncodingSize size, Register rd, Label* label);
1906  void adr(Register rd, Label* label) { adr(al, Best, rd, label); }
1907  void adr(Condition cond, Register rd, Label* label) {
1908    adr(cond, Best, rd, label);
1909  }
1910  void adr(EncodingSize size, Register rd, Label* label) {
1911    adr(al, size, rd, label);
1912  }
1913
1914  void and_(Condition cond,
1915            EncodingSize size,
1916            Register rd,
1917            Register rn,
1918            const Operand& operand);
1919  void and_(Register rd, Register rn, const Operand& operand) {
1920    and_(al, Best, rd, rn, operand);
1921  }
1922  void and_(Condition cond, Register rd, Register rn, const Operand& operand) {
1923    and_(cond, Best, rd, rn, operand);
1924  }
1925  void and_(EncodingSize size,
1926            Register rd,
1927            Register rn,
1928            const Operand& operand) {
1929    and_(al, size, rd, rn, operand);
1930  }
1931
1932  void ands(Condition cond,
1933            EncodingSize size,
1934            Register rd,
1935            Register rn,
1936            const Operand& operand);
1937  void ands(Register rd, Register rn, const Operand& operand) {
1938    ands(al, Best, rd, rn, operand);
1939  }
1940  void ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1941    ands(cond, Best, rd, rn, operand);
1942  }
1943  void ands(EncodingSize size,
1944            Register rd,
1945            Register rn,
1946            const Operand& operand) {
1947    ands(al, size, rd, rn, operand);
1948  }
1949
1950  void asr(Condition cond,
1951           EncodingSize size,
1952           Register rd,
1953           Register rm,
1954           const Operand& operand);
1955  void asr(Register rd, Register rm, const Operand& operand) {
1956    asr(al, Best, rd, rm, operand);
1957  }
1958  void asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1959    asr(cond, Best, rd, rm, operand);
1960  }
1961  void asr(EncodingSize size,
1962           Register rd,
1963           Register rm,
1964           const Operand& operand) {
1965    asr(al, size, rd, rm, operand);
1966  }
1967
1968  void asrs(Condition cond,
1969            EncodingSize size,
1970            Register rd,
1971            Register rm,
1972            const Operand& operand);
1973  void asrs(Register rd, Register rm, const Operand& operand) {
1974    asrs(al, Best, rd, rm, operand);
1975  }
1976  void asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1977    asrs(cond, Best, rd, rm, operand);
1978  }
1979  void asrs(EncodingSize size,
1980            Register rd,
1981            Register rm,
1982            const Operand& operand) {
1983    asrs(al, size, rd, rm, operand);
1984  }
1985
1986  void b(Condition cond, EncodingSize size, Label* label);
1987  void b(Label* label) { b(al, Best, label); }
1988  void b(Condition cond, Label* label) { b(cond, Best, label); }
1989  void b(EncodingSize size, Label* label) { b(al, size, label); }
1990
1991  void bfc(Condition cond, Register rd, uint32_t lsb, const Operand& operand);
1992  void bfc(Register rd, uint32_t lsb, const Operand& operand) {
1993    bfc(al, rd, lsb, operand);
1994  }
1995
1996  void bfi(Condition cond,
1997           Register rd,
1998           Register rn,
1999           uint32_t lsb,
2000           const Operand& operand);
2001  void bfi(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
2002    bfi(al, rd, rn, lsb, operand);
2003  }
2004
2005  void bic(Condition cond,
2006           EncodingSize size,
2007           Register rd,
2008           Register rn,
2009           const Operand& operand);
2010  void bic(Register rd, Register rn, const Operand& operand) {
2011    bic(al, Best, rd, rn, operand);
2012  }
2013  void bic(Condition cond, Register rd, Register rn, const Operand& operand) {
2014    bic(cond, Best, rd, rn, operand);
2015  }
2016  void bic(EncodingSize size,
2017           Register rd,
2018           Register rn,
2019           const Operand& operand) {
2020    bic(al, size, rd, rn, operand);
2021  }
2022
2023  void bics(Condition cond,
2024            EncodingSize size,
2025            Register rd,
2026            Register rn,
2027            const Operand& operand);
2028  void bics(Register rd, Register rn, const Operand& operand) {
2029    bics(al, Best, rd, rn, operand);
2030  }
2031  void bics(Condition cond, Register rd, Register rn, const Operand& operand) {
2032    bics(cond, Best, rd, rn, operand);
2033  }
2034  void bics(EncodingSize size,
2035            Register rd,
2036            Register rn,
2037            const Operand& operand) {
2038    bics(al, size, rd, rn, operand);
2039  }
2040
2041  void bkpt(Condition cond, uint32_t imm);
2042  void bkpt(uint32_t imm) { bkpt(al, imm); }
2043
2044  void bl(Condition cond, Label* label);
2045  void bl(Label* label) { bl(al, label); }
2046
2047  void blx(Condition cond, Label* label);
2048  void blx(Label* label) { blx(al, label); }
2049
2050  void blx(Condition cond, Register rm);
2051  void blx(Register rm) { blx(al, rm); }
2052
2053  void bx(Condition cond, Register rm);
2054  void bx(Register rm) { bx(al, rm); }
2055
2056  void bxj(Condition cond, Register rm);
2057  void bxj(Register rm) { bxj(al, rm); }
2058
2059  void cbnz(Register rn, Label* label);
2060
2061  void cbz(Register rn, Label* label);
2062
2063  void clrex(Condition cond);
2064  void clrex() { clrex(al); }
2065
2066  void clz(Condition cond, Register rd, Register rm);
2067  void clz(Register rd, Register rm) { clz(al, rd, rm); }
2068
2069  void cmn(Condition cond,
2070           EncodingSize size,
2071           Register rn,
2072           const Operand& operand);
2073  void cmn(Register rn, const Operand& operand) { cmn(al, Best, rn, operand); }
2074  void cmn(Condition cond, Register rn, const Operand& operand) {
2075    cmn(cond, Best, rn, operand);
2076  }
2077  void cmn(EncodingSize size, Register rn, const Operand& operand) {
2078    cmn(al, size, rn, operand);
2079  }
2080
2081  void cmp(Condition cond,
2082           EncodingSize size,
2083           Register rn,
2084           const Operand& operand);
2085  void cmp(Register rn, const Operand& operand) { cmp(al, Best, rn, operand); }
2086  void cmp(Condition cond, Register rn, const Operand& operand) {
2087    cmp(cond, Best, rn, operand);
2088  }
2089  void cmp(EncodingSize size, Register rn, const Operand& operand) {
2090    cmp(al, size, rn, operand);
2091  }
2092
2093  void crc32b(Condition cond, Register rd, Register rn, Register rm);
2094  void crc32b(Register rd, Register rn, Register rm) { crc32b(al, rd, rn, rm); }
2095
2096  void crc32cb(Condition cond, Register rd, Register rn, Register rm);
2097  void crc32cb(Register rd, Register rn, Register rm) {
2098    crc32cb(al, rd, rn, rm);
2099  }
2100
2101  void crc32ch(Condition cond, Register rd, Register rn, Register rm);
2102  void crc32ch(Register rd, Register rn, Register rm) {
2103    crc32ch(al, rd, rn, rm);
2104  }
2105
2106  void crc32cw(Condition cond, Register rd, Register rn, Register rm);
2107  void crc32cw(Register rd, Register rn, Register rm) {
2108    crc32cw(al, rd, rn, rm);
2109  }
2110
2111  void crc32h(Condition cond, Register rd, Register rn, Register rm);
2112  void crc32h(Register rd, Register rn, Register rm) { crc32h(al, rd, rn, rm); }
2113
2114  void crc32w(Condition cond, Register rd, Register rn, Register rm);
2115  void crc32w(Register rd, Register rn, Register rm) { crc32w(al, rd, rn, rm); }
2116
2117  void dmb(Condition cond, MemoryBarrier option);
2118  void dmb(MemoryBarrier option) { dmb(al, option); }
2119
2120  void dsb(Condition cond, MemoryBarrier option);
2121  void dsb(MemoryBarrier option) { dsb(al, option); }
2122
2123  void eor(Condition cond,
2124           EncodingSize size,
2125           Register rd,
2126           Register rn,
2127           const Operand& operand);
2128  void eor(Register rd, Register rn, const Operand& operand) {
2129    eor(al, Best, rd, rn, operand);
2130  }
2131  void eor(Condition cond, Register rd, Register rn, const Operand& operand) {
2132    eor(cond, Best, rd, rn, operand);
2133  }
2134  void eor(EncodingSize size,
2135           Register rd,
2136           Register rn,
2137           const Operand& operand) {
2138    eor(al, size, rd, rn, operand);
2139  }
2140
2141  void eors(Condition cond,
2142            EncodingSize size,
2143            Register rd,
2144            Register rn,
2145            const Operand& operand);
2146  void eors(Register rd, Register rn, const Operand& operand) {
2147    eors(al, Best, rd, rn, operand);
2148  }
2149  void eors(Condition cond, Register rd, Register rn, const Operand& operand) {
2150    eors(cond, Best, rd, rn, operand);
2151  }
2152  void eors(EncodingSize size,
2153            Register rd,
2154            Register rn,
2155            const Operand& operand) {
2156    eors(al, size, rd, rn, operand);
2157  }
2158
2159  void fldmdbx(Condition cond,
2160               Register rn,
2161               WriteBack write_back,
2162               DRegisterList dreglist);
2163  void fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
2164    fldmdbx(al, rn, write_back, dreglist);
2165  }
2166
2167  void fldmiax(Condition cond,
2168               Register rn,
2169               WriteBack write_back,
2170               DRegisterList dreglist);
2171  void fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
2172    fldmiax(al, rn, write_back, dreglist);
2173  }
2174
2175  void fstmdbx(Condition cond,
2176               Register rn,
2177               WriteBack write_back,
2178               DRegisterList dreglist);
2179  void fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
2180    fstmdbx(al, rn, write_back, dreglist);
2181  }
2182
2183  void fstmiax(Condition cond,
2184               Register rn,
2185               WriteBack write_back,
2186               DRegisterList dreglist);
2187  void fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
2188    fstmiax(al, rn, write_back, dreglist);
2189  }
2190
2191  void hlt(Condition cond, uint32_t imm);
2192  void hlt(uint32_t imm) { hlt(al, imm); }
2193
2194  void hvc(Condition cond, uint32_t imm);
2195  void hvc(uint32_t imm) { hvc(al, imm); }
2196
2197  void isb(Condition cond, MemoryBarrier option);
2198  void isb(MemoryBarrier option) { isb(al, option); }
2199
2200  void it(Condition cond, uint16_t mask);
2201
2202  void lda(Condition cond, Register rt, const MemOperand& operand);
2203  void lda(Register rt, const MemOperand& operand) { lda(al, rt, operand); }
2204
2205  void ldab(Condition cond, Register rt, const MemOperand& operand);
2206  void ldab(Register rt, const MemOperand& operand) { ldab(al, rt, operand); }
2207
2208  void ldaex(Condition cond, Register rt, const MemOperand& operand);
2209  void ldaex(Register rt, const MemOperand& operand) { ldaex(al, rt, operand); }
2210
2211  void ldaexb(Condition cond, Register rt, const MemOperand& operand);
2212  void ldaexb(Register rt, const MemOperand& operand) {
2213    ldaexb(al, rt, operand);
2214  }
2215
2216  void ldaexd(Condition cond,
2217              Register rt,
2218              Register rt2,
2219              const MemOperand& operand);
2220  void ldaexd(Register rt, Register rt2, const MemOperand& operand) {
2221    ldaexd(al, rt, rt2, operand);
2222  }
2223
2224  void ldaexh(Condition cond, Register rt, const MemOperand& operand);
2225  void ldaexh(Register rt, const MemOperand& operand) {
2226    ldaexh(al, rt, operand);
2227  }
2228
2229  void ldah(Condition cond, Register rt, const MemOperand& operand);
2230  void ldah(Register rt, const MemOperand& operand) { ldah(al, rt, operand); }
2231
2232  void ldm(Condition cond,
2233           EncodingSize size,
2234           Register rn,
2235           WriteBack write_back,
2236           RegisterList registers);
2237  void ldm(Register rn, WriteBack write_back, RegisterList registers) {
2238    ldm(al, Best, rn, write_back, registers);
2239  }
2240  void ldm(Condition cond,
2241           Register rn,
2242           WriteBack write_back,
2243           RegisterList registers) {
2244    ldm(cond, Best, rn, write_back, registers);
2245  }
2246  void ldm(EncodingSize size,
2247           Register rn,
2248           WriteBack write_back,
2249           RegisterList registers) {
2250    ldm(al, size, rn, write_back, registers);
2251  }
2252
2253  void ldmda(Condition cond,
2254             Register rn,
2255             WriteBack write_back,
2256             RegisterList registers);
2257  void ldmda(Register rn, WriteBack write_back, RegisterList registers) {
2258    ldmda(al, rn, write_back, registers);
2259  }
2260
2261  void ldmdb(Condition cond,
2262             Register rn,
2263             WriteBack write_back,
2264             RegisterList registers);
2265  void ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
2266    ldmdb(al, rn, write_back, registers);
2267  }
2268
2269  void ldmea(Condition cond,
2270             Register rn,
2271             WriteBack write_back,
2272             RegisterList registers);
2273  void ldmea(Register rn, WriteBack write_back, RegisterList registers) {
2274    ldmea(al, rn, write_back, registers);
2275  }
2276
2277  void ldmed(Condition cond,
2278             Register rn,
2279             WriteBack write_back,
2280             RegisterList registers);
2281  void ldmed(Register rn, WriteBack write_back, RegisterList registers) {
2282    ldmed(al, rn, write_back, registers);
2283  }
2284
2285  void ldmfa(Condition cond,
2286             Register rn,
2287             WriteBack write_back,
2288             RegisterList registers);
2289  void ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
2290    ldmfa(al, rn, write_back, registers);
2291  }
2292
2293  void ldmfd(Condition cond,
2294             EncodingSize size,
2295             Register rn,
2296             WriteBack write_back,
2297             RegisterList registers);
2298  void ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
2299    ldmfd(al, Best, rn, write_back, registers);
2300  }
2301  void ldmfd(Condition cond,
2302             Register rn,
2303             WriteBack write_back,
2304             RegisterList registers) {
2305    ldmfd(cond, Best, rn, write_back, registers);
2306  }
2307  void ldmfd(EncodingSize size,
2308             Register rn,
2309             WriteBack write_back,
2310             RegisterList registers) {
2311    ldmfd(al, size, rn, write_back, registers);
2312  }
2313
2314  void ldmib(Condition cond,
2315             Register rn,
2316             WriteBack write_back,
2317             RegisterList registers);
2318  void ldmib(Register rn, WriteBack write_back, RegisterList registers) {
2319    ldmib(al, rn, write_back, registers);
2320  }
2321
2322  void ldr(Condition cond,
2323           EncodingSize size,
2324           Register rt,
2325           const MemOperand& operand);
2326  void ldr(Register rt, const MemOperand& operand) {
2327    ldr(al, Best, rt, operand);
2328  }
2329  void ldr(Condition cond, Register rt, const MemOperand& operand) {
2330    ldr(cond, Best, rt, operand);
2331  }
2332  void ldr(EncodingSize size, Register rt, const MemOperand& operand) {
2333    ldr(al, size, rt, operand);
2334  }
2335
2336  void ldr(Condition cond, EncodingSize size, Register rt, Label* label);
2337  void ldr(Register rt, Label* label) { ldr(al, Best, rt, label); }
2338  void ldr(Condition cond, Register rt, Label* label) {
2339    ldr(cond, Best, rt, label);
2340  }
2341  void ldr(EncodingSize size, Register rt, Label* label) {
2342    ldr(al, size, rt, label);
2343  }
2344
2345  void ldrb(Condition cond,
2346            EncodingSize size,
2347            Register rt,
2348            const MemOperand& operand);
2349  void ldrb(Register rt, const MemOperand& operand) {
2350    ldrb(al, Best, rt, operand);
2351  }
2352  void ldrb(Condition cond, Register rt, const MemOperand& operand) {
2353    ldrb(cond, Best, rt, operand);
2354  }
2355  void ldrb(EncodingSize size, Register rt, const MemOperand& operand) {
2356    ldrb(al, size, rt, operand);
2357  }
2358
2359  void ldrb(Condition cond, Register rt, Label* label);
2360  void ldrb(Register rt, Label* label) { ldrb(al, rt, label); }
2361
2362  void ldrd(Condition cond,
2363            Register rt,
2364            Register rt2,
2365            const MemOperand& operand);
2366  void ldrd(Register rt, Register rt2, const MemOperand& operand) {
2367    ldrd(al, rt, rt2, operand);
2368  }
2369
2370  void ldrd(Condition cond, Register rt, Register rt2, Label* label);
2371  void ldrd(Register rt, Register rt2, Label* label) {
2372    ldrd(al, rt, rt2, label);
2373  }
2374
2375  void ldrex(Condition cond, Register rt, const MemOperand& operand);
2376  void ldrex(Register rt, const MemOperand& operand) { ldrex(al, rt, operand); }
2377
2378  void ldrexb(Condition cond, Register rt, const MemOperand& operand);
2379  void ldrexb(Register rt, const MemOperand& operand) {
2380    ldrexb(al, rt, operand);
2381  }
2382
2383  void ldrexd(Condition cond,
2384              Register rt,
2385              Register rt2,
2386              const MemOperand& operand);
2387  void ldrexd(Register rt, Register rt2, const MemOperand& operand) {
2388    ldrexd(al, rt, rt2, operand);
2389  }
2390
2391  void ldrexh(Condition cond, Register rt, const MemOperand& operand);
2392  void ldrexh(Register rt, const MemOperand& operand) {
2393    ldrexh(al, rt, operand);
2394  }
2395
2396  void ldrh(Condition cond,
2397            EncodingSize size,
2398            Register rt,
2399            const MemOperand& operand);
2400  void ldrh(Register rt, const MemOperand& operand) {
2401    ldrh(al, Best, rt, operand);
2402  }
2403  void ldrh(Condition cond, Register rt, const MemOperand& operand) {
2404    ldrh(cond, Best, rt, operand);
2405  }
2406  void ldrh(EncodingSize size, Register rt, const MemOperand& operand) {
2407    ldrh(al, size, rt, operand);
2408  }
2409
2410  void ldrh(Condition cond, Register rt, Label* label);
2411  void ldrh(Register rt, Label* label) { ldrh(al, rt, label); }
2412
2413  void ldrsb(Condition cond,
2414             EncodingSize size,
2415             Register rt,
2416             const MemOperand& operand);
2417  void ldrsb(Register rt, const MemOperand& operand) {
2418    ldrsb(al, Best, rt, operand);
2419  }
2420  void ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2421    ldrsb(cond, Best, rt, operand);
2422  }
2423  void ldrsb(EncodingSize size, Register rt, const MemOperand& operand) {
2424    ldrsb(al, size, rt, operand);
2425  }
2426
2427  void ldrsb(Condition cond, Register rt, Label* label);
2428  void ldrsb(Register rt, Label* label) { ldrsb(al, rt, label); }
2429
2430  void ldrsh(Condition cond,
2431             EncodingSize size,
2432             Register rt,
2433             const MemOperand& operand);
2434  void ldrsh(Register rt, const MemOperand& operand) {
2435    ldrsh(al, Best, rt, operand);
2436  }
2437  void ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2438    ldrsh(cond, Best, rt, operand);
2439  }
2440  void ldrsh(EncodingSize size, Register rt, const MemOperand& operand) {
2441    ldrsh(al, size, rt, operand);
2442  }
2443
2444  void ldrsh(Condition cond, Register rt, Label* label);
2445  void ldrsh(Register rt, Label* label) { ldrsh(al, rt, label); }
2446
2447  void lsl(Condition cond,
2448           EncodingSize size,
2449           Register rd,
2450           Register rm,
2451           const Operand& operand);
2452  void lsl(Register rd, Register rm, const Operand& operand) {
2453    lsl(al, Best, rd, rm, operand);
2454  }
2455  void lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2456    lsl(cond, Best, rd, rm, operand);
2457  }
2458  void lsl(EncodingSize size,
2459           Register rd,
2460           Register rm,
2461           const Operand& operand) {
2462    lsl(al, size, rd, rm, operand);
2463  }
2464
2465  void lsls(Condition cond,
2466            EncodingSize size,
2467            Register rd,
2468            Register rm,
2469            const Operand& operand);
2470  void lsls(Register rd, Register rm, const Operand& operand) {
2471    lsls(al, Best, rd, rm, operand);
2472  }
2473  void lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2474    lsls(cond, Best, rd, rm, operand);
2475  }
2476  void lsls(EncodingSize size,
2477            Register rd,
2478            Register rm,
2479            const Operand& operand) {
2480    lsls(al, size, rd, rm, operand);
2481  }
2482
2483  void lsr(Condition cond,
2484           EncodingSize size,
2485           Register rd,
2486           Register rm,
2487           const Operand& operand);
2488  void lsr(Register rd, Register rm, const Operand& operand) {
2489    lsr(al, Best, rd, rm, operand);
2490  }
2491  void lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2492    lsr(cond, Best, rd, rm, operand);
2493  }
2494  void lsr(EncodingSize size,
2495           Register rd,
2496           Register rm,
2497           const Operand& operand) {
2498    lsr(al, size, rd, rm, operand);
2499  }
2500
2501  void lsrs(Condition cond,
2502            EncodingSize size,
2503            Register rd,
2504            Register rm,
2505            const Operand& operand);
2506  void lsrs(Register rd, Register rm, const Operand& operand) {
2507    lsrs(al, Best, rd, rm, operand);
2508  }
2509  void lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2510    lsrs(cond, Best, rd, rm, operand);
2511  }
2512  void lsrs(EncodingSize size,
2513            Register rd,
2514            Register rm,
2515            const Operand& operand) {
2516    lsrs(al, size, rd, rm, operand);
2517  }
2518
2519  void mla(Condition cond, Register rd, Register rn, Register rm, Register ra);
2520  void mla(Register rd, Register rn, Register rm, Register ra) {
2521    mla(al, rd, rn, rm, ra);
2522  }
2523
2524  void mlas(Condition cond, Register rd, Register rn, Register rm, Register ra);
2525  void mlas(Register rd, Register rn, Register rm, Register ra) {
2526    mlas(al, rd, rn, rm, ra);
2527  }
2528
2529  void mls(Condition cond, Register rd, Register rn, Register rm, Register ra);
2530  void mls(Register rd, Register rn, Register rm, Register ra) {
2531    mls(al, rd, rn, rm, ra);
2532  }
2533
2534  void mov(Condition cond,
2535           EncodingSize size,
2536           Register rd,
2537           const Operand& operand);
2538  void mov(Register rd, const Operand& operand) { mov(al, Best, rd, operand); }
2539  void mov(Condition cond, Register rd, const Operand& operand) {
2540    mov(cond, Best, rd, operand);
2541  }
2542  void mov(EncodingSize size, Register rd, const Operand& operand) {
2543    mov(al, size, rd, operand);
2544  }
2545
2546  void movs(Condition cond,
2547            EncodingSize size,
2548            Register rd,
2549            const Operand& operand);
2550  void movs(Register rd, const Operand& operand) {
2551    movs(al, Best, rd, operand);
2552  }
2553  void movs(Condition cond, Register rd, const Operand& operand) {
2554    movs(cond, Best, rd, operand);
2555  }
2556  void movs(EncodingSize size, Register rd, const Operand& operand) {
2557    movs(al, size, rd, operand);
2558  }
2559
2560  void movt(Condition cond, Register rd, const Operand& operand);
2561  void movt(Register rd, const Operand& operand) { movt(al, rd, operand); }
2562
2563  void movw(Condition cond, Register rd, const Operand& operand);
2564  void movw(Register rd, const Operand& operand) { movw(al, rd, operand); }
2565
2566  void mrs(Condition cond, Register rd, SpecialRegister spec_reg);
2567  void mrs(Register rd, SpecialRegister spec_reg) { mrs(al, rd, spec_reg); }
2568
2569  void msr(Condition cond,
2570           MaskedSpecialRegister spec_reg,
2571           const Operand& operand);
2572  void msr(MaskedSpecialRegister spec_reg, const Operand& operand) {
2573    msr(al, spec_reg, operand);
2574  }
2575
2576  void mul(
2577      Condition cond, EncodingSize size, Register rd, Register rn, Register rm);
2578  void mul(Register rd, Register rn, Register rm) { mul(al, Best, rd, rn, rm); }
2579  void mul(Condition cond, Register rd, Register rn, Register rm) {
2580    mul(cond, Best, rd, rn, rm);
2581  }
2582  void mul(EncodingSize size, Register rd, Register rn, Register rm) {
2583    mul(al, size, rd, rn, rm);
2584  }
2585
2586  void muls(Condition cond, Register rd, Register rn, Register rm);
2587  void muls(Register rd, Register rn, Register rm) { muls(al, rd, rn, rm); }
2588
2589  void mvn(Condition cond,
2590           EncodingSize size,
2591           Register rd,
2592           const Operand& operand);
2593  void mvn(Register rd, const Operand& operand) { mvn(al, Best, rd, operand); }
2594  void mvn(Condition cond, Register rd, const Operand& operand) {
2595    mvn(cond, Best, rd, operand);
2596  }
2597  void mvn(EncodingSize size, Register rd, const Operand& operand) {
2598    mvn(al, size, rd, operand);
2599  }
2600
2601  void mvns(Condition cond,
2602            EncodingSize size,
2603            Register rd,
2604            const Operand& operand);
2605  void mvns(Register rd, const Operand& operand) {
2606    mvns(al, Best, rd, operand);
2607  }
2608  void mvns(Condition cond, Register rd, const Operand& operand) {
2609    mvns(cond, Best, rd, operand);
2610  }
2611  void mvns(EncodingSize size, Register rd, const Operand& operand) {
2612    mvns(al, size, rd, operand);
2613  }
2614
2615  void nop(Condition cond, EncodingSize size);
2616  void nop() { nop(al, Best); }
2617  void nop(Condition cond) { nop(cond, Best); }
2618  void nop(EncodingSize size) { nop(al, size); }
2619
2620  void orn(Condition cond, Register rd, Register rn, const Operand& operand);
2621  void orn(Register rd, Register rn, const Operand& operand) {
2622    orn(al, rd, rn, operand);
2623  }
2624
2625  void orns(Condition cond, Register rd, Register rn, const Operand& operand);
2626  void orns(Register rd, Register rn, const Operand& operand) {
2627    orns(al, rd, rn, operand);
2628  }
2629
2630  void orr(Condition cond,
2631           EncodingSize size,
2632           Register rd,
2633           Register rn,
2634           const Operand& operand);
2635  void orr(Register rd, Register rn, const Operand& operand) {
2636    orr(al, Best, rd, rn, operand);
2637  }
2638  void orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2639    orr(cond, Best, rd, rn, operand);
2640  }
2641  void orr(EncodingSize size,
2642           Register rd,
2643           Register rn,
2644           const Operand& operand) {
2645    orr(al, size, rd, rn, operand);
2646  }
2647
2648  void orrs(Condition cond,
2649            EncodingSize size,
2650            Register rd,
2651            Register rn,
2652            const Operand& operand);
2653  void orrs(Register rd, Register rn, const Operand& operand) {
2654    orrs(al, Best, rd, rn, operand);
2655  }
2656  void orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2657    orrs(cond, Best, rd, rn, operand);
2658  }
2659  void orrs(EncodingSize size,
2660            Register rd,
2661            Register rn,
2662            const Operand& operand) {
2663    orrs(al, size, rd, rn, operand);
2664  }
2665
2666  void pkhbt(Condition cond, Register rd, Register rn, const Operand& operand);
2667  void pkhbt(Register rd, Register rn, const Operand& operand) {
2668    pkhbt(al, rd, rn, operand);
2669  }
2670
2671  void pkhtb(Condition cond, Register rd, Register rn, const Operand& operand);
2672  void pkhtb(Register rd, Register rn, const Operand& operand) {
2673    pkhtb(al, rd, rn, operand);
2674  }
2675
2676  void pld(Condition cond, Label* label);
2677  void pld(Label* label) { pld(al, label); }
2678
2679  void pld(Condition cond, const MemOperand& operand);
2680  void pld(const MemOperand& operand) { pld(al, operand); }
2681
2682  void pldw(Condition cond, const MemOperand& operand);
2683  void pldw(const MemOperand& operand) { pldw(al, operand); }
2684
2685  void pli(Condition cond, const MemOperand& operand);
2686  void pli(const MemOperand& operand) { pli(al, operand); }
2687
2688  void pli(Condition cond, Label* label);
2689  void pli(Label* label) { pli(al, label); }
2690
2691  void pop(Condition cond, EncodingSize size, RegisterList registers);
2692  void pop(RegisterList registers) { pop(al, Best, registers); }
2693  void pop(Condition cond, RegisterList registers) {
2694    pop(cond, Best, registers);
2695  }
2696  void pop(EncodingSize size, RegisterList registers) {
2697    pop(al, size, registers);
2698  }
2699
2700  void pop(Condition cond, EncodingSize size, Register rt);
2701  void pop(Register rt) { pop(al, Best, rt); }
2702  void pop(Condition cond, Register rt) { pop(cond, Best, rt); }
2703  void pop(EncodingSize size, Register rt) { pop(al, size, rt); }
2704
2705  void push(Condition cond, EncodingSize size, RegisterList registers);
2706  void push(RegisterList registers) { push(al, Best, registers); }
2707  void push(Condition cond, RegisterList registers) {
2708    push(cond, Best, registers);
2709  }
2710  void push(EncodingSize size, RegisterList registers) {
2711    push(al, size, registers);
2712  }
2713
2714  void push(Condition cond, EncodingSize size, Register rt);
2715  void push(Register rt) { push(al, Best, rt); }
2716  void push(Condition cond, Register rt) { push(cond, Best, rt); }
2717  void push(EncodingSize size, Register rt) { push(al, size, rt); }
2718
2719  void qadd(Condition cond, Register rd, Register rm, Register rn);
2720  void qadd(Register rd, Register rm, Register rn) { qadd(al, rd, rm, rn); }
2721
2722  void qadd16(Condition cond, Register rd, Register rn, Register rm);
2723  void qadd16(Register rd, Register rn, Register rm) { qadd16(al, rd, rn, rm); }
2724
2725  void qadd8(Condition cond, Register rd, Register rn, Register rm);
2726  void qadd8(Register rd, Register rn, Register rm) { qadd8(al, rd, rn, rm); }
2727
2728  void qasx(Condition cond, Register rd, Register rn, Register rm);
2729  void qasx(Register rd, Register rn, Register rm) { qasx(al, rd, rn, rm); }
2730
2731  void qdadd(Condition cond, Register rd, Register rm, Register rn);
2732  void qdadd(Register rd, Register rm, Register rn) { qdadd(al, rd, rm, rn); }
2733
2734  void qdsub(Condition cond, Register rd, Register rm, Register rn);
2735  void qdsub(Register rd, Register rm, Register rn) { qdsub(al, rd, rm, rn); }
2736
2737  void qsax(Condition cond, Register rd, Register rn, Register rm);
2738  void qsax(Register rd, Register rn, Register rm) { qsax(al, rd, rn, rm); }
2739
2740  void qsub(Condition cond, Register rd, Register rm, Register rn);
2741  void qsub(Register rd, Register rm, Register rn) { qsub(al, rd, rm, rn); }
2742
2743  void qsub16(Condition cond, Register rd, Register rn, Register rm);
2744  void qsub16(Register rd, Register rn, Register rm) { qsub16(al, rd, rn, rm); }
2745
2746  void qsub8(Condition cond, Register rd, Register rn, Register rm);
2747  void qsub8(Register rd, Register rn, Register rm) { qsub8(al, rd, rn, rm); }
2748
2749  void rbit(Condition cond, Register rd, Register rm);
2750  void rbit(Register rd, Register rm) { rbit(al, rd, rm); }
2751
2752  void rev(Condition cond, EncodingSize size, Register rd, Register rm);
2753  void rev(Register rd, Register rm) { rev(al, Best, rd, rm); }
2754  void rev(Condition cond, Register rd, Register rm) {
2755    rev(cond, Best, rd, rm);
2756  }
2757  void rev(EncodingSize size, Register rd, Register rm) {
2758    rev(al, size, rd, rm);
2759  }
2760
2761  void rev16(Condition cond, EncodingSize size, Register rd, Register rm);
2762  void rev16(Register rd, Register rm) { rev16(al, Best, rd, rm); }
2763  void rev16(Condition cond, Register rd, Register rm) {
2764    rev16(cond, Best, rd, rm);
2765  }
2766  void rev16(EncodingSize size, Register rd, Register rm) {
2767    rev16(al, size, rd, rm);
2768  }
2769
2770  void revsh(Condition cond, EncodingSize size, Register rd, Register rm);
2771  void revsh(Register rd, Register rm) { revsh(al, Best, rd, rm); }
2772  void revsh(Condition cond, Register rd, Register rm) {
2773    revsh(cond, Best, rd, rm);
2774  }
2775  void revsh(EncodingSize size, Register rd, Register rm) {
2776    revsh(al, size, rd, rm);
2777  }
2778
2779  void ror(Condition cond,
2780           EncodingSize size,
2781           Register rd,
2782           Register rm,
2783           const Operand& operand);
2784  void ror(Register rd, Register rm, const Operand& operand) {
2785    ror(al, Best, rd, rm, operand);
2786  }
2787  void ror(Condition cond, Register rd, Register rm, const Operand& operand) {
2788    ror(cond, Best, rd, rm, operand);
2789  }
2790  void ror(EncodingSize size,
2791           Register rd,
2792           Register rm,
2793           const Operand& operand) {
2794    ror(al, size, rd, rm, operand);
2795  }
2796
2797  void rors(Condition cond,
2798            EncodingSize size,
2799            Register rd,
2800            Register rm,
2801            const Operand& operand);
2802  void rors(Register rd, Register rm, const Operand& operand) {
2803    rors(al, Best, rd, rm, operand);
2804  }
2805  void rors(Condition cond, Register rd, Register rm, const Operand& operand) {
2806    rors(cond, Best, rd, rm, operand);
2807  }
2808  void rors(EncodingSize size,
2809            Register rd,
2810            Register rm,
2811            const Operand& operand) {
2812    rors(al, size, rd, rm, operand);
2813  }
2814
2815  void rrx(Condition cond, Register rd, Register rm);
2816  void rrx(Register rd, Register rm) { rrx(al, rd, rm); }
2817
2818  void rrxs(Condition cond, Register rd, Register rm);
2819  void rrxs(Register rd, Register rm) { rrxs(al, rd, rm); }
2820
2821  void rsb(Condition cond,
2822           EncodingSize size,
2823           Register rd,
2824           Register rn,
2825           const Operand& operand);
2826  void rsb(Register rd, Register rn, const Operand& operand) {
2827    rsb(al, Best, rd, rn, operand);
2828  }
2829  void rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
2830    rsb(cond, Best, rd, rn, operand);
2831  }
2832  void rsb(EncodingSize size,
2833           Register rd,
2834           Register rn,
2835           const Operand& operand) {
2836    rsb(al, size, rd, rn, operand);
2837  }
2838
2839  void rsbs(Condition cond,
2840            EncodingSize size,
2841            Register rd,
2842            Register rn,
2843            const Operand& operand);
2844  void rsbs(Register rd, Register rn, const Operand& operand) {
2845    rsbs(al, Best, rd, rn, operand);
2846  }
2847  void rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
2848    rsbs(cond, Best, rd, rn, operand);
2849  }
2850  void rsbs(EncodingSize size,
2851            Register rd,
2852            Register rn,
2853            const Operand& operand) {
2854    rsbs(al, size, rd, rn, operand);
2855  }
2856
2857  void rsc(Condition cond, Register rd, Register rn, const Operand& operand);
2858  void rsc(Register rd, Register rn, const Operand& operand) {
2859    rsc(al, rd, rn, operand);
2860  }
2861
2862  void rscs(Condition cond, Register rd, Register rn, const Operand& operand);
2863  void rscs(Register rd, Register rn, const Operand& operand) {
2864    rscs(al, rd, rn, operand);
2865  }
2866
2867  void sadd16(Condition cond, Register rd, Register rn, Register rm);
2868  void sadd16(Register rd, Register rn, Register rm) { sadd16(al, rd, rn, rm); }
2869
2870  void sadd8(Condition cond, Register rd, Register rn, Register rm);
2871  void sadd8(Register rd, Register rn, Register rm) { sadd8(al, rd, rn, rm); }
2872
2873  void sasx(Condition cond, Register rd, Register rn, Register rm);
2874  void sasx(Register rd, Register rn, Register rm) { sasx(al, rd, rn, rm); }
2875
2876  void sbc(Condition cond,
2877           EncodingSize size,
2878           Register rd,
2879           Register rn,
2880           const Operand& operand);
2881  void sbc(Register rd, Register rn, const Operand& operand) {
2882    sbc(al, Best, rd, rn, operand);
2883  }
2884  void sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
2885    sbc(cond, Best, rd, rn, operand);
2886  }
2887  void sbc(EncodingSize size,
2888           Register rd,
2889           Register rn,
2890           const Operand& operand) {
2891    sbc(al, size, rd, rn, operand);
2892  }
2893
2894  void sbcs(Condition cond,
2895            EncodingSize size,
2896            Register rd,
2897            Register rn,
2898            const Operand& operand);
2899  void sbcs(Register rd, Register rn, const Operand& operand) {
2900    sbcs(al, Best, rd, rn, operand);
2901  }
2902  void sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
2903    sbcs(cond, Best, rd, rn, operand);
2904  }
2905  void sbcs(EncodingSize size,
2906            Register rd,
2907            Register rn,
2908            const Operand& operand) {
2909    sbcs(al, size, rd, rn, operand);
2910  }
2911
2912  void sbfx(Condition cond,
2913            Register rd,
2914            Register rn,
2915            uint32_t lsb,
2916            const Operand& operand);
2917  void sbfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
2918    sbfx(al, rd, rn, lsb, operand);
2919  }
2920
2921  void sdiv(Condition cond, Register rd, Register rn, Register rm);
2922  void sdiv(Register rd, Register rn, Register rm) { sdiv(al, rd, rn, rm); }
2923
2924  void sel(Condition cond, Register rd, Register rn, Register rm);
2925  void sel(Register rd, Register rn, Register rm) { sel(al, rd, rn, rm); }
2926
2927  void shadd16(Condition cond, Register rd, Register rn, Register rm);
2928  void shadd16(Register rd, Register rn, Register rm) {
2929    shadd16(al, rd, rn, rm);
2930  }
2931
2932  void shadd8(Condition cond, Register rd, Register rn, Register rm);
2933  void shadd8(Register rd, Register rn, Register rm) { shadd8(al, rd, rn, rm); }
2934
2935  void shasx(Condition cond, Register rd, Register rn, Register rm);
2936  void shasx(Register rd, Register rn, Register rm) { shasx(al, rd, rn, rm); }
2937
2938  void shsax(Condition cond, Register rd, Register rn, Register rm);
2939  void shsax(Register rd, Register rn, Register rm) { shsax(al, rd, rn, rm); }
2940
2941  void shsub16(Condition cond, Register rd, Register rn, Register rm);
2942  void shsub16(Register rd, Register rn, Register rm) {
2943    shsub16(al, rd, rn, rm);
2944  }
2945
2946  void shsub8(Condition cond, Register rd, Register rn, Register rm);
2947  void shsub8(Register rd, Register rn, Register rm) { shsub8(al, rd, rn, rm); }
2948
2949  void smlabb(
2950      Condition cond, Register rd, Register rn, Register rm, Register ra);
2951  void smlabb(Register rd, Register rn, Register rm, Register ra) {
2952    smlabb(al, rd, rn, rm, ra);
2953  }
2954
2955  void smlabt(
2956      Condition cond, Register rd, Register rn, Register rm, Register ra);
2957  void smlabt(Register rd, Register rn, Register rm, Register ra) {
2958    smlabt(al, rd, rn, rm, ra);
2959  }
2960
2961  void smlad(
2962      Condition cond, Register rd, Register rn, Register rm, Register ra);
2963  void smlad(Register rd, Register rn, Register rm, Register ra) {
2964    smlad(al, rd, rn, rm, ra);
2965  }
2966
2967  void smladx(
2968      Condition cond, Register rd, Register rn, Register rm, Register ra);
2969  void smladx(Register rd, Register rn, Register rm, Register ra) {
2970    smladx(al, rd, rn, rm, ra);
2971  }
2972
2973  void smlal(
2974      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
2975  void smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
2976    smlal(al, rdlo, rdhi, rn, rm);
2977  }
2978
2979  void smlalbb(
2980      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
2981  void smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
2982    smlalbb(al, rdlo, rdhi, rn, rm);
2983  }
2984
2985  void smlalbt(
2986      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
2987  void smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
2988    smlalbt(al, rdlo, rdhi, rn, rm);
2989  }
2990
2991  void smlald(
2992      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
2993  void smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
2994    smlald(al, rdlo, rdhi, rn, rm);
2995  }
2996
2997  void smlaldx(
2998      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
2999  void smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3000    smlaldx(al, rdlo, rdhi, rn, rm);
3001  }
3002
3003  void smlals(
3004      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3005  void smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3006    smlals(al, rdlo, rdhi, rn, rm);
3007  }
3008
3009  void smlaltb(
3010      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3011  void smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3012    smlaltb(al, rdlo, rdhi, rn, rm);
3013  }
3014
3015  void smlaltt(
3016      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3017  void smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3018    smlaltt(al, rdlo, rdhi, rn, rm);
3019  }
3020
3021  void smlatb(
3022      Condition cond, Register rd, Register rn, Register rm, Register ra);
3023  void smlatb(Register rd, Register rn, Register rm, Register ra) {
3024    smlatb(al, rd, rn, rm, ra);
3025  }
3026
3027  void smlatt(
3028      Condition cond, Register rd, Register rn, Register rm, Register ra);
3029  void smlatt(Register rd, Register rn, Register rm, Register ra) {
3030    smlatt(al, rd, rn, rm, ra);
3031  }
3032
3033  void smlawb(
3034      Condition cond, Register rd, Register rn, Register rm, Register ra);
3035  void smlawb(Register rd, Register rn, Register rm, Register ra) {
3036    smlawb(al, rd, rn, rm, ra);
3037  }
3038
3039  void smlawt(
3040      Condition cond, Register rd, Register rn, Register rm, Register ra);
3041  void smlawt(Register rd, Register rn, Register rm, Register ra) {
3042    smlawt(al, rd, rn, rm, ra);
3043  }
3044
3045  void smlsd(
3046      Condition cond, Register rd, Register rn, Register rm, Register ra);
3047  void smlsd(Register rd, Register rn, Register rm, Register ra) {
3048    smlsd(al, rd, rn, rm, ra);
3049  }
3050
3051  void smlsdx(
3052      Condition cond, Register rd, Register rn, Register rm, Register ra);
3053  void smlsdx(Register rd, Register rn, Register rm, Register ra) {
3054    smlsdx(al, rd, rn, rm, ra);
3055  }
3056
3057  void smlsld(
3058      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3059  void smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3060    smlsld(al, rdlo, rdhi, rn, rm);
3061  }
3062
3063  void smlsldx(
3064      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3065  void smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3066    smlsldx(al, rdlo, rdhi, rn, rm);
3067  }
3068
3069  void smmla(
3070      Condition cond, Register rd, Register rn, Register rm, Register ra);
3071  void smmla(Register rd, Register rn, Register rm, Register ra) {
3072    smmla(al, rd, rn, rm, ra);
3073  }
3074
3075  void smmlar(
3076      Condition cond, Register rd, Register rn, Register rm, Register ra);
3077  void smmlar(Register rd, Register rn, Register rm, Register ra) {
3078    smmlar(al, rd, rn, rm, ra);
3079  }
3080
3081  void smmls(
3082      Condition cond, Register rd, Register rn, Register rm, Register ra);
3083  void smmls(Register rd, Register rn, Register rm, Register ra) {
3084    smmls(al, rd, rn, rm, ra);
3085  }
3086
3087  void smmlsr(
3088      Condition cond, Register rd, Register rn, Register rm, Register ra);
3089  void smmlsr(Register rd, Register rn, Register rm, Register ra) {
3090    smmlsr(al, rd, rn, rm, ra);
3091  }
3092
3093  void smmul(Condition cond, Register rd, Register rn, Register rm);
3094  void smmul(Register rd, Register rn, Register rm) { smmul(al, rd, rn, rm); }
3095
3096  void smmulr(Condition cond, Register rd, Register rn, Register rm);
3097  void smmulr(Register rd, Register rn, Register rm) { smmulr(al, rd, rn, rm); }
3098
3099  void smuad(Condition cond, Register rd, Register rn, Register rm);
3100  void smuad(Register rd, Register rn, Register rm) { smuad(al, rd, rn, rm); }
3101
3102  void smuadx(Condition cond, Register rd, Register rn, Register rm);
3103  void smuadx(Register rd, Register rn, Register rm) { smuadx(al, rd, rn, rm); }
3104
3105  void smulbb(Condition cond, Register rd, Register rn, Register rm);
3106  void smulbb(Register rd, Register rn, Register rm) { smulbb(al, rd, rn, rm); }
3107
3108  void smulbt(Condition cond, Register rd, Register rn, Register rm);
3109  void smulbt(Register rd, Register rn, Register rm) { smulbt(al, rd, rn, rm); }
3110
3111  void smull(
3112      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3113  void smull(Register rdlo, Register rdhi, Register rn, Register rm) {
3114    smull(al, rdlo, rdhi, rn, rm);
3115  }
3116
3117  void smulls(
3118      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3119  void smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
3120    smulls(al, rdlo, rdhi, rn, rm);
3121  }
3122
3123  void smultb(Condition cond, Register rd, Register rn, Register rm);
3124  void smultb(Register rd, Register rn, Register rm) { smultb(al, rd, rn, rm); }
3125
3126  void smultt(Condition cond, Register rd, Register rn, Register rm);
3127  void smultt(Register rd, Register rn, Register rm) { smultt(al, rd, rn, rm); }
3128
3129  void smulwb(Condition cond, Register rd, Register rn, Register rm);
3130  void smulwb(Register rd, Register rn, Register rm) { smulwb(al, rd, rn, rm); }
3131
3132  void smulwt(Condition cond, Register rd, Register rn, Register rm);
3133  void smulwt(Register rd, Register rn, Register rm) { smulwt(al, rd, rn, rm); }
3134
3135  void smusd(Condition cond, Register rd, Register rn, Register rm);
3136  void smusd(Register rd, Register rn, Register rm) { smusd(al, rd, rn, rm); }
3137
3138  void smusdx(Condition cond, Register rd, Register rn, Register rm);
3139  void smusdx(Register rd, Register rn, Register rm) { smusdx(al, rd, rn, rm); }
3140
3141  void ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
3142  void ssat(Register rd, uint32_t imm, const Operand& operand) {
3143    ssat(al, rd, imm, operand);
3144  }
3145
3146  void ssat16(Condition cond, Register rd, uint32_t imm, Register rn);
3147  void ssat16(Register rd, uint32_t imm, Register rn) {
3148    ssat16(al, rd, imm, rn);
3149  }
3150
3151  void ssax(Condition cond, Register rd, Register rn, Register rm);
3152  void ssax(Register rd, Register rn, Register rm) { ssax(al, rd, rn, rm); }
3153
3154  void ssub16(Condition cond, Register rd, Register rn, Register rm);
3155  void ssub16(Register rd, Register rn, Register rm) { ssub16(al, rd, rn, rm); }
3156
3157  void ssub8(Condition cond, Register rd, Register rn, Register rm);
3158  void ssub8(Register rd, Register rn, Register rm) { ssub8(al, rd, rn, rm); }
3159
3160  void stl(Condition cond, Register rt, const MemOperand& operand);
3161  void stl(Register rt, const MemOperand& operand) { stl(al, rt, operand); }
3162
3163  void stlb(Condition cond, Register rt, const MemOperand& operand);
3164  void stlb(Register rt, const MemOperand& operand) { stlb(al, rt, operand); }
3165
3166  void stlex(Condition cond,
3167             Register rd,
3168             Register rt,
3169             const MemOperand& operand);
3170  void stlex(Register rd, Register rt, const MemOperand& operand) {
3171    stlex(al, rd, rt, operand);
3172  }
3173
3174  void stlexb(Condition cond,
3175              Register rd,
3176              Register rt,
3177              const MemOperand& operand);
3178  void stlexb(Register rd, Register rt, const MemOperand& operand) {
3179    stlexb(al, rd, rt, operand);
3180  }
3181
3182  void stlexd(Condition cond,
3183              Register rd,
3184              Register rt,
3185              Register rt2,
3186              const MemOperand& operand);
3187  void stlexd(Register rd,
3188              Register rt,
3189              Register rt2,
3190              const MemOperand& operand) {
3191    stlexd(al, rd, rt, rt2, operand);
3192  }
3193
3194  void stlexh(Condition cond,
3195              Register rd,
3196              Register rt,
3197              const MemOperand& operand);
3198  void stlexh(Register rd, Register rt, const MemOperand& operand) {
3199    stlexh(al, rd, rt, operand);
3200  }
3201
3202  void stlh(Condition cond, Register rt, const MemOperand& operand);
3203  void stlh(Register rt, const MemOperand& operand) { stlh(al, rt, operand); }
3204
3205  void stm(Condition cond,
3206           EncodingSize size,
3207           Register rn,
3208           WriteBack write_back,
3209           RegisterList registers);
3210  void stm(Register rn, WriteBack write_back, RegisterList registers) {
3211    stm(al, Best, rn, write_back, registers);
3212  }
3213  void stm(Condition cond,
3214           Register rn,
3215           WriteBack write_back,
3216           RegisterList registers) {
3217    stm(cond, Best, rn, write_back, registers);
3218  }
3219  void stm(EncodingSize size,
3220           Register rn,
3221           WriteBack write_back,
3222           RegisterList registers) {
3223    stm(al, size, rn, write_back, registers);
3224  }
3225
3226  void stmda(Condition cond,
3227             Register rn,
3228             WriteBack write_back,
3229             RegisterList registers);
3230  void stmda(Register rn, WriteBack write_back, RegisterList registers) {
3231    stmda(al, rn, write_back, registers);
3232  }
3233
3234  void stmdb(Condition cond,
3235             EncodingSize size,
3236             Register rn,
3237             WriteBack write_back,
3238             RegisterList registers);
3239  void stmdb(Register rn, WriteBack write_back, RegisterList registers) {
3240    stmdb(al, Best, rn, write_back, registers);
3241  }
3242  void stmdb(Condition cond,
3243             Register rn,
3244             WriteBack write_back,
3245             RegisterList registers) {
3246    stmdb(cond, Best, rn, write_back, registers);
3247  }
3248  void stmdb(EncodingSize size,
3249             Register rn,
3250             WriteBack write_back,
3251             RegisterList registers) {
3252    stmdb(al, size, rn, write_back, registers);
3253  }
3254
3255  void stmea(Condition cond,
3256             EncodingSize size,
3257             Register rn,
3258             WriteBack write_back,
3259             RegisterList registers);
3260  void stmea(Register rn, WriteBack write_back, RegisterList registers) {
3261    stmea(al, Best, rn, write_back, registers);
3262  }
3263  void stmea(Condition cond,
3264             Register rn,
3265             WriteBack write_back,
3266             RegisterList registers) {
3267    stmea(cond, Best, rn, write_back, registers);
3268  }
3269  void stmea(EncodingSize size,
3270             Register rn,
3271             WriteBack write_back,
3272             RegisterList registers) {
3273    stmea(al, size, rn, write_back, registers);
3274  }
3275
3276  void stmed(Condition cond,
3277             Register rn,
3278             WriteBack write_back,
3279             RegisterList registers);
3280  void stmed(Register rn, WriteBack write_back, RegisterList registers) {
3281    stmed(al, rn, write_back, registers);
3282  }
3283
3284  void stmfa(Condition cond,
3285             Register rn,
3286             WriteBack write_back,
3287             RegisterList registers);
3288  void stmfa(Register rn, WriteBack write_back, RegisterList registers) {
3289    stmfa(al, rn, write_back, registers);
3290  }
3291
3292  void stmfd(Condition cond,
3293             Register rn,
3294             WriteBack write_back,
3295             RegisterList registers);
3296  void stmfd(Register rn, WriteBack write_back, RegisterList registers) {
3297    stmfd(al, rn, write_back, registers);
3298  }
3299
3300  void stmib(Condition cond,
3301             Register rn,
3302             WriteBack write_back,
3303             RegisterList registers);
3304  void stmib(Register rn, WriteBack write_back, RegisterList registers) {
3305    stmib(al, rn, write_back, registers);
3306  }
3307
3308  void str(Condition cond,
3309           EncodingSize size,
3310           Register rt,
3311           const MemOperand& operand);
3312  void str(Register rt, const MemOperand& operand) {
3313    str(al, Best, rt, operand);
3314  }
3315  void str(Condition cond, Register rt, const MemOperand& operand) {
3316    str(cond, Best, rt, operand);
3317  }
3318  void str(EncodingSize size, Register rt, const MemOperand& operand) {
3319    str(al, size, rt, operand);
3320  }
3321
3322  void strb(Condition cond,
3323            EncodingSize size,
3324            Register rt,
3325            const MemOperand& operand);
3326  void strb(Register rt, const MemOperand& operand) {
3327    strb(al, Best, rt, operand);
3328  }
3329  void strb(Condition cond, Register rt, const MemOperand& operand) {
3330    strb(cond, Best, rt, operand);
3331  }
3332  void strb(EncodingSize size, Register rt, const MemOperand& operand) {
3333    strb(al, size, rt, operand);
3334  }
3335
3336  void strd(Condition cond,
3337            Register rt,
3338            Register rt2,
3339            const MemOperand& operand);
3340  void strd(Register rt, Register rt2, const MemOperand& operand) {
3341    strd(al, rt, rt2, operand);
3342  }
3343
3344  void strex(Condition cond,
3345             Register rd,
3346             Register rt,
3347             const MemOperand& operand);
3348  void strex(Register rd, Register rt, const MemOperand& operand) {
3349    strex(al, rd, rt, operand);
3350  }
3351
3352  void strexb(Condition cond,
3353              Register rd,
3354              Register rt,
3355              const MemOperand& operand);
3356  void strexb(Register rd, Register rt, const MemOperand& operand) {
3357    strexb(al, rd, rt, operand);
3358  }
3359
3360  void strexd(Condition cond,
3361              Register rd,
3362              Register rt,
3363              Register rt2,
3364              const MemOperand& operand);
3365  void strexd(Register rd,
3366              Register rt,
3367              Register rt2,
3368              const MemOperand& operand) {
3369    strexd(al, rd, rt, rt2, operand);
3370  }
3371
3372  void strexh(Condition cond,
3373              Register rd,
3374              Register rt,
3375              const MemOperand& operand);
3376  void strexh(Register rd, Register rt, const MemOperand& operand) {
3377    strexh(al, rd, rt, operand);
3378  }
3379
3380  void strh(Condition cond,
3381            EncodingSize size,
3382            Register rt,
3383            const MemOperand& operand);
3384  void strh(Register rt, const MemOperand& operand) {
3385    strh(al, Best, rt, operand);
3386  }
3387  void strh(Condition cond, Register rt, const MemOperand& operand) {
3388    strh(cond, Best, rt, operand);
3389  }
3390  void strh(EncodingSize size, Register rt, const MemOperand& operand) {
3391    strh(al, size, rt, operand);
3392  }
3393
3394  void sub(Condition cond,
3395           EncodingSize size,
3396           Register rd,
3397           Register rn,
3398           const Operand& operand);
3399  void sub(Register rd, Register rn, const Operand& operand) {
3400    sub(al, Best, rd, rn, operand);
3401  }
3402  void sub(Condition cond, Register rd, Register rn, const Operand& operand) {
3403    sub(cond, Best, rd, rn, operand);
3404  }
3405  void sub(EncodingSize size,
3406           Register rd,
3407           Register rn,
3408           const Operand& operand) {
3409    sub(al, size, rd, rn, operand);
3410  }
3411
3412  void sub(Condition cond, Register rd, const Operand& operand);
3413  void sub(Register rd, const Operand& operand) { sub(al, rd, operand); }
3414
3415  void subs(Condition cond,
3416            EncodingSize size,
3417            Register rd,
3418            Register rn,
3419            const Operand& operand);
3420  void subs(Register rd, Register rn, const Operand& operand) {
3421    subs(al, Best, rd, rn, operand);
3422  }
3423  void subs(Condition cond, Register rd, Register rn, const Operand& operand) {
3424    subs(cond, Best, rd, rn, operand);
3425  }
3426  void subs(EncodingSize size,
3427            Register rd,
3428            Register rn,
3429            const Operand& operand) {
3430    subs(al, size, rd, rn, operand);
3431  }
3432
3433  void subs(Register rd, const Operand& operand);
3434
3435  void subw(Condition cond, Register rd, Register rn, const Operand& operand);
3436  void subw(Register rd, Register rn, const Operand& operand) {
3437    subw(al, rd, rn, operand);
3438  }
3439
3440  void svc(Condition cond, uint32_t imm);
3441  void svc(uint32_t imm) { svc(al, imm); }
3442
3443  void sxtab(Condition cond, Register rd, Register rn, const Operand& operand);
3444  void sxtab(Register rd, Register rn, const Operand& operand) {
3445    sxtab(al, rd, rn, operand);
3446  }
3447
3448  void sxtab16(Condition cond,
3449               Register rd,
3450               Register rn,
3451               const Operand& operand);
3452  void sxtab16(Register rd, Register rn, const Operand& operand) {
3453    sxtab16(al, rd, rn, operand);
3454  }
3455
3456  void sxtah(Condition cond, Register rd, Register rn, const Operand& operand);
3457  void sxtah(Register rd, Register rn, const Operand& operand) {
3458    sxtah(al, rd, rn, operand);
3459  }
3460
3461  void sxtb(Condition cond,
3462            EncodingSize size,
3463            Register rd,
3464            const Operand& operand);
3465  void sxtb(Register rd, const Operand& operand) {
3466    sxtb(al, Best, rd, operand);
3467  }
3468  void sxtb(Condition cond, Register rd, const Operand& operand) {
3469    sxtb(cond, Best, rd, operand);
3470  }
3471  void sxtb(EncodingSize size, Register rd, const Operand& operand) {
3472    sxtb(al, size, rd, operand);
3473  }
3474
3475  void sxtb16(Condition cond, Register rd, const Operand& operand);
3476  void sxtb16(Register rd, const Operand& operand) { sxtb16(al, rd, operand); }
3477
3478  void sxth(Condition cond,
3479            EncodingSize size,
3480            Register rd,
3481            const Operand& operand);
3482  void sxth(Register rd, const Operand& operand) {
3483    sxth(al, Best, rd, operand);
3484  }
3485  void sxth(Condition cond, Register rd, const Operand& operand) {
3486    sxth(cond, Best, rd, operand);
3487  }
3488  void sxth(EncodingSize size, Register rd, const Operand& operand) {
3489    sxth(al, size, rd, operand);
3490  }
3491
3492  void tbb(Condition cond, Register rn, Register rm);
3493  void tbb(Register rn, Register rm) { tbb(al, rn, rm); }
3494
3495  void tbh(Condition cond, Register rn, Register rm);
3496  void tbh(Register rn, Register rm) { tbh(al, rn, rm); }
3497
3498  void teq(Condition cond, Register rn, const Operand& operand);
3499  void teq(Register rn, const Operand& operand) { teq(al, rn, operand); }
3500
3501  void tst(Condition cond,
3502           EncodingSize size,
3503           Register rn,
3504           const Operand& operand);
3505  void tst(Register rn, const Operand& operand) { tst(al, Best, rn, operand); }
3506  void tst(Condition cond, Register rn, const Operand& operand) {
3507    tst(cond, Best, rn, operand);
3508  }
3509  void tst(EncodingSize size, Register rn, const Operand& operand) {
3510    tst(al, size, rn, operand);
3511  }
3512
3513  void uadd16(Condition cond, Register rd, Register rn, Register rm);
3514  void uadd16(Register rd, Register rn, Register rm) { uadd16(al, rd, rn, rm); }
3515
3516  void uadd8(Condition cond, Register rd, Register rn, Register rm);
3517  void uadd8(Register rd, Register rn, Register rm) { uadd8(al, rd, rn, rm); }
3518
3519  void uasx(Condition cond, Register rd, Register rn, Register rm);
3520  void uasx(Register rd, Register rn, Register rm) { uasx(al, rd, rn, rm); }
3521
3522  void ubfx(Condition cond,
3523            Register rd,
3524            Register rn,
3525            uint32_t lsb,
3526            const Operand& operand);
3527  void ubfx(Register rd, Register rn, uint32_t lsb, const Operand& operand) {
3528    ubfx(al, rd, rn, lsb, operand);
3529  }
3530
3531  void udf(Condition cond, EncodingSize size, uint32_t imm);
3532  void udf(uint32_t imm) { udf(al, Best, imm); }
3533  void udf(Condition cond, uint32_t imm) { udf(cond, Best, imm); }
3534  void udf(EncodingSize size, uint32_t imm) { udf(al, size, imm); }
3535
3536  void udiv(Condition cond, Register rd, Register rn, Register rm);
3537  void udiv(Register rd, Register rn, Register rm) { udiv(al, rd, rn, rm); }
3538
3539  void uhadd16(Condition cond, Register rd, Register rn, Register rm);
3540  void uhadd16(Register rd, Register rn, Register rm) {
3541    uhadd16(al, rd, rn, rm);
3542  }
3543
3544  void uhadd8(Condition cond, Register rd, Register rn, Register rm);
3545  void uhadd8(Register rd, Register rn, Register rm) { uhadd8(al, rd, rn, rm); }
3546
3547  void uhasx(Condition cond, Register rd, Register rn, Register rm);
3548  void uhasx(Register rd, Register rn, Register rm) { uhasx(al, rd, rn, rm); }
3549
3550  void uhsax(Condition cond, Register rd, Register rn, Register rm);
3551  void uhsax(Register rd, Register rn, Register rm) { uhsax(al, rd, rn, rm); }
3552
3553  void uhsub16(Condition cond, Register rd, Register rn, Register rm);
3554  void uhsub16(Register rd, Register rn, Register rm) {
3555    uhsub16(al, rd, rn, rm);
3556  }
3557
3558  void uhsub8(Condition cond, Register rd, Register rn, Register rm);
3559  void uhsub8(Register rd, Register rn, Register rm) { uhsub8(al, rd, rn, rm); }
3560
3561  void umaal(
3562      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3563  void umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
3564    umaal(al, rdlo, rdhi, rn, rm);
3565  }
3566
3567  void umlal(
3568      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3569  void umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3570    umlal(al, rdlo, rdhi, rn, rm);
3571  }
3572
3573  void umlals(
3574      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3575  void umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3576    umlals(al, rdlo, rdhi, rn, rm);
3577  }
3578
3579  void umull(
3580      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3581  void umull(Register rdlo, Register rdhi, Register rn, Register rm) {
3582    umull(al, rdlo, rdhi, rn, rm);
3583  }
3584
3585  void umulls(
3586      Condition cond, Register rdlo, Register rdhi, Register rn, Register rm);
3587  void umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
3588    umulls(al, rdlo, rdhi, rn, rm);
3589  }
3590
3591  void uqadd16(Condition cond, Register rd, Register rn, Register rm);
3592  void uqadd16(Register rd, Register rn, Register rm) {
3593    uqadd16(al, rd, rn, rm);
3594  }
3595
3596  void uqadd8(Condition cond, Register rd, Register rn, Register rm);
3597  void uqadd8(Register rd, Register rn, Register rm) { uqadd8(al, rd, rn, rm); }
3598
3599  void uqasx(Condition cond, Register rd, Register rn, Register rm);
3600  void uqasx(Register rd, Register rn, Register rm) { uqasx(al, rd, rn, rm); }
3601
3602  void uqsax(Condition cond, Register rd, Register rn, Register rm);
3603  void uqsax(Register rd, Register rn, Register rm) { uqsax(al, rd, rn, rm); }
3604
3605  void uqsub16(Condition cond, Register rd, Register rn, Register rm);
3606  void uqsub16(Register rd, Register rn, Register rm) {
3607    uqsub16(al, rd, rn, rm);
3608  }
3609
3610  void uqsub8(Condition cond, Register rd, Register rn, Register rm);
3611  void uqsub8(Register rd, Register rn, Register rm) { uqsub8(al, rd, rn, rm); }
3612
3613  void usad8(Condition cond, Register rd, Register rn, Register rm);
3614  void usad8(Register rd, Register rn, Register rm) { usad8(al, rd, rn, rm); }
3615
3616  void usada8(
3617      Condition cond, Register rd, Register rn, Register rm, Register ra);
3618  void usada8(Register rd, Register rn, Register rm, Register ra) {
3619    usada8(al, rd, rn, rm, ra);
3620  }
3621
3622  void usat(Condition cond, Register rd, uint32_t imm, const Operand& operand);
3623  void usat(Register rd, uint32_t imm, const Operand& operand) {
3624    usat(al, rd, imm, operand);
3625  }
3626
3627  void usat16(Condition cond, Register rd, uint32_t imm, Register rn);
3628  void usat16(Register rd, uint32_t imm, Register rn) {
3629    usat16(al, rd, imm, rn);
3630  }
3631
3632  void usax(Condition cond, Register rd, Register rn, Register rm);
3633  void usax(Register rd, Register rn, Register rm) { usax(al, rd, rn, rm); }
3634
3635  void usub16(Condition cond, Register rd, Register rn, Register rm);
3636  void usub16(Register rd, Register rn, Register rm) { usub16(al, rd, rn, rm); }
3637
3638  void usub8(Condition cond, Register rd, Register rn, Register rm);
3639  void usub8(Register rd, Register rn, Register rm) { usub8(al, rd, rn, rm); }
3640
3641  void uxtab(Condition cond, Register rd, Register rn, const Operand& operand);
3642  void uxtab(Register rd, Register rn, const Operand& operand) {
3643    uxtab(al, rd, rn, operand);
3644  }
3645
3646  void uxtab16(Condition cond,
3647               Register rd,
3648               Register rn,
3649               const Operand& operand);
3650  void uxtab16(Register rd, Register rn, const Operand& operand) {
3651    uxtab16(al, rd, rn, operand);
3652  }
3653
3654  void uxtah(Condition cond, Register rd, Register rn, const Operand& operand);
3655  void uxtah(Register rd, Register rn, const Operand& operand) {
3656    uxtah(al, rd, rn, operand);
3657  }
3658
3659  void uxtb(Condition cond,
3660            EncodingSize size,
3661            Register rd,
3662            const Operand& operand);
3663  void uxtb(Register rd, const Operand& operand) {
3664    uxtb(al, Best, rd, operand);
3665  }
3666  void uxtb(Condition cond, Register rd, const Operand& operand) {
3667    uxtb(cond, Best, rd, operand);
3668  }
3669  void uxtb(EncodingSize size, Register rd, const Operand& operand) {
3670    uxtb(al, size, rd, operand);
3671  }
3672
3673  void uxtb16(Condition cond, Register rd, const Operand& operand);
3674  void uxtb16(Register rd, const Operand& operand) { uxtb16(al, rd, operand); }
3675
3676  void uxth(Condition cond,
3677            EncodingSize size,
3678            Register rd,
3679            const Operand& operand);
3680  void uxth(Register rd, const Operand& operand) {
3681    uxth(al, Best, rd, operand);
3682  }
3683  void uxth(Condition cond, Register rd, const Operand& operand) {
3684    uxth(cond, Best, rd, operand);
3685  }
3686  void uxth(EncodingSize size, Register rd, const Operand& operand) {
3687    uxth(al, size, rd, operand);
3688  }
3689
3690  void vaba(
3691      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3692  void vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3693    vaba(al, dt, rd, rn, rm);
3694  }
3695
3696  void vaba(
3697      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3698  void vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3699    vaba(al, dt, rd, rn, rm);
3700  }
3701
3702  void vabal(
3703      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
3704  void vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
3705    vabal(al, dt, rd, rn, rm);
3706  }
3707
3708  void vabd(
3709      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3710  void vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3711    vabd(al, dt, rd, rn, rm);
3712  }
3713
3714  void vabd(
3715      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3716  void vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3717    vabd(al, dt, rd, rn, rm);
3718  }
3719
3720  void vabdl(
3721      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
3722  void vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
3723    vabdl(al, dt, rd, rn, rm);
3724  }
3725
3726  void vabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
3727  void vabs(DataType dt, DRegister rd, DRegister rm) { vabs(al, dt, rd, rm); }
3728
3729  void vabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
3730  void vabs(DataType dt, QRegister rd, QRegister rm) { vabs(al, dt, rd, rm); }
3731
3732  void vabs(Condition cond, DataType dt, SRegister rd, SRegister rm);
3733  void vabs(DataType dt, SRegister rd, SRegister rm) { vabs(al, dt, rd, rm); }
3734
3735  void vacge(
3736      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3737  void vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3738    vacge(al, dt, rd, rn, rm);
3739  }
3740
3741  void vacge(
3742      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3743  void vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3744    vacge(al, dt, rd, rn, rm);
3745  }
3746
3747  void vacgt(
3748      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3749  void vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3750    vacgt(al, dt, rd, rn, rm);
3751  }
3752
3753  void vacgt(
3754      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3755  void vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3756    vacgt(al, dt, rd, rn, rm);
3757  }
3758
3759  void vacle(
3760      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3761  void vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3762    vacle(al, dt, rd, rn, rm);
3763  }
3764
3765  void vacle(
3766      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3767  void vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3768    vacle(al, dt, rd, rn, rm);
3769  }
3770
3771  void vaclt(
3772      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3773  void vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3774    vaclt(al, dt, rd, rn, rm);
3775  }
3776
3777  void vaclt(
3778      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3779  void vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3780    vaclt(al, dt, rd, rn, rm);
3781  }
3782
3783  void vadd(
3784      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3785  void vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3786    vadd(al, dt, rd, rn, rm);
3787  }
3788
3789  void vadd(
3790      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3791  void vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3792    vadd(al, dt, rd, rn, rm);
3793  }
3794
3795  void vadd(
3796      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
3797  void vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
3798    vadd(al, dt, rd, rn, rm);
3799  }
3800
3801  void vaddhn(
3802      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
3803  void vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
3804    vaddhn(al, dt, rd, rn, rm);
3805  }
3806
3807  void vaddl(
3808      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
3809  void vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
3810    vaddl(al, dt, rd, rn, rm);
3811  }
3812
3813  void vaddw(
3814      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
3815  void vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
3816    vaddw(al, dt, rd, rn, rm);
3817  }
3818
3819  void vand(Condition cond,
3820            DataType dt,
3821            DRegister rd,
3822            DRegister rn,
3823            const DOperand& operand);
3824  void vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
3825    vand(al, dt, rd, rn, operand);
3826  }
3827
3828  void vand(Condition cond,
3829            DataType dt,
3830            QRegister rd,
3831            QRegister rn,
3832            const QOperand& operand);
3833  void vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
3834    vand(al, dt, rd, rn, operand);
3835  }
3836
3837  void vbic(Condition cond,
3838            DataType dt,
3839            DRegister rd,
3840            DRegister rn,
3841            const DOperand& operand);
3842  void vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
3843    vbic(al, dt, rd, rn, operand);
3844  }
3845
3846  void vbic(Condition cond,
3847            DataType dt,
3848            QRegister rd,
3849            QRegister rn,
3850            const QOperand& operand);
3851  void vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
3852    vbic(al, dt, rd, rn, operand);
3853  }
3854
3855  void vbif(
3856      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3857  void vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3858    vbif(al, dt, rd, rn, rm);
3859  }
3860  void vbif(DRegister rd, DRegister rn, DRegister rm) {
3861    vbif(al, kDataTypeValueNone, rd, rn, rm);
3862  }
3863  void vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
3864    vbif(cond, kDataTypeValueNone, rd, rn, rm);
3865  }
3866
3867  void vbif(
3868      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3869  void vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3870    vbif(al, dt, rd, rn, rm);
3871  }
3872  void vbif(QRegister rd, QRegister rn, QRegister rm) {
3873    vbif(al, kDataTypeValueNone, rd, rn, rm);
3874  }
3875  void vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
3876    vbif(cond, kDataTypeValueNone, rd, rn, rm);
3877  }
3878
3879  void vbit(
3880      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3881  void vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3882    vbit(al, dt, rd, rn, rm);
3883  }
3884  void vbit(DRegister rd, DRegister rn, DRegister rm) {
3885    vbit(al, kDataTypeValueNone, rd, rn, rm);
3886  }
3887  void vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
3888    vbit(cond, kDataTypeValueNone, rd, rn, rm);
3889  }
3890
3891  void vbit(
3892      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3893  void vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3894    vbit(al, dt, rd, rn, rm);
3895  }
3896  void vbit(QRegister rd, QRegister rn, QRegister rm) {
3897    vbit(al, kDataTypeValueNone, rd, rn, rm);
3898  }
3899  void vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
3900    vbit(cond, kDataTypeValueNone, rd, rn, rm);
3901  }
3902
3903  void vbsl(
3904      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3905  void vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3906    vbsl(al, dt, rd, rn, rm);
3907  }
3908  void vbsl(DRegister rd, DRegister rn, DRegister rm) {
3909    vbsl(al, kDataTypeValueNone, rd, rn, rm);
3910  }
3911  void vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
3912    vbsl(cond, kDataTypeValueNone, rd, rn, rm);
3913  }
3914
3915  void vbsl(
3916      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3917  void vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3918    vbsl(al, dt, rd, rn, rm);
3919  }
3920  void vbsl(QRegister rd, QRegister rn, QRegister rm) {
3921    vbsl(al, kDataTypeValueNone, rd, rn, rm);
3922  }
3923  void vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
3924    vbsl(cond, kDataTypeValueNone, rd, rn, rm);
3925  }
3926
3927  void vceq(Condition cond,
3928            DataType dt,
3929            DRegister rd,
3930            DRegister rm,
3931            const DOperand& operand);
3932  void vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
3933    vceq(al, dt, rd, rm, operand);
3934  }
3935
3936  void vceq(Condition cond,
3937            DataType dt,
3938            QRegister rd,
3939            QRegister rm,
3940            const QOperand& operand);
3941  void vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
3942    vceq(al, dt, rd, rm, operand);
3943  }
3944
3945  void vceq(
3946      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3947  void vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3948    vceq(al, dt, rd, rn, rm);
3949  }
3950
3951  void vceq(
3952      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3953  void vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3954    vceq(al, dt, rd, rn, rm);
3955  }
3956
3957  void vcge(Condition cond,
3958            DataType dt,
3959            DRegister rd,
3960            DRegister rm,
3961            const DOperand& operand);
3962  void vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
3963    vcge(al, dt, rd, rm, operand);
3964  }
3965
3966  void vcge(Condition cond,
3967            DataType dt,
3968            QRegister rd,
3969            QRegister rm,
3970            const QOperand& operand);
3971  void vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
3972    vcge(al, dt, rd, rm, operand);
3973  }
3974
3975  void vcge(
3976      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
3977  void vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
3978    vcge(al, dt, rd, rn, rm);
3979  }
3980
3981  void vcge(
3982      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
3983  void vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
3984    vcge(al, dt, rd, rn, rm);
3985  }
3986
3987  void vcgt(Condition cond,
3988            DataType dt,
3989            DRegister rd,
3990            DRegister rm,
3991            const DOperand& operand);
3992  void vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
3993    vcgt(al, dt, rd, rm, operand);
3994  }
3995
3996  void vcgt(Condition cond,
3997            DataType dt,
3998            QRegister rd,
3999            QRegister rm,
4000            const QOperand& operand);
4001  void vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
4002    vcgt(al, dt, rd, rm, operand);
4003  }
4004
4005  void vcgt(
4006      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4007  void vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4008    vcgt(al, dt, rd, rn, rm);
4009  }
4010
4011  void vcgt(
4012      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4013  void vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4014    vcgt(al, dt, rd, rn, rm);
4015  }
4016
4017  void vcle(Condition cond,
4018            DataType dt,
4019            DRegister rd,
4020            DRegister rm,
4021            const DOperand& operand);
4022  void vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
4023    vcle(al, dt, rd, rm, operand);
4024  }
4025
4026  void vcle(Condition cond,
4027            DataType dt,
4028            QRegister rd,
4029            QRegister rm,
4030            const QOperand& operand);
4031  void vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
4032    vcle(al, dt, rd, rm, operand);
4033  }
4034
4035  void vcle(
4036      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4037  void vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4038    vcle(al, dt, rd, rn, rm);
4039  }
4040
4041  void vcle(
4042      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4043  void vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4044    vcle(al, dt, rd, rn, rm);
4045  }
4046
4047  void vcls(Condition cond, DataType dt, DRegister rd, DRegister rm);
4048  void vcls(DataType dt, DRegister rd, DRegister rm) { vcls(al, dt, rd, rm); }
4049
4050  void vcls(Condition cond, DataType dt, QRegister rd, QRegister rm);
4051  void vcls(DataType dt, QRegister rd, QRegister rm) { vcls(al, dt, rd, rm); }
4052
4053  void vclt(Condition cond,
4054            DataType dt,
4055            DRegister rd,
4056            DRegister rm,
4057            const DOperand& operand);
4058  void vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
4059    vclt(al, dt, rd, rm, operand);
4060  }
4061
4062  void vclt(Condition cond,
4063            DataType dt,
4064            QRegister rd,
4065            QRegister rm,
4066            const QOperand& operand);
4067  void vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
4068    vclt(al, dt, rd, rm, operand);
4069  }
4070
4071  void vclt(
4072      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4073  void vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4074    vclt(al, dt, rd, rn, rm);
4075  }
4076
4077  void vclt(
4078      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4079  void vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4080    vclt(al, dt, rd, rn, rm);
4081  }
4082
4083  void vclz(Condition cond, DataType dt, DRegister rd, DRegister rm);
4084  void vclz(DataType dt, DRegister rd, DRegister rm) { vclz(al, dt, rd, rm); }
4085
4086  void vclz(Condition cond, DataType dt, QRegister rd, QRegister rm);
4087  void vclz(DataType dt, QRegister rd, QRegister rm) { vclz(al, dt, rd, rm); }
4088
4089  void vcmp(Condition cond, DataType dt, SRegister rd, SRegister rm);
4090  void vcmp(DataType dt, SRegister rd, SRegister rm) { vcmp(al, dt, rd, rm); }
4091
4092  void vcmp(Condition cond, DataType dt, DRegister rd, DRegister rm);
4093  void vcmp(DataType dt, DRegister rd, DRegister rm) { vcmp(al, dt, rd, rm); }
4094
4095  void vcmp(Condition cond, DataType dt, SRegister rd, double imm);
4096  void vcmp(DataType dt, SRegister rd, double imm) { vcmp(al, dt, rd, imm); }
4097
4098  void vcmp(Condition cond, DataType dt, DRegister rd, double imm);
4099  void vcmp(DataType dt, DRegister rd, double imm) { vcmp(al, dt, rd, imm); }
4100
4101  void vcmpe(Condition cond, DataType dt, SRegister rd, SRegister rm);
4102  void vcmpe(DataType dt, SRegister rd, SRegister rm) { vcmpe(al, dt, rd, rm); }
4103
4104  void vcmpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
4105  void vcmpe(DataType dt, DRegister rd, DRegister rm) { vcmpe(al, dt, rd, rm); }
4106
4107  void vcmpe(Condition cond, DataType dt, SRegister rd, double imm);
4108  void vcmpe(DataType dt, SRegister rd, double imm) { vcmpe(al, dt, rd, imm); }
4109
4110  void vcmpe(Condition cond, DataType dt, DRegister rd, double imm);
4111  void vcmpe(DataType dt, DRegister rd, double imm) { vcmpe(al, dt, rd, imm); }
4112
4113  void vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm);
4114  void vcnt(DataType dt, DRegister rd, DRegister rm) { vcnt(al, dt, rd, rm); }
4115
4116  void vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm);
4117  void vcnt(DataType dt, QRegister rd, QRegister rm) { vcnt(al, dt, rd, rm); }
4118
4119  void vcvt(
4120      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
4121  void vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
4122    vcvt(al, dt1, dt2, rd, rm);
4123  }
4124
4125  void vcvt(
4126      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
4127  void vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
4128    vcvt(al, dt1, dt2, rd, rm);
4129  }
4130
4131  void vcvt(Condition cond,
4132            DataType dt1,
4133            DataType dt2,
4134            DRegister rd,
4135            DRegister rm,
4136            int32_t fbits);
4137  void vcvt(
4138      DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
4139    vcvt(al, dt1, dt2, rd, rm, fbits);
4140  }
4141
4142  void vcvt(Condition cond,
4143            DataType dt1,
4144            DataType dt2,
4145            QRegister rd,
4146            QRegister rm,
4147            int32_t fbits);
4148  void vcvt(
4149      DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
4150    vcvt(al, dt1, dt2, rd, rm, fbits);
4151  }
4152
4153  void vcvt(Condition cond,
4154            DataType dt1,
4155            DataType dt2,
4156            SRegister rd,
4157            SRegister rm,
4158            int32_t fbits);
4159  void vcvt(
4160      DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
4161    vcvt(al, dt1, dt2, rd, rm, fbits);
4162  }
4163
4164  void vcvt(
4165      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
4166  void vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
4167    vcvt(al, dt1, dt2, rd, rm);
4168  }
4169
4170  void vcvt(
4171      Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm);
4172  void vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
4173    vcvt(al, dt1, dt2, rd, rm);
4174  }
4175
4176  void vcvt(
4177      Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm);
4178  void vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
4179    vcvt(al, dt1, dt2, rd, rm);
4180  }
4181
4182  void vcvt(
4183      Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm);
4184  void vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
4185    vcvt(al, dt1, dt2, rd, rm);
4186  }
4187
4188  void vcvt(
4189      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
4190  void vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
4191    vcvt(al, dt1, dt2, rd, rm);
4192  }
4193
4194  void vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
4195
4196  void vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
4197
4198  void vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
4199
4200  void vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
4201
4202  void vcvtb(
4203      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
4204  void vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
4205    vcvtb(al, dt1, dt2, rd, rm);
4206  }
4207
4208  void vcvtb(
4209      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
4210  void vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
4211    vcvtb(al, dt1, dt2, rd, rm);
4212  }
4213
4214  void vcvtb(
4215      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
4216  void vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
4217    vcvtb(al, dt1, dt2, rd, rm);
4218  }
4219
4220  void vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
4221
4222  void vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
4223
4224  void vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
4225
4226  void vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
4227
4228  void vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
4229
4230  void vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
4231
4232  void vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
4233
4234  void vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
4235
4236  void vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
4237
4238  void vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
4239
4240  void vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
4241
4242  void vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm);
4243
4244  void vcvtr(
4245      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
4246  void vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
4247    vcvtr(al, dt1, dt2, rd, rm);
4248  }
4249
4250  void vcvtr(
4251      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
4252  void vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
4253    vcvtr(al, dt1, dt2, rd, rm);
4254  }
4255
4256  void vcvtt(
4257      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
4258  void vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
4259    vcvtt(al, dt1, dt2, rd, rm);
4260  }
4261
4262  void vcvtt(
4263      Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
4264  void vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
4265    vcvtt(al, dt1, dt2, rd, rm);
4266  }
4267
4268  void vcvtt(
4269      Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm);
4270  void vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
4271    vcvtt(al, dt1, dt2, rd, rm);
4272  }
4273
4274  void vdiv(
4275      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4276  void vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4277    vdiv(al, dt, rd, rn, rm);
4278  }
4279
4280  void vdiv(
4281      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4282  void vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4283    vdiv(al, dt, rd, rn, rm);
4284  }
4285
4286  void vdup(Condition cond, DataType dt, QRegister rd, Register rt);
4287  void vdup(DataType dt, QRegister rd, Register rt) { vdup(al, dt, rd, rt); }
4288
4289  void vdup(Condition cond, DataType dt, DRegister rd, Register rt);
4290  void vdup(DataType dt, DRegister rd, Register rt) { vdup(al, dt, rd, rt); }
4291
4292  void vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm);
4293  void vdup(DataType dt, DRegister rd, DRegisterLane rm) {
4294    vdup(al, dt, rd, rm);
4295  }
4296
4297  void vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm);
4298  void vdup(DataType dt, QRegister rd, DRegisterLane rm) {
4299    vdup(al, dt, rd, rm);
4300  }
4301
4302  void veor(
4303      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4304  void veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4305    veor(al, dt, rd, rn, rm);
4306  }
4307  void veor(DRegister rd, DRegister rn, DRegister rm) {
4308    veor(al, kDataTypeValueNone, rd, rn, rm);
4309  }
4310  void veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
4311    veor(cond, kDataTypeValueNone, rd, rn, rm);
4312  }
4313
4314  void veor(
4315      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4316  void veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4317    veor(al, dt, rd, rn, rm);
4318  }
4319  void veor(QRegister rd, QRegister rn, QRegister rm) {
4320    veor(al, kDataTypeValueNone, rd, rn, rm);
4321  }
4322  void veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
4323    veor(cond, kDataTypeValueNone, rd, rn, rm);
4324  }
4325
4326  void vext(Condition cond,
4327            DataType dt,
4328            DRegister rd,
4329            DRegister rn,
4330            DRegister rm,
4331            const DOperand& operand);
4332  void vext(DataType dt,
4333            DRegister rd,
4334            DRegister rn,
4335            DRegister rm,
4336            const DOperand& operand) {
4337    vext(al, dt, rd, rn, rm, operand);
4338  }
4339
4340  void vext(Condition cond,
4341            DataType dt,
4342            QRegister rd,
4343            QRegister rn,
4344            QRegister rm,
4345            const QOperand& operand);
4346  void vext(DataType dt,
4347            QRegister rd,
4348            QRegister rn,
4349            QRegister rm,
4350            const QOperand& operand) {
4351    vext(al, dt, rd, rn, rm, operand);
4352  }
4353
4354  void vfma(
4355      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4356  void vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4357    vfma(al, dt, rd, rn, rm);
4358  }
4359
4360  void vfma(
4361      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4362  void vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4363    vfma(al, dt, rd, rn, rm);
4364  }
4365
4366  void vfma(
4367      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4368  void vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4369    vfma(al, dt, rd, rn, rm);
4370  }
4371
4372  void vfms(
4373      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4374  void vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4375    vfms(al, dt, rd, rn, rm);
4376  }
4377
4378  void vfms(
4379      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4380  void vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4381    vfms(al, dt, rd, rn, rm);
4382  }
4383
4384  void vfms(
4385      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4386  void vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4387    vfms(al, dt, rd, rn, rm);
4388  }
4389
4390  void vfnma(
4391      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4392  void vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4393    vfnma(al, dt, rd, rn, rm);
4394  }
4395
4396  void vfnma(
4397      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4398  void vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4399    vfnma(al, dt, rd, rn, rm);
4400  }
4401
4402  void vfnms(
4403      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4404  void vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4405    vfnms(al, dt, rd, rn, rm);
4406  }
4407
4408  void vfnms(
4409      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4410  void vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4411    vfnms(al, dt, rd, rn, rm);
4412  }
4413
4414  void vhadd(
4415      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4416  void vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4417    vhadd(al, dt, rd, rn, rm);
4418  }
4419
4420  void vhadd(
4421      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4422  void vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4423    vhadd(al, dt, rd, rn, rm);
4424  }
4425
4426  void vhsub(
4427      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4428  void vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4429    vhsub(al, dt, rd, rn, rm);
4430  }
4431
4432  void vhsub(
4433      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4434  void vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4435    vhsub(al, dt, rd, rn, rm);
4436  }
4437
4438  void vld1(Condition cond,
4439            DataType dt,
4440            const NeonRegisterList& nreglist,
4441            const AlignedMemOperand& operand);
4442  void vld1(DataType dt,
4443            const NeonRegisterList& nreglist,
4444            const AlignedMemOperand& operand) {
4445    vld1(al, dt, nreglist, operand);
4446  }
4447
4448  void vld2(Condition cond,
4449            DataType dt,
4450            const NeonRegisterList& nreglist,
4451            const AlignedMemOperand& operand);
4452  void vld2(DataType dt,
4453            const NeonRegisterList& nreglist,
4454            const AlignedMemOperand& operand) {
4455    vld2(al, dt, nreglist, operand);
4456  }
4457
4458  void vld3(Condition cond,
4459            DataType dt,
4460            const NeonRegisterList& nreglist,
4461            const AlignedMemOperand& operand);
4462  void vld3(DataType dt,
4463            const NeonRegisterList& nreglist,
4464            const AlignedMemOperand& operand) {
4465    vld3(al, dt, nreglist, operand);
4466  }
4467
4468  void vld3(Condition cond,
4469            DataType dt,
4470            const NeonRegisterList& nreglist,
4471            const MemOperand& operand);
4472  void vld3(DataType dt,
4473            const NeonRegisterList& nreglist,
4474            const MemOperand& operand) {
4475    vld3(al, dt, nreglist, operand);
4476  }
4477
4478  void vld4(Condition cond,
4479            DataType dt,
4480            const NeonRegisterList& nreglist,
4481            const AlignedMemOperand& operand);
4482  void vld4(DataType dt,
4483            const NeonRegisterList& nreglist,
4484            const AlignedMemOperand& operand) {
4485    vld4(al, dt, nreglist, operand);
4486  }
4487
4488  void vldm(Condition cond,
4489            DataType dt,
4490            Register rn,
4491            WriteBack write_back,
4492            DRegisterList dreglist);
4493  void vldm(DataType dt,
4494            Register rn,
4495            WriteBack write_back,
4496            DRegisterList dreglist) {
4497    vldm(al, dt, rn, write_back, dreglist);
4498  }
4499  void vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
4500    vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
4501  }
4502  void vldm(Condition cond,
4503            Register rn,
4504            WriteBack write_back,
4505            DRegisterList dreglist) {
4506    vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
4507  }
4508
4509  void vldm(Condition cond,
4510            DataType dt,
4511            Register rn,
4512            WriteBack write_back,
4513            SRegisterList sreglist);
4514  void vldm(DataType dt,
4515            Register rn,
4516            WriteBack write_back,
4517            SRegisterList sreglist) {
4518    vldm(al, dt, rn, write_back, sreglist);
4519  }
4520  void vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
4521    vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
4522  }
4523  void vldm(Condition cond,
4524            Register rn,
4525            WriteBack write_back,
4526            SRegisterList sreglist) {
4527    vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
4528  }
4529
4530  void vldmdb(Condition cond,
4531              DataType dt,
4532              Register rn,
4533              WriteBack write_back,
4534              DRegisterList dreglist);
4535  void vldmdb(DataType dt,
4536              Register rn,
4537              WriteBack write_back,
4538              DRegisterList dreglist) {
4539    vldmdb(al, dt, rn, write_back, dreglist);
4540  }
4541  void vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
4542    vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
4543  }
4544  void vldmdb(Condition cond,
4545              Register rn,
4546              WriteBack write_back,
4547              DRegisterList dreglist) {
4548    vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
4549  }
4550
4551  void vldmdb(Condition cond,
4552              DataType dt,
4553              Register rn,
4554              WriteBack write_back,
4555              SRegisterList sreglist);
4556  void vldmdb(DataType dt,
4557              Register rn,
4558              WriteBack write_back,
4559              SRegisterList sreglist) {
4560    vldmdb(al, dt, rn, write_back, sreglist);
4561  }
4562  void vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
4563    vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
4564  }
4565  void vldmdb(Condition cond,
4566              Register rn,
4567              WriteBack write_back,
4568              SRegisterList sreglist) {
4569    vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
4570  }
4571
4572  void vldmia(Condition cond,
4573              DataType dt,
4574              Register rn,
4575              WriteBack write_back,
4576              DRegisterList dreglist);
4577  void vldmia(DataType dt,
4578              Register rn,
4579              WriteBack write_back,
4580              DRegisterList dreglist) {
4581    vldmia(al, dt, rn, write_back, dreglist);
4582  }
4583  void vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
4584    vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
4585  }
4586  void vldmia(Condition cond,
4587              Register rn,
4588              WriteBack write_back,
4589              DRegisterList dreglist) {
4590    vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
4591  }
4592
4593  void vldmia(Condition cond,
4594              DataType dt,
4595              Register rn,
4596              WriteBack write_back,
4597              SRegisterList sreglist);
4598  void vldmia(DataType dt,
4599              Register rn,
4600              WriteBack write_back,
4601              SRegisterList sreglist) {
4602    vldmia(al, dt, rn, write_back, sreglist);
4603  }
4604  void vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
4605    vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
4606  }
4607  void vldmia(Condition cond,
4608              Register rn,
4609              WriteBack write_back,
4610              SRegisterList sreglist) {
4611    vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
4612  }
4613
4614  void vldr(Condition cond, DataType dt, DRegister rd, Label* label);
4615  void vldr(DataType dt, DRegister rd, Label* label) {
4616    vldr(al, dt, rd, label);
4617  }
4618  void vldr(DRegister rd, Label* label) { vldr(al, Untyped64, rd, label); }
4619  void vldr(Condition cond, DRegister rd, Label* label) {
4620    vldr(cond, Untyped64, rd, label);
4621  }
4622
4623  void vldr(Condition cond,
4624            DataType dt,
4625            DRegister rd,
4626            const MemOperand& operand);
4627  void vldr(DataType dt, DRegister rd, const MemOperand& operand) {
4628    vldr(al, dt, rd, operand);
4629  }
4630  void vldr(DRegister rd, const MemOperand& operand) {
4631    vldr(al, Untyped64, rd, operand);
4632  }
4633  void vldr(Condition cond, DRegister rd, const MemOperand& operand) {
4634    vldr(cond, Untyped64, rd, operand);
4635  }
4636
4637  void vldr(Condition cond, DataType dt, SRegister rd, Label* label);
4638  void vldr(DataType dt, SRegister rd, Label* label) {
4639    vldr(al, dt, rd, label);
4640  }
4641  void vldr(SRegister rd, Label* label) { vldr(al, Untyped32, rd, label); }
4642  void vldr(Condition cond, SRegister rd, Label* label) {
4643    vldr(cond, Untyped32, rd, label);
4644  }
4645
4646  void vldr(Condition cond,
4647            DataType dt,
4648            SRegister rd,
4649            const MemOperand& operand);
4650  void vldr(DataType dt, SRegister rd, const MemOperand& operand) {
4651    vldr(al, dt, rd, operand);
4652  }
4653  void vldr(SRegister rd, const MemOperand& operand) {
4654    vldr(al, Untyped32, rd, operand);
4655  }
4656  void vldr(Condition cond, SRegister rd, const MemOperand& operand) {
4657    vldr(cond, Untyped32, rd, operand);
4658  }
4659
4660  void vmax(
4661      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4662  void vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4663    vmax(al, dt, rd, rn, rm);
4664  }
4665
4666  void vmax(
4667      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4668  void vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4669    vmax(al, dt, rd, rn, rm);
4670  }
4671
4672  void vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
4673
4674  void vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
4675
4676  void vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
4677
4678  void vmin(
4679      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4680  void vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4681    vmin(al, dt, rd, rn, rm);
4682  }
4683
4684  void vmin(
4685      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4686  void vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4687    vmin(al, dt, rd, rn, rm);
4688  }
4689
4690  void vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm);
4691
4692  void vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm);
4693
4694  void vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm);
4695
4696  void vmla(Condition cond,
4697            DataType dt,
4698            DRegister rd,
4699            DRegister rn,
4700            DRegisterLane rm);
4701  void vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
4702    vmla(al, dt, rd, rn, rm);
4703  }
4704
4705  void vmla(Condition cond,
4706            DataType dt,
4707            QRegister rd,
4708            QRegister rn,
4709            DRegisterLane rm);
4710  void vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
4711    vmla(al, dt, rd, rn, rm);
4712  }
4713
4714  void vmla(
4715      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4716  void vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4717    vmla(al, dt, rd, rn, rm);
4718  }
4719
4720  void vmla(
4721      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4722  void vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4723    vmla(al, dt, rd, rn, rm);
4724  }
4725
4726  void vmla(
4727      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4728  void vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4729    vmla(al, dt, rd, rn, rm);
4730  }
4731
4732  void vmlal(Condition cond,
4733             DataType dt,
4734             QRegister rd,
4735             DRegister rn,
4736             DRegisterLane rm);
4737  void vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
4738    vmlal(al, dt, rd, rn, rm);
4739  }
4740
4741  void vmlal(
4742      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
4743  void vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
4744    vmlal(al, dt, rd, rn, rm);
4745  }
4746
4747  void vmls(Condition cond,
4748            DataType dt,
4749            DRegister rd,
4750            DRegister rn,
4751            DRegisterLane rm);
4752  void vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
4753    vmls(al, dt, rd, rn, rm);
4754  }
4755
4756  void vmls(Condition cond,
4757            DataType dt,
4758            QRegister rd,
4759            QRegister rn,
4760            DRegisterLane rm);
4761  void vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
4762    vmls(al, dt, rd, rn, rm);
4763  }
4764
4765  void vmls(
4766      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4767  void vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4768    vmls(al, dt, rd, rn, rm);
4769  }
4770
4771  void vmls(
4772      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4773  void vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4774    vmls(al, dt, rd, rn, rm);
4775  }
4776
4777  void vmls(
4778      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4779  void vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4780    vmls(al, dt, rd, rn, rm);
4781  }
4782
4783  void vmlsl(Condition cond,
4784             DataType dt,
4785             QRegister rd,
4786             DRegister rn,
4787             DRegisterLane rm);
4788  void vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
4789    vmlsl(al, dt, rd, rn, rm);
4790  }
4791
4792  void vmlsl(
4793      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
4794  void vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
4795    vmlsl(al, dt, rd, rn, rm);
4796  }
4797
4798  void vmov(Condition cond, Register rt, SRegister rn);
4799  void vmov(Register rt, SRegister rn) { vmov(al, rt, rn); }
4800
4801  void vmov(Condition cond, SRegister rn, Register rt);
4802  void vmov(SRegister rn, Register rt) { vmov(al, rn, rt); }
4803
4804  void vmov(Condition cond, Register rt, Register rt2, DRegister rm);
4805  void vmov(Register rt, Register rt2, DRegister rm) { vmov(al, rt, rt2, rm); }
4806
4807  void vmov(Condition cond, DRegister rm, Register rt, Register rt2);
4808  void vmov(DRegister rm, Register rt, Register rt2) { vmov(al, rm, rt, rt2); }
4809
4810  void vmov(
4811      Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1);
4812  void vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
4813    vmov(al, rt, rt2, rm, rm1);
4814  }
4815
4816  void vmov(
4817      Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2);
4818  void vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
4819    vmov(al, rm, rm1, rt, rt2);
4820  }
4821
4822  void vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt);
4823  void vmov(DataType dt, DRegisterLane rd, Register rt) {
4824    vmov(al, dt, rd, rt);
4825  }
4826  void vmov(DRegisterLane rd, Register rt) {
4827    vmov(al, kDataTypeValueNone, rd, rt);
4828  }
4829  void vmov(Condition cond, DRegisterLane rd, Register rt) {
4830    vmov(cond, kDataTypeValueNone, rd, rt);
4831  }
4832
4833  void vmov(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
4834  void vmov(DataType dt, DRegister rd, const DOperand& operand) {
4835    vmov(al, dt, rd, operand);
4836  }
4837
4838  void vmov(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
4839  void vmov(DataType dt, QRegister rd, const QOperand& operand) {
4840    vmov(al, dt, rd, operand);
4841  }
4842
4843  void vmov(Condition cond, DataType dt, SRegister rd, const SOperand& operand);
4844  void vmov(DataType dt, SRegister rd, const SOperand& operand) {
4845    vmov(al, dt, rd, operand);
4846  }
4847
4848  void vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn);
4849  void vmov(DataType dt, Register rt, DRegisterLane rn) {
4850    vmov(al, dt, rt, rn);
4851  }
4852  void vmov(Register rt, DRegisterLane rn) {
4853    vmov(al, kDataTypeValueNone, rt, rn);
4854  }
4855  void vmov(Condition cond, Register rt, DRegisterLane rn) {
4856    vmov(cond, kDataTypeValueNone, rt, rn);
4857  }
4858
4859  void vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm);
4860  void vmovl(DataType dt, QRegister rd, DRegister rm) { vmovl(al, dt, rd, rm); }
4861
4862  void vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
4863  void vmovn(DataType dt, DRegister rd, QRegister rm) { vmovn(al, dt, rd, rm); }
4864
4865  void vmrs(Condition cond, RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg);
4866  void vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) {
4867    vmrs(al, rt, spec_reg);
4868  }
4869
4870  void vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt);
4871  void vmsr(SpecialFPRegister spec_reg, Register rt) { vmsr(al, spec_reg, rt); }
4872
4873  void vmul(Condition cond,
4874            DataType dt,
4875            DRegister rd,
4876            DRegister rn,
4877            DRegister dm,
4878            unsigned index);
4879  void vmul(
4880      DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
4881    vmul(al, dt, rd, rn, dm, index);
4882  }
4883
4884  void vmul(Condition cond,
4885            DataType dt,
4886            QRegister rd,
4887            QRegister rn,
4888            DRegister dm,
4889            unsigned index);
4890  void vmul(
4891      DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
4892    vmul(al, dt, rd, rn, dm, index);
4893  }
4894
4895  void vmul(
4896      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4897  void vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4898    vmul(al, dt, rd, rn, rm);
4899  }
4900
4901  void vmul(
4902      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
4903  void vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
4904    vmul(al, dt, rd, rn, rm);
4905  }
4906
4907  void vmul(
4908      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4909  void vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4910    vmul(al, dt, rd, rn, rm);
4911  }
4912
4913  void vmull(Condition cond,
4914             DataType dt,
4915             QRegister rd,
4916             DRegister rn,
4917             DRegister dm,
4918             unsigned index);
4919  void vmull(
4920      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
4921    vmull(al, dt, rd, rn, dm, index);
4922  }
4923
4924  void vmull(
4925      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
4926  void vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
4927    vmull(al, dt, rd, rn, rm);
4928  }
4929
4930  void vmvn(Condition cond, DataType dt, DRegister rd, const DOperand& operand);
4931  void vmvn(DataType dt, DRegister rd, const DOperand& operand) {
4932    vmvn(al, dt, rd, operand);
4933  }
4934
4935  void vmvn(Condition cond, DataType dt, QRegister rd, const QOperand& operand);
4936  void vmvn(DataType dt, QRegister rd, const QOperand& operand) {
4937    vmvn(al, dt, rd, operand);
4938  }
4939
4940  void vneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
4941  void vneg(DataType dt, DRegister rd, DRegister rm) { vneg(al, dt, rd, rm); }
4942
4943  void vneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
4944  void vneg(DataType dt, QRegister rd, QRegister rm) { vneg(al, dt, rd, rm); }
4945
4946  void vneg(Condition cond, DataType dt, SRegister rd, SRegister rm);
4947  void vneg(DataType dt, SRegister rd, SRegister rm) { vneg(al, dt, rd, rm); }
4948
4949  void vnmla(
4950      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4951  void vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4952    vnmla(al, dt, rd, rn, rm);
4953  }
4954
4955  void vnmla(
4956      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4957  void vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4958    vnmla(al, dt, rd, rn, rm);
4959  }
4960
4961  void vnmls(
4962      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4963  void vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4964    vnmls(al, dt, rd, rn, rm);
4965  }
4966
4967  void vnmls(
4968      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4969  void vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4970    vnmls(al, dt, rd, rn, rm);
4971  }
4972
4973  void vnmul(
4974      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
4975  void vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
4976    vnmul(al, dt, rd, rn, rm);
4977  }
4978
4979  void vnmul(
4980      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
4981  void vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
4982    vnmul(al, dt, rd, rn, rm);
4983  }
4984
4985  void vorn(Condition cond,
4986            DataType dt,
4987            DRegister rd,
4988            DRegister rn,
4989            const DOperand& operand);
4990  void vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
4991    vorn(al, dt, rd, rn, operand);
4992  }
4993
4994  void vorn(Condition cond,
4995            DataType dt,
4996            QRegister rd,
4997            QRegister rn,
4998            const QOperand& operand);
4999  void vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5000    vorn(al, dt, rd, rn, operand);
5001  }
5002
5003  void vorr(Condition cond,
5004            DataType dt,
5005            DRegister rd,
5006            DRegister rn,
5007            const DOperand& operand);
5008  void vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5009    vorr(al, dt, rd, rn, operand);
5010  }
5011  void vorr(DRegister rd, DRegister rn, const DOperand& operand) {
5012    vorr(al, kDataTypeValueNone, rd, rn, operand);
5013  }
5014  void vorr(Condition cond,
5015            DRegister rd,
5016            DRegister rn,
5017            const DOperand& operand) {
5018    vorr(cond, kDataTypeValueNone, rd, rn, operand);
5019  }
5020
5021  void vorr(Condition cond,
5022            DataType dt,
5023            QRegister rd,
5024            QRegister rn,
5025            const QOperand& operand);
5026  void vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5027    vorr(al, dt, rd, rn, operand);
5028  }
5029  void vorr(QRegister rd, QRegister rn, const QOperand& operand) {
5030    vorr(al, kDataTypeValueNone, rd, rn, operand);
5031  }
5032  void vorr(Condition cond,
5033            QRegister rd,
5034            QRegister rn,
5035            const QOperand& operand) {
5036    vorr(cond, kDataTypeValueNone, rd, rn, operand);
5037  }
5038
5039  void vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm);
5040  void vpadal(DataType dt, DRegister rd, DRegister rm) {
5041    vpadal(al, dt, rd, rm);
5042  }
5043
5044  void vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm);
5045  void vpadal(DataType dt, QRegister rd, QRegister rm) {
5046    vpadal(al, dt, rd, rm);
5047  }
5048
5049  void vpadd(
5050      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5051  void vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5052    vpadd(al, dt, rd, rn, rm);
5053  }
5054
5055  void vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm);
5056  void vpaddl(DataType dt, DRegister rd, DRegister rm) {
5057    vpaddl(al, dt, rd, rm);
5058  }
5059
5060  void vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm);
5061  void vpaddl(DataType dt, QRegister rd, QRegister rm) {
5062    vpaddl(al, dt, rd, rm);
5063  }
5064
5065  void vpmax(
5066      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5067  void vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5068    vpmax(al, dt, rd, rn, rm);
5069  }
5070
5071  void vpmin(
5072      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5073  void vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5074    vpmin(al, dt, rd, rn, rm);
5075  }
5076
5077  void vpop(Condition cond, DataType dt, DRegisterList dreglist);
5078  void vpop(DataType dt, DRegisterList dreglist) { vpop(al, dt, dreglist); }
5079  void vpop(DRegisterList dreglist) { vpop(al, kDataTypeValueNone, dreglist); }
5080  void vpop(Condition cond, DRegisterList dreglist) {
5081    vpop(cond, kDataTypeValueNone, dreglist);
5082  }
5083
5084  void vpop(Condition cond, DataType dt, SRegisterList sreglist);
5085  void vpop(DataType dt, SRegisterList sreglist) { vpop(al, dt, sreglist); }
5086  void vpop(SRegisterList sreglist) { vpop(al, kDataTypeValueNone, sreglist); }
5087  void vpop(Condition cond, SRegisterList sreglist) {
5088    vpop(cond, kDataTypeValueNone, sreglist);
5089  }
5090
5091  void vpush(Condition cond, DataType dt, DRegisterList dreglist);
5092  void vpush(DataType dt, DRegisterList dreglist) { vpush(al, dt, dreglist); }
5093  void vpush(DRegisterList dreglist) {
5094    vpush(al, kDataTypeValueNone, dreglist);
5095  }
5096  void vpush(Condition cond, DRegisterList dreglist) {
5097    vpush(cond, kDataTypeValueNone, dreglist);
5098  }
5099
5100  void vpush(Condition cond, DataType dt, SRegisterList sreglist);
5101  void vpush(DataType dt, SRegisterList sreglist) { vpush(al, dt, sreglist); }
5102  void vpush(SRegisterList sreglist) {
5103    vpush(al, kDataTypeValueNone, sreglist);
5104  }
5105  void vpush(Condition cond, SRegisterList sreglist) {
5106    vpush(cond, kDataTypeValueNone, sreglist);
5107  }
5108
5109  void vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
5110  void vqabs(DataType dt, DRegister rd, DRegister rm) { vqabs(al, dt, rd, rm); }
5111
5112  void vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm);
5113  void vqabs(DataType dt, QRegister rd, QRegister rm) { vqabs(al, dt, rd, rm); }
5114
5115  void vqadd(
5116      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5117  void vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5118    vqadd(al, dt, rd, rn, rm);
5119  }
5120
5121  void vqadd(
5122      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
5123  void vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5124    vqadd(al, dt, rd, rn, rm);
5125  }
5126
5127  void vqdmlal(
5128      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
5129  void vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5130    vqdmlal(al, dt, rd, rn, rm);
5131  }
5132
5133  void vqdmlal(Condition cond,
5134               DataType dt,
5135               QRegister rd,
5136               DRegister rn,
5137               DRegister dm,
5138               unsigned index);
5139  void vqdmlal(
5140      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
5141    vqdmlal(al, dt, rd, rn, dm, index);
5142  }
5143
5144  void vqdmlsl(
5145      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
5146  void vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5147    vqdmlsl(al, dt, rd, rn, rm);
5148  }
5149
5150  void vqdmlsl(Condition cond,
5151               DataType dt,
5152               QRegister rd,
5153               DRegister rn,
5154               DRegister dm,
5155               unsigned index);
5156  void vqdmlsl(
5157      DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
5158    vqdmlsl(al, dt, rd, rn, dm, index);
5159  }
5160
5161  void vqdmulh(
5162      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5163  void vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5164    vqdmulh(al, dt, rd, rn, rm);
5165  }
5166
5167  void vqdmulh(
5168      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
5169  void vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5170    vqdmulh(al, dt, rd, rn, rm);
5171  }
5172
5173  void vqdmulh(Condition cond,
5174               DataType dt,
5175               DRegister rd,
5176               DRegister rn,
5177               DRegisterLane rm);
5178  void vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
5179    vqdmulh(al, dt, rd, rn, rm);
5180  }
5181
5182  void vqdmulh(Condition cond,
5183               DataType dt,
5184               QRegister rd,
5185               QRegister rn,
5186               DRegisterLane rm);
5187  void vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
5188    vqdmulh(al, dt, rd, rn, rm);
5189  }
5190
5191  void vqdmull(
5192      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
5193  void vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5194    vqdmull(al, dt, rd, rn, rm);
5195  }
5196
5197  void vqdmull(Condition cond,
5198               DataType dt,
5199               QRegister rd,
5200               DRegister rn,
5201               DRegisterLane rm);
5202  void vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
5203    vqdmull(al, dt, rd, rn, rm);
5204  }
5205
5206  void vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
5207  void vqmovn(DataType dt, DRegister rd, QRegister rm) {
5208    vqmovn(al, dt, rd, rm);
5209  }
5210
5211  void vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm);
5212  void vqmovun(DataType dt, DRegister rd, QRegister rm) {
5213    vqmovun(al, dt, rd, rm);
5214  }
5215
5216  void vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm);
5217  void vqneg(DataType dt, DRegister rd, DRegister rm) { vqneg(al, dt, rd, rm); }
5218
5219  void vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm);
5220  void vqneg(DataType dt, QRegister rd, QRegister rm) { vqneg(al, dt, rd, rm); }
5221
5222  void vqrdmulh(
5223      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5224  void vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5225    vqrdmulh(al, dt, rd, rn, rm);
5226  }
5227
5228  void vqrdmulh(
5229      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
5230  void vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5231    vqrdmulh(al, dt, rd, rn, rm);
5232  }
5233
5234  void vqrdmulh(Condition cond,
5235                DataType dt,
5236                DRegister rd,
5237                DRegister rn,
5238                DRegisterLane rm);
5239  void vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
5240    vqrdmulh(al, dt, rd, rn, rm);
5241  }
5242
5243  void vqrdmulh(Condition cond,
5244                DataType dt,
5245                QRegister rd,
5246                QRegister rn,
5247                DRegisterLane rm);
5248  void vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
5249    vqrdmulh(al, dt, rd, rn, rm);
5250  }
5251
5252  void vqrshl(
5253      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
5254  void vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
5255    vqrshl(al, dt, rd, rm, rn);
5256  }
5257
5258  void vqrshl(
5259      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
5260  void vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
5261    vqrshl(al, dt, rd, rm, rn);
5262  }
5263
5264  void vqrshrn(Condition cond,
5265               DataType dt,
5266               DRegister rd,
5267               QRegister rm,
5268               const QOperand& operand);
5269  void vqrshrn(DataType dt,
5270               DRegister rd,
5271               QRegister rm,
5272               const QOperand& operand) {
5273    vqrshrn(al, dt, rd, rm, operand);
5274  }
5275
5276  void vqrshrun(Condition cond,
5277                DataType dt,
5278                DRegister rd,
5279                QRegister rm,
5280                const QOperand& operand);
5281  void vqrshrun(DataType dt,
5282                DRegister rd,
5283                QRegister rm,
5284                const QOperand& operand) {
5285    vqrshrun(al, dt, rd, rm, operand);
5286  }
5287
5288  void vqshl(Condition cond,
5289             DataType dt,
5290             DRegister rd,
5291             DRegister rm,
5292             const DOperand& operand);
5293  void vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5294    vqshl(al, dt, rd, rm, operand);
5295  }
5296
5297  void vqshl(Condition cond,
5298             DataType dt,
5299             QRegister rd,
5300             QRegister rm,
5301             const QOperand& operand);
5302  void vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5303    vqshl(al, dt, rd, rm, operand);
5304  }
5305
5306  void vqshlu(Condition cond,
5307              DataType dt,
5308              DRegister rd,
5309              DRegister rm,
5310              const DOperand& operand);
5311  void vqshlu(DataType dt,
5312              DRegister rd,
5313              DRegister rm,
5314              const DOperand& operand) {
5315    vqshlu(al, dt, rd, rm, operand);
5316  }
5317
5318  void vqshlu(Condition cond,
5319              DataType dt,
5320              QRegister rd,
5321              QRegister rm,
5322              const QOperand& operand);
5323  void vqshlu(DataType dt,
5324              QRegister rd,
5325              QRegister rm,
5326              const QOperand& operand) {
5327    vqshlu(al, dt, rd, rm, operand);
5328  }
5329
5330  void vqshrn(Condition cond,
5331              DataType dt,
5332              DRegister rd,
5333              QRegister rm,
5334              const QOperand& operand);
5335  void vqshrn(DataType dt,
5336              DRegister rd,
5337              QRegister rm,
5338              const QOperand& operand) {
5339    vqshrn(al, dt, rd, rm, operand);
5340  }
5341
5342  void vqshrun(Condition cond,
5343               DataType dt,
5344               DRegister rd,
5345               QRegister rm,
5346               const QOperand& operand);
5347  void vqshrun(DataType dt,
5348               DRegister rd,
5349               QRegister rm,
5350               const QOperand& operand) {
5351    vqshrun(al, dt, rd, rm, operand);
5352  }
5353
5354  void vqsub(
5355      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5356  void vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5357    vqsub(al, dt, rd, rn, rm);
5358  }
5359
5360  void vqsub(
5361      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
5362  void vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5363    vqsub(al, dt, rd, rn, rm);
5364  }
5365
5366  void vraddhn(
5367      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
5368  void vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5369    vraddhn(al, dt, rd, rn, rm);
5370  }
5371
5372  void vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm);
5373  void vrecpe(DataType dt, DRegister rd, DRegister rm) {
5374    vrecpe(al, dt, rd, rm);
5375  }
5376
5377  void vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm);
5378  void vrecpe(DataType dt, QRegister rd, QRegister rm) {
5379    vrecpe(al, dt, rd, rm);
5380  }
5381
5382  void vrecps(
5383      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5384  void vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5385    vrecps(al, dt, rd, rn, rm);
5386  }
5387
5388  void vrecps(
5389      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
5390  void vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5391    vrecps(al, dt, rd, rn, rm);
5392  }
5393
5394  void vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm);
5395  void vrev16(DataType dt, DRegister rd, DRegister rm) {
5396    vrev16(al, dt, rd, rm);
5397  }
5398
5399  void vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm);
5400  void vrev16(DataType dt, QRegister rd, QRegister rm) {
5401    vrev16(al, dt, rd, rm);
5402  }
5403
5404  void vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm);
5405  void vrev32(DataType dt, DRegister rd, DRegister rm) {
5406    vrev32(al, dt, rd, rm);
5407  }
5408
5409  void vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm);
5410  void vrev32(DataType dt, QRegister rd, QRegister rm) {
5411    vrev32(al, dt, rd, rm);
5412  }
5413
5414  void vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm);
5415  void vrev64(DataType dt, DRegister rd, DRegister rm) {
5416    vrev64(al, dt, rd, rm);
5417  }
5418
5419  void vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm);
5420  void vrev64(DataType dt, QRegister rd, QRegister rm) {
5421    vrev64(al, dt, rd, rm);
5422  }
5423
5424  void vrhadd(
5425      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5426  void vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5427    vrhadd(al, dt, rd, rn, rm);
5428  }
5429
5430  void vrhadd(
5431      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
5432  void vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5433    vrhadd(al, dt, rd, rn, rm);
5434  }
5435
5436  void vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
5437
5438  void vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
5439
5440  void vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
5441
5442  void vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
5443
5444  void vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
5445
5446  void vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
5447
5448  void vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
5449
5450  void vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
5451
5452  void vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
5453
5454  void vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm);
5455
5456  void vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
5457
5458  void vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm);
5459
5460  void vrintr(
5461      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
5462  void vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
5463    vrintr(al, dt1, dt2, rd, rm);
5464  }
5465
5466  void vrintr(
5467      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
5468  void vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
5469    vrintr(al, dt1, dt2, rd, rm);
5470  }
5471
5472  void vrintx(
5473      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
5474  void vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
5475    vrintx(al, dt1, dt2, rd, rm);
5476  }
5477
5478  void vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
5479
5480  void vrintx(
5481      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
5482  void vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
5483    vrintx(al, dt1, dt2, rd, rm);
5484  }
5485
5486  void vrintz(
5487      Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm);
5488  void vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
5489    vrintz(al, dt1, dt2, rd, rm);
5490  }
5491
5492  void vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm);
5493
5494  void vrintz(
5495      Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm);
5496  void vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
5497    vrintz(al, dt1, dt2, rd, rm);
5498  }
5499
5500  void vrshl(
5501      Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn);
5502  void vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
5503    vrshl(al, dt, rd, rm, rn);
5504  }
5505
5506  void vrshl(
5507      Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn);
5508  void vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
5509    vrshl(al, dt, rd, rm, rn);
5510  }
5511
5512  void vrshr(Condition cond,
5513             DataType dt,
5514             DRegister rd,
5515             DRegister rm,
5516             const DOperand& operand);
5517  void vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5518    vrshr(al, dt, rd, rm, operand);
5519  }
5520
5521  void vrshr(Condition cond,
5522             DataType dt,
5523             QRegister rd,
5524             QRegister rm,
5525             const QOperand& operand);
5526  void vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5527    vrshr(al, dt, rd, rm, operand);
5528  }
5529
5530  void vrshrn(Condition cond,
5531              DataType dt,
5532              DRegister rd,
5533              QRegister rm,
5534              const QOperand& operand);
5535  void vrshrn(DataType dt,
5536              DRegister rd,
5537              QRegister rm,
5538              const QOperand& operand) {
5539    vrshrn(al, dt, rd, rm, operand);
5540  }
5541
5542  void vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm);
5543  void vrsqrte(DataType dt, DRegister rd, DRegister rm) {
5544    vrsqrte(al, dt, rd, rm);
5545  }
5546
5547  void vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm);
5548  void vrsqrte(DataType dt, QRegister rd, QRegister rm) {
5549    vrsqrte(al, dt, rd, rm);
5550  }
5551
5552  void vrsqrts(
5553      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5554  void vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5555    vrsqrts(al, dt, rd, rn, rm);
5556  }
5557
5558  void vrsqrts(
5559      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
5560  void vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5561    vrsqrts(al, dt, rd, rn, rm);
5562  }
5563
5564  void vrsra(Condition cond,
5565             DataType dt,
5566             DRegister rd,
5567             DRegister rm,
5568             const DOperand& operand);
5569  void vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5570    vrsra(al, dt, rd, rm, operand);
5571  }
5572
5573  void vrsra(Condition cond,
5574             DataType dt,
5575             QRegister rd,
5576             QRegister rm,
5577             const QOperand& operand);
5578  void vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5579    vrsra(al, dt, rd, rm, operand);
5580  }
5581
5582  void vrsubhn(
5583      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
5584  void vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5585    vrsubhn(al, dt, rd, rn, rm);
5586  }
5587
5588  void vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm);
5589
5590  void vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm);
5591
5592  void vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm);
5593
5594  void vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm);
5595
5596  void vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm);
5597
5598  void vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm);
5599
5600  void vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm);
5601
5602  void vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm);
5603
5604  void vshl(Condition cond,
5605            DataType dt,
5606            DRegister rd,
5607            DRegister rm,
5608            const DOperand& operand);
5609  void vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5610    vshl(al, dt, rd, rm, operand);
5611  }
5612
5613  void vshl(Condition cond,
5614            DataType dt,
5615            QRegister rd,
5616            QRegister rm,
5617            const QOperand& operand);
5618  void vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5619    vshl(al, dt, rd, rm, operand);
5620  }
5621
5622  void vshll(Condition cond,
5623             DataType dt,
5624             QRegister rd,
5625             DRegister rm,
5626             const DOperand& operand);
5627  void vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
5628    vshll(al, dt, rd, rm, operand);
5629  }
5630
5631  void vshr(Condition cond,
5632            DataType dt,
5633            DRegister rd,
5634            DRegister rm,
5635            const DOperand& operand);
5636  void vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5637    vshr(al, dt, rd, rm, operand);
5638  }
5639
5640  void vshr(Condition cond,
5641            DataType dt,
5642            QRegister rd,
5643            QRegister rm,
5644            const QOperand& operand);
5645  void vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5646    vshr(al, dt, rd, rm, operand);
5647  }
5648
5649  void vshrn(Condition cond,
5650             DataType dt,
5651             DRegister rd,
5652             QRegister rm,
5653             const QOperand& operand);
5654  void vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
5655    vshrn(al, dt, rd, rm, operand);
5656  }
5657
5658  void vsli(Condition cond,
5659            DataType dt,
5660            DRegister rd,
5661            DRegister rm,
5662            const DOperand& operand);
5663  void vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5664    vsli(al, dt, rd, rm, operand);
5665  }
5666
5667  void vsli(Condition cond,
5668            DataType dt,
5669            QRegister rd,
5670            QRegister rm,
5671            const QOperand& operand);
5672  void vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5673    vsli(al, dt, rd, rm, operand);
5674  }
5675
5676  void vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm);
5677  void vsqrt(DataType dt, SRegister rd, SRegister rm) { vsqrt(al, dt, rd, rm); }
5678
5679  void vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm);
5680  void vsqrt(DataType dt, DRegister rd, DRegister rm) { vsqrt(al, dt, rd, rm); }
5681
5682  void vsra(Condition cond,
5683            DataType dt,
5684            DRegister rd,
5685            DRegister rm,
5686            const DOperand& operand);
5687  void vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5688    vsra(al, dt, rd, rm, operand);
5689  }
5690
5691  void vsra(Condition cond,
5692            DataType dt,
5693            QRegister rd,
5694            QRegister rm,
5695            const QOperand& operand);
5696  void vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5697    vsra(al, dt, rd, rm, operand);
5698  }
5699
5700  void vsri(Condition cond,
5701            DataType dt,
5702            DRegister rd,
5703            DRegister rm,
5704            const DOperand& operand);
5705  void vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5706    vsri(al, dt, rd, rm, operand);
5707  }
5708
5709  void vsri(Condition cond,
5710            DataType dt,
5711            QRegister rd,
5712            QRegister rm,
5713            const QOperand& operand);
5714  void vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5715    vsri(al, dt, rd, rm, operand);
5716  }
5717
5718  void vst1(Condition cond,
5719            DataType dt,
5720            const NeonRegisterList& nreglist,
5721            const AlignedMemOperand& operand);
5722  void vst1(DataType dt,
5723            const NeonRegisterList& nreglist,
5724            const AlignedMemOperand& operand) {
5725    vst1(al, dt, nreglist, operand);
5726  }
5727
5728  void vst2(Condition cond,
5729            DataType dt,
5730            const NeonRegisterList& nreglist,
5731            const AlignedMemOperand& operand);
5732  void vst2(DataType dt,
5733            const NeonRegisterList& nreglist,
5734            const AlignedMemOperand& operand) {
5735    vst2(al, dt, nreglist, operand);
5736  }
5737
5738  void vst3(Condition cond,
5739            DataType dt,
5740            const NeonRegisterList& nreglist,
5741            const AlignedMemOperand& operand);
5742  void vst3(DataType dt,
5743            const NeonRegisterList& nreglist,
5744            const AlignedMemOperand& operand) {
5745    vst3(al, dt, nreglist, operand);
5746  }
5747
5748  void vst3(Condition cond,
5749            DataType dt,
5750            const NeonRegisterList& nreglist,
5751            const MemOperand& operand);
5752  void vst3(DataType dt,
5753            const NeonRegisterList& nreglist,
5754            const MemOperand& operand) {
5755    vst3(al, dt, nreglist, operand);
5756  }
5757
5758  void vst4(Condition cond,
5759            DataType dt,
5760            const NeonRegisterList& nreglist,
5761            const AlignedMemOperand& operand);
5762  void vst4(DataType dt,
5763            const NeonRegisterList& nreglist,
5764            const AlignedMemOperand& operand) {
5765    vst4(al, dt, nreglist, operand);
5766  }
5767
5768  void vstm(Condition cond,
5769            DataType dt,
5770            Register rn,
5771            WriteBack write_back,
5772            DRegisterList dreglist);
5773  void vstm(DataType dt,
5774            Register rn,
5775            WriteBack write_back,
5776            DRegisterList dreglist) {
5777    vstm(al, dt, rn, write_back, dreglist);
5778  }
5779  void vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
5780    vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
5781  }
5782  void vstm(Condition cond,
5783            Register rn,
5784            WriteBack write_back,
5785            DRegisterList dreglist) {
5786    vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
5787  }
5788
5789  void vstm(Condition cond,
5790            DataType dt,
5791            Register rn,
5792            WriteBack write_back,
5793            SRegisterList sreglist);
5794  void vstm(DataType dt,
5795            Register rn,
5796            WriteBack write_back,
5797            SRegisterList sreglist) {
5798    vstm(al, dt, rn, write_back, sreglist);
5799  }
5800  void vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
5801    vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
5802  }
5803  void vstm(Condition cond,
5804            Register rn,
5805            WriteBack write_back,
5806            SRegisterList sreglist) {
5807    vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
5808  }
5809
5810  void vstmdb(Condition cond,
5811              DataType dt,
5812              Register rn,
5813              WriteBack write_back,
5814              DRegisterList dreglist);
5815  void vstmdb(DataType dt,
5816              Register rn,
5817              WriteBack write_back,
5818              DRegisterList dreglist) {
5819    vstmdb(al, dt, rn, write_back, dreglist);
5820  }
5821  void vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
5822    vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
5823  }
5824  void vstmdb(Condition cond,
5825              Register rn,
5826              WriteBack write_back,
5827              DRegisterList dreglist) {
5828    vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
5829  }
5830
5831  void vstmdb(Condition cond,
5832              DataType dt,
5833              Register rn,
5834              WriteBack write_back,
5835              SRegisterList sreglist);
5836  void vstmdb(DataType dt,
5837              Register rn,
5838              WriteBack write_back,
5839              SRegisterList sreglist) {
5840    vstmdb(al, dt, rn, write_back, sreglist);
5841  }
5842  void vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
5843    vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
5844  }
5845  void vstmdb(Condition cond,
5846              Register rn,
5847              WriteBack write_back,
5848              SRegisterList sreglist) {
5849    vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
5850  }
5851
5852  void vstmia(Condition cond,
5853              DataType dt,
5854              Register rn,
5855              WriteBack write_back,
5856              DRegisterList dreglist);
5857  void vstmia(DataType dt,
5858              Register rn,
5859              WriteBack write_back,
5860              DRegisterList dreglist) {
5861    vstmia(al, dt, rn, write_back, dreglist);
5862  }
5863  void vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
5864    vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
5865  }
5866  void vstmia(Condition cond,
5867              Register rn,
5868              WriteBack write_back,
5869              DRegisterList dreglist) {
5870    vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
5871  }
5872
5873  void vstmia(Condition cond,
5874              DataType dt,
5875              Register rn,
5876              WriteBack write_back,
5877              SRegisterList sreglist);
5878  void vstmia(DataType dt,
5879              Register rn,
5880              WriteBack write_back,
5881              SRegisterList sreglist) {
5882    vstmia(al, dt, rn, write_back, sreglist);
5883  }
5884  void vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
5885    vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
5886  }
5887  void vstmia(Condition cond,
5888              Register rn,
5889              WriteBack write_back,
5890              SRegisterList sreglist) {
5891    vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
5892  }
5893
5894  void vstr(Condition cond,
5895            DataType dt,
5896            DRegister rd,
5897            const MemOperand& operand);
5898  void vstr(DataType dt, DRegister rd, const MemOperand& operand) {
5899    vstr(al, dt, rd, operand);
5900  }
5901  void vstr(DRegister rd, const MemOperand& operand) {
5902    vstr(al, Untyped64, rd, operand);
5903  }
5904  void vstr(Condition cond, DRegister rd, const MemOperand& operand) {
5905    vstr(cond, Untyped64, rd, operand);
5906  }
5907
5908  void vstr(Condition cond,
5909            DataType dt,
5910            SRegister rd,
5911            const MemOperand& operand);
5912  void vstr(DataType dt, SRegister rd, const MemOperand& operand) {
5913    vstr(al, dt, rd, operand);
5914  }
5915  void vstr(SRegister rd, const MemOperand& operand) {
5916    vstr(al, Untyped32, rd, operand);
5917  }
5918  void vstr(Condition cond, SRegister rd, const MemOperand& operand) {
5919    vstr(cond, Untyped32, rd, operand);
5920  }
5921
5922  void vsub(
5923      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
5924  void vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5925    vsub(al, dt, rd, rn, rm);
5926  }
5927
5928  void vsub(
5929      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
5930  void vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5931    vsub(al, dt, rd, rn, rm);
5932  }
5933
5934  void vsub(
5935      Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm);
5936  void vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5937    vsub(al, dt, rd, rn, rm);
5938  }
5939
5940  void vsubhn(
5941      Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
5942  void vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5943    vsubhn(al, dt, rd, rn, rm);
5944  }
5945
5946  void vsubl(
5947      Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
5948  void vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5949    vsubl(al, dt, rd, rn, rm);
5950  }
5951
5952  void vsubw(
5953      Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
5954  void vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5955    vsubw(al, dt, rd, rn, rm);
5956  }
5957
5958  void vswp(Condition cond, DataType dt, DRegister rd, DRegister rm);
5959  void vswp(DataType dt, DRegister rd, DRegister rm) { vswp(al, dt, rd, rm); }
5960  void vswp(DRegister rd, DRegister rm) {
5961    vswp(al, kDataTypeValueNone, rd, rm);
5962  }
5963  void vswp(Condition cond, DRegister rd, DRegister rm) {
5964    vswp(cond, kDataTypeValueNone, rd, rm);
5965  }
5966
5967  void vswp(Condition cond, DataType dt, QRegister rd, QRegister rm);
5968  void vswp(DataType dt, QRegister rd, QRegister rm) { vswp(al, dt, rd, rm); }
5969  void vswp(QRegister rd, QRegister rm) {
5970    vswp(al, kDataTypeValueNone, rd, rm);
5971  }
5972  void vswp(Condition cond, QRegister rd, QRegister rm) {
5973    vswp(cond, kDataTypeValueNone, rd, rm);
5974  }
5975
5976  void vtbl(Condition cond,
5977            DataType dt,
5978            DRegister rd,
5979            const NeonRegisterList& nreglist,
5980            DRegister rm);
5981  void vtbl(DataType dt,
5982            DRegister rd,
5983            const NeonRegisterList& nreglist,
5984            DRegister rm) {
5985    vtbl(al, dt, rd, nreglist, rm);
5986  }
5987
5988  void vtbx(Condition cond,
5989            DataType dt,
5990            DRegister rd,
5991            const NeonRegisterList& nreglist,
5992            DRegister rm);
5993  void vtbx(DataType dt,
5994            DRegister rd,
5995            const NeonRegisterList& nreglist,
5996            DRegister rm) {
5997    vtbx(al, dt, rd, nreglist, rm);
5998  }
5999
6000  void vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm);
6001  void vtrn(DataType dt, DRegister rd, DRegister rm) { vtrn(al, dt, rd, rm); }
6002
6003  void vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm);
6004  void vtrn(DataType dt, QRegister rd, QRegister rm) { vtrn(al, dt, rd, rm); }
6005
6006  void vtst(
6007      Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
6008  void vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6009    vtst(al, dt, rd, rn, rm);
6010  }
6011
6012  void vtst(
6013      Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm);
6014  void vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6015    vtst(al, dt, rd, rn, rm);
6016  }
6017
6018  void vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm);
6019  void vuzp(DataType dt, DRegister rd, DRegister rm) { vuzp(al, dt, rd, rm); }
6020
6021  void vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm);
6022  void vuzp(DataType dt, QRegister rd, QRegister rm) { vuzp(al, dt, rd, rm); }
6023
6024  void vzip(Condition cond, DataType dt, DRegister rd, DRegister rm);
6025  void vzip(DataType dt, DRegister rd, DRegister rm) { vzip(al, dt, rd, rm); }
6026
6027  void vzip(Condition cond, DataType dt, QRegister rd, QRegister rm);
6028  void vzip(DataType dt, QRegister rd, QRegister rm) { vzip(al, dt, rd, rm); }
6029
6030  void yield(Condition cond, EncodingSize size);
6031  void yield() { yield(al, Best); }
6032  void yield(Condition cond) { yield(cond, Best); }
6033  void yield(EncodingSize size) { yield(al, size); }
6034  // End of generated code.
6035  virtual void UnimplementedDelegate(InstructionType /*type*/) {
6036    VIXL_ABORT_WITH_MSG("Unimplemented delegate\n");
6037  }
6038  virtual bool AllowUnpredictable() {
6039    VIXL_ABORT_WITH_MSG("Unpredictable instruction\n");
6040    return false;
6041  }
6042  virtual bool AllowStronglyDiscouraged() {
6043    VIXL_ABORT_WITH_MSG(
6044        "ARM strongly recommends to not use this instruction\n");
6045    return false;
6046  }
6047};
6048
6049}  // namespace aarch32
6050}  // namespace vixl
6051
6052#endif  // VIXL_AARCH32_ASSEMBLER_AARCH32_H_
6053