1// Copyright 2016, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright notice, 10// this list of conditions and the following disclaimer in the documentation 11// and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may be 13// used to endorse or promote products derived from this software without 14// specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 28// ----------------------------------------------------------------------------- 29// This file is auto generated from the 30// test/aarch32/config/template-simulator-aarch32.cc.in template file using 31// tools/generate_tests.py. 32// 33// PLEASE DO NOT EDIT. 34// ----------------------------------------------------------------------------- 35 36 37#include "test-runner.h" 38 39#include "test-utils.h" 40#include "test-utils-aarch32.h" 41 42#include "aarch32/assembler-aarch32.h" 43#include "aarch32/macro-assembler-aarch32.h" 44#include "aarch32/disasm-aarch32.h" 45 46#define __ masm. 47#define BUF_SIZE (4096) 48 49#ifdef VIXL_INCLUDE_SIMULATOR_AARCH32 50// Run tests with the simulator. 51 52#define SETUP() MacroAssembler masm(BUF_SIZE) 53 54#define START() masm.GetBuffer()->Reset() 55 56#define END() \ 57 __ Hlt(0); \ 58 __ FinalizeCode(); 59 60// TODO: Run the tests in the simulator. 61#define RUN() 62 63#define TEARDOWN() 64 65#else // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32. 66 67#define SETUP() \ 68 MacroAssembler masm(BUF_SIZE); \ 69 UseScratchRegisterScope harness_scratch(&masm); \ 70 harness_scratch.ExcludeAll(); 71 72#define START() \ 73 masm.GetBuffer()->Reset(); \ 74 __ Push(r4); \ 75 __ Push(r5); \ 76 __ Push(r6); \ 77 __ Push(r7); \ 78 __ Push(r8); \ 79 __ Push(r9); \ 80 __ Push(r10); \ 81 __ Push(r11); \ 82 __ Push(lr); \ 83 harness_scratch.Include(ip); 84 85#define END() \ 86 harness_scratch.Exclude(ip); \ 87 __ Pop(lr); \ 88 __ Pop(r11); \ 89 __ Pop(r10); \ 90 __ Pop(r9); \ 91 __ Pop(r8); \ 92 __ Pop(r7); \ 93 __ Pop(r6); \ 94 __ Pop(r5); \ 95 __ Pop(r4); \ 96 __ Bx(lr); \ 97 __ FinalizeCode(); 98 99#define RUN() \ 100 { \ 101 int pcs_offset = masm.IsUsingT32() ? 1 : 0; \ 102 masm.GetBuffer()->SetExecutable(); \ 103 ExecuteMemory(masm.GetBuffer()->GetStartAddress<byte*>(), \ 104 masm.GetSizeOfCodeGenerated(), \ 105 pcs_offset); \ 106 masm.GetBuffer()->SetWritable(); \ 107 } 108 109#define TEARDOWN() harness_scratch.Close(); 110 111#endif // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32 112 113namespace vixl { 114namespace aarch32 { 115 116// List of instruction encodings: 117#define FOREACH_INSTRUCTION(M) \ 118 M(Cmn) \ 119 M(Cmp) \ 120 M(Mov) \ 121 M(Movs) \ 122 M(Mvn) \ 123 M(Mvns) \ 124 M(Teq) \ 125 M(Tst) \ 126 M(Sxtb) \ 127 M(Sxtb16) \ 128 M(Sxth) \ 129 M(Uxtb) \ 130 M(Uxtb16) \ 131 M(Uxth) 132 133 134// The following definitions are defined again in each generated test, therefore 135// we need to place them in an anomymous namespace. It expresses that they are 136// local to this file only, and the compiler is not allowed to share these types 137// across test files during template instantiation. Specifically, `Operands` and 138// `Inputs` have various layouts across generated tests so they absolutely 139// cannot be shared. 140 141#ifdef VIXL_INCLUDE_TARGET_T32 142namespace { 143 144// Values to be passed to the assembler to produce the instruction under test. 145struct Operands { 146 Condition cond; 147 Register rd; 148 Register rn; 149}; 150 151// Input data to feed to the instruction. 152struct Inputs { 153 uint32_t apsr; 154 uint32_t rd; 155 uint32_t rn; 156}; 157 158// This structure contains all input data needed to test one specific encoding. 159// It used to generate a loop over an instruction. 160struct TestLoopData { 161 // The `operands` fields represents the values to pass to the assembler to 162 // produce the instruction. 163 Operands operands; 164 // Description of the operands, used for error reporting. 165 const char* operands_description; 166 // Unique identifier, used for generating traces. 167 const char* identifier; 168 // Array of values to be fed to the instruction. 169 size_t input_size; 170 const Inputs* inputs; 171}; 172 173static const Inputs kCondition[] = {{NFlag, 0xabababab, 0xabababab}, 174 {ZFlag, 0xabababab, 0xabababab}, 175 {CFlag, 0xabababab, 0xabababab}, 176 {VFlag, 0xabababab, 0xabababab}, 177 {NZFlag, 0xabababab, 0xabababab}, 178 {NCFlag, 0xabababab, 0xabababab}, 179 {NVFlag, 0xabababab, 0xabababab}, 180 {ZCFlag, 0xabababab, 0xabababab}, 181 {ZVFlag, 0xabababab, 0xabababab}, 182 {CVFlag, 0xabababab, 0xabababab}, 183 {NZCFlag, 0xabababab, 0xabababab}, 184 {NZVFlag, 0xabababab, 0xabababab}, 185 {NCVFlag, 0xabababab, 0xabababab}, 186 {ZCVFlag, 0xabababab, 0xabababab}, 187 {NZCVFlag, 0xabababab, 0xabababab}}; 188 189static const Inputs kRdIsRn[] = {{NoFlag, 0x00000000, 0x00000000}, 190 {NoFlag, 0x00000001, 0x00000001}, 191 {NoFlag, 0x00000002, 0x00000002}, 192 {NoFlag, 0x00000020, 0x00000020}, 193 {NoFlag, 0x0000007d, 0x0000007d}, 194 {NoFlag, 0x0000007e, 0x0000007e}, 195 {NoFlag, 0x0000007f, 0x0000007f}, 196 {NoFlag, 0x00007ffd, 0x00007ffd}, 197 {NoFlag, 0x00007ffe, 0x00007ffe}, 198 {NoFlag, 0x00007fff, 0x00007fff}, 199 {NoFlag, 0x33333333, 0x33333333}, 200 {NoFlag, 0x55555555, 0x55555555}, 201 {NoFlag, 0x7ffffffd, 0x7ffffffd}, 202 {NoFlag, 0x7ffffffe, 0x7ffffffe}, 203 {NoFlag, 0x7fffffff, 0x7fffffff}, 204 {NoFlag, 0x80000000, 0x80000000}, 205 {NoFlag, 0x80000001, 0x80000001}, 206 {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa}, 207 {NoFlag, 0xcccccccc, 0xcccccccc}, 208 {NoFlag, 0xffff8000, 0xffff8000}, 209 {NoFlag, 0xffff8001, 0xffff8001}, 210 {NoFlag, 0xffff8002, 0xffff8002}, 211 {NoFlag, 0xffff8003, 0xffff8003}, 212 {NoFlag, 0xffffff80, 0xffffff80}, 213 {NoFlag, 0xffffff81, 0xffffff81}, 214 {NoFlag, 0xffffff82, 0xffffff82}, 215 {NoFlag, 0xffffff83, 0xffffff83}, 216 {NoFlag, 0xffffffe0, 0xffffffe0}, 217 {NoFlag, 0xfffffffd, 0xfffffffd}, 218 {NoFlag, 0xfffffffe, 0xfffffffe}, 219 {NoFlag, 0xffffffff, 0xffffffff}}; 220 221static const Inputs kRdIsNotRn[] = {{NoFlag, 0x00000002, 0xcccccccc}, 222 {NoFlag, 0x7ffffffd, 0x00007ffe}, 223 {NoFlag, 0xffffff80, 0x00000020}, 224 {NoFlag, 0xaaaaaaaa, 0xaaaaaaaa}, 225 {NoFlag, 0x33333333, 0xffffff82}, 226 {NoFlag, 0xffff8001, 0x7ffffffe}, 227 {NoFlag, 0xfffffffd, 0x00007ffe}, 228 {NoFlag, 0xffffff80, 0x80000000}, 229 {NoFlag, 0x00000001, 0x33333333}, 230 {NoFlag, 0xcccccccc, 0x7ffffffe}, 231 {NoFlag, 0x00000000, 0xcccccccc}, 232 {NoFlag, 0x00000000, 0x55555555}, 233 {NoFlag, 0xffffffff, 0xffffffff}, 234 {NoFlag, 0x0000007e, 0xffff8002}, 235 {NoFlag, 0x80000000, 0x7ffffffd}, 236 {NoFlag, 0xffffff81, 0x0000007e}, 237 {NoFlag, 0x0000007f, 0xffff8001}, 238 {NoFlag, 0xffffffe0, 0x00007ffd}, 239 {NoFlag, 0xffff8003, 0x00000002}, 240 {NoFlag, 0xffffff83, 0x55555555}, 241 {NoFlag, 0xffffff83, 0xffffff80}, 242 {NoFlag, 0xffffff81, 0xffff8000}, 243 {NoFlag, 0x00000020, 0x7ffffffe}, 244 {NoFlag, 0xffffffe0, 0x00000000}, 245 {NoFlag, 0x7fffffff, 0x0000007e}, 246 {NoFlag, 0x80000001, 0xffffffff}, 247 {NoFlag, 0x00000001, 0x80000001}, 248 {NoFlag, 0x00000002, 0x0000007f}, 249 {NoFlag, 0x7fffffff, 0xcccccccc}, 250 {NoFlag, 0x80000001, 0x00007ffe}, 251 {NoFlag, 0xffff8002, 0x0000007e}, 252 {NoFlag, 0x00007ffe, 0xcccccccc}, 253 {NoFlag, 0x80000000, 0xffff8002}, 254 {NoFlag, 0xffffff83, 0x7ffffffe}, 255 {NoFlag, 0xffff8001, 0x00000001}, 256 {NoFlag, 0xffffff81, 0x00000020}, 257 {NoFlag, 0xfffffffe, 0xffff8001}, 258 {NoFlag, 0xffffffff, 0xfffffffe}, 259 {NoFlag, 0xcccccccc, 0x55555555}, 260 {NoFlag, 0x00000020, 0xffffff83}, 261 {NoFlag, 0xffffff83, 0xffff8001}, 262 {NoFlag, 0xffffff83, 0xffff8000}, 263 {NoFlag, 0x00007fff, 0x00000002}, 264 {NoFlag, 0x55555555, 0xffff8000}, 265 {NoFlag, 0x80000001, 0xffffff81}, 266 {NoFlag, 0x00000002, 0x00000000}, 267 {NoFlag, 0x33333333, 0xffffff81}, 268 {NoFlag, 0xffff8001, 0xffffff82}, 269 {NoFlag, 0xcccccccc, 0xffff8003}, 270 {NoFlag, 0xffff8003, 0x7ffffffd}, 271 {NoFlag, 0x0000007d, 0x00007ffe}, 272 {NoFlag, 0xffffff80, 0x0000007d}, 273 {NoFlag, 0xaaaaaaaa, 0x00007ffd}, 274 {NoFlag, 0x80000000, 0xffffff82}, 275 {NoFlag, 0x00000002, 0x7ffffffe}, 276 {NoFlag, 0x00000002, 0xffffff83}, 277 {NoFlag, 0x55555555, 0x00000002}, 278 {NoFlag, 0xffffffff, 0xffffff82}, 279 {NoFlag, 0xaaaaaaaa, 0x00000020}, 280 {NoFlag, 0x00000001, 0xffffff82}, 281 {NoFlag, 0x0000007f, 0xffffff82}, 282 {NoFlag, 0x7ffffffd, 0xaaaaaaaa}, 283 {NoFlag, 0x00007ffe, 0x00000001}, 284 {NoFlag, 0xfffffffd, 0xffffffe0}, 285 {NoFlag, 0xffffff81, 0xffffff83}, 286 {NoFlag, 0x0000007d, 0x00000000}, 287 {NoFlag, 0x0000007d, 0xffff8000}, 288 {NoFlag, 0xffffff81, 0x7fffffff}, 289 {NoFlag, 0xffffffff, 0x80000000}, 290 {NoFlag, 0x00000000, 0x00000001}, 291 {NoFlag, 0x55555555, 0xffffff82}, 292 {NoFlag, 0x00007ffe, 0x00007ffe}, 293 {NoFlag, 0x80000001, 0xfffffffd}, 294 {NoFlag, 0x00007fff, 0x33333333}, 295 {NoFlag, 0x00007fff, 0x80000000}, 296 {NoFlag, 0xcccccccc, 0x00007fff}, 297 {NoFlag, 0xfffffffe, 0xffffffe0}, 298 {NoFlag, 0x7ffffffe, 0x0000007f}, 299 {NoFlag, 0x00007ffd, 0xffff8001}, 300 {NoFlag, 0x00000002, 0x00000001}, 301 {NoFlag, 0x80000000, 0xffffffff}, 302 {NoFlag, 0xffffff83, 0xcccccccc}, 303 {NoFlag, 0xffff8002, 0x7ffffffe}, 304 {NoFlag, 0xaaaaaaaa, 0x00000000}, 305 {NoFlag, 0xffffff80, 0xcccccccc}, 306 {NoFlag, 0x33333333, 0xffffff83}, 307 {NoFlag, 0x0000007e, 0xffffffe0}, 308 {NoFlag, 0x0000007e, 0x00007fff}, 309 {NoFlag, 0x0000007f, 0x00000002}, 310 {NoFlag, 0x7ffffffe, 0xcccccccc}, 311 {NoFlag, 0x0000007d, 0xffffff80}, 312 {NoFlag, 0x00007fff, 0x00000020}, 313 {NoFlag, 0x7ffffffe, 0xfffffffe}, 314 {NoFlag, 0xfffffffe, 0xffffff81}, 315 {NoFlag, 0xffffffff, 0x0000007f}, 316 {NoFlag, 0xffff8002, 0x7ffffffd}, 317 {NoFlag, 0xffff8001, 0xfffffffe}, 318 {NoFlag, 0x33333333, 0xffff8002}, 319 {NoFlag, 0x00000000, 0xffffffff}, 320 {NoFlag, 0x33333333, 0xffffff80}, 321 {NoFlag, 0x0000007f, 0x00007fff}, 322 {NoFlag, 0xffffffff, 0xffff8001}, 323 {NoFlag, 0x7fffffff, 0xffff8002}, 324 {NoFlag, 0x7ffffffd, 0xffffff83}, 325 {NoFlag, 0x7fffffff, 0x0000007f}, 326 {NoFlag, 0xffffff83, 0xfffffffe}, 327 {NoFlag, 0x7ffffffe, 0xffff8003}, 328 {NoFlag, 0xffff8002, 0xffff8002}, 329 {NoFlag, 0x80000001, 0x0000007f}, 330 {NoFlag, 0x00000020, 0x00000002}, 331 {NoFlag, 0xffffff82, 0xffff8001}, 332 {NoFlag, 0xffffffff, 0x00000001}, 333 {NoFlag, 0xffffff80, 0xffff8002}, 334 {NoFlag, 0xffff8003, 0x7fffffff}, 335 {NoFlag, 0xffffffff, 0xffff8000}, 336 {NoFlag, 0xffff8002, 0x00007ffd}, 337 {NoFlag, 0x00000020, 0xffffff81}, 338 {NoFlag, 0x00000001, 0x55555555}, 339 {NoFlag, 0x7ffffffe, 0x00000020}, 340 {NoFlag, 0x80000000, 0x00000001}, 341 {NoFlag, 0x00007ffd, 0xffff8002}, 342 {NoFlag, 0x7fffffff, 0xfffffffe}, 343 {NoFlag, 0xcccccccc, 0x00007ffd}, 344 {NoFlag, 0x00000000, 0xfffffffd}, 345 {NoFlag, 0xffff8003, 0xffffff80}, 346 {NoFlag, 0x80000001, 0xffffff80}, 347 {NoFlag, 0xffffffff, 0xffff8002}, 348 {NoFlag, 0x00007ffe, 0xffff8002}, 349 {NoFlag, 0xffffff80, 0x00007ffe}, 350 {NoFlag, 0x80000001, 0xffff8001}, 351 {NoFlag, 0x0000007f, 0xffffff80}, 352 {NoFlag, 0xffffff81, 0x80000000}, 353 {NoFlag, 0x00007fff, 0x00007ffe}, 354 {NoFlag, 0x33333333, 0xffff8000}, 355 {NoFlag, 0x33333333, 0x00007fff}, 356 {NoFlag, 0x00000000, 0x0000007d}, 357 {NoFlag, 0x80000001, 0x00000000}, 358 {NoFlag, 0xffffffff, 0x55555555}, 359 {NoFlag, 0x80000001, 0x80000000}, 360 {NoFlag, 0xffffffff, 0xffffff80}, 361 {NoFlag, 0xffffff81, 0xffff8003}, 362 {NoFlag, 0x55555555, 0x80000001}, 363 {NoFlag, 0x7fffffff, 0xffff8001}, 364 {NoFlag, 0xffffff83, 0x00000002}, 365 {NoFlag, 0x0000007e, 0xffffff81}, 366 {NoFlag, 0x80000000, 0xffff8001}, 367 {NoFlag, 0xffffff80, 0xfffffffe}, 368 {NoFlag, 0x0000007e, 0xfffffffd}, 369 {NoFlag, 0xffffffe0, 0xffffffff}, 370 {NoFlag, 0x55555555, 0x80000000}, 371 {NoFlag, 0x0000007d, 0x80000001}, 372 {NoFlag, 0xffffffe0, 0x7ffffffd}, 373 {NoFlag, 0x00000000, 0x00000000}, 374 {NoFlag, 0x55555555, 0x00000001}, 375 {NoFlag, 0x00007ffd, 0x7fffffff}, 376 {NoFlag, 0x55555555, 0xffffffff}, 377 {NoFlag, 0xffff8003, 0x00007fff}, 378 {NoFlag, 0xffffff82, 0x00007fff}, 379 {NoFlag, 0x33333333, 0x55555555}, 380 {NoFlag, 0x00000020, 0x33333333}, 381 {NoFlag, 0x7ffffffe, 0xfffffffd}, 382 {NoFlag, 0x7ffffffe, 0x00000001}, 383 {NoFlag, 0xffffff83, 0xffffffe0}, 384 {NoFlag, 0xfffffffe, 0xaaaaaaaa}, 385 {NoFlag, 0xffff8002, 0x33333333}, 386 {NoFlag, 0xffff8002, 0xffff8003}, 387 {NoFlag, 0x33333333, 0x7fffffff}, 388 {NoFlag, 0xfffffffd, 0xffffff83}, 389 {NoFlag, 0x00000000, 0xffff8000}, 390 {NoFlag, 0xffffff82, 0x55555555}, 391 {NoFlag, 0xffffff82, 0xffffff81}, 392 {NoFlag, 0xcccccccc, 0xfffffffe}, 393 {NoFlag, 0xfffffffd, 0x7fffffff}, 394 {NoFlag, 0x00007fff, 0x7fffffff}, 395 {NoFlag, 0xffffff83, 0xffff8003}, 396 {NoFlag, 0xfffffffe, 0xffffffff}, 397 {NoFlag, 0x7ffffffd, 0x00007ffd}, 398 {NoFlag, 0x7ffffffd, 0x00007fff}, 399 {NoFlag, 0x00007ffd, 0xffffffff}, 400 {NoFlag, 0x00000001, 0xffff8003}, 401 {NoFlag, 0xffffff80, 0xfffffffd}, 402 {NoFlag, 0x33333333, 0x80000000}, 403 {NoFlag, 0xffff8001, 0x00000020}, 404 {NoFlag, 0xcccccccc, 0x00000002}, 405 {NoFlag, 0x00000000, 0x00000002}, 406 {NoFlag, 0x0000007d, 0x00007fff}, 407 {NoFlag, 0xcccccccc, 0x00000001}, 408 {NoFlag, 0xffffff83, 0x00007fff}, 409 {NoFlag, 0x80000001, 0x00000020}, 410 {NoFlag, 0xffff8003, 0xffffffe0}, 411 {NoFlag, 0x00007ffd, 0xaaaaaaaa}, 412 {NoFlag, 0x33333333, 0xffff8001}, 413 {NoFlag, 0xffffff83, 0x80000001}, 414 {NoFlag, 0xffff8000, 0xffff8000}, 415 {NoFlag, 0x00007ffe, 0xffff8001}, 416 {NoFlag, 0x7ffffffd, 0x00000000}, 417 {NoFlag, 0x00007ffe, 0x33333333}, 418 {NoFlag, 0xffff8001, 0xffffff80}, 419 {NoFlag, 0xfffffffe, 0x55555555}, 420 {NoFlag, 0xffffff82, 0xffffffff}}; 421 422 423// A loop will be generated for each element of this array. 424const TestLoopData kTests[] = { 425 {{eq, r0, r0}, 426 "eq r0 r0", 427 "Condition_eq_r0_r0", 428 ARRAY_SIZE(kCondition), 429 kCondition}, 430 {{ne, r0, r0}, 431 "ne r0 r0", 432 "Condition_ne_r0_r0", 433 ARRAY_SIZE(kCondition), 434 kCondition}, 435 {{cs, r0, r0}, 436 "cs r0 r0", 437 "Condition_cs_r0_r0", 438 ARRAY_SIZE(kCondition), 439 kCondition}, 440 {{cc, r0, r0}, 441 "cc r0 r0", 442 "Condition_cc_r0_r0", 443 ARRAY_SIZE(kCondition), 444 kCondition}, 445 {{mi, r0, r0}, 446 "mi r0 r0", 447 "Condition_mi_r0_r0", 448 ARRAY_SIZE(kCondition), 449 kCondition}, 450 {{pl, r0, r0}, 451 "pl r0 r0", 452 "Condition_pl_r0_r0", 453 ARRAY_SIZE(kCondition), 454 kCondition}, 455 {{vs, r0, r0}, 456 "vs r0 r0", 457 "Condition_vs_r0_r0", 458 ARRAY_SIZE(kCondition), 459 kCondition}, 460 {{vc, r0, r0}, 461 "vc r0 r0", 462 "Condition_vc_r0_r0", 463 ARRAY_SIZE(kCondition), 464 kCondition}, 465 {{hi, r0, r0}, 466 "hi r0 r0", 467 "Condition_hi_r0_r0", 468 ARRAY_SIZE(kCondition), 469 kCondition}, 470 {{ls, r0, r0}, 471 "ls r0 r0", 472 "Condition_ls_r0_r0", 473 ARRAY_SIZE(kCondition), 474 kCondition}, 475 {{ge, r0, r0}, 476 "ge r0 r0", 477 "Condition_ge_r0_r0", 478 ARRAY_SIZE(kCondition), 479 kCondition}, 480 {{lt, r0, r0}, 481 "lt r0 r0", 482 "Condition_lt_r0_r0", 483 ARRAY_SIZE(kCondition), 484 kCondition}, 485 {{gt, r0, r0}, 486 "gt r0 r0", 487 "Condition_gt_r0_r0", 488 ARRAY_SIZE(kCondition), 489 kCondition}, 490 {{le, r0, r0}, 491 "le r0 r0", 492 "Condition_le_r0_r0", 493 ARRAY_SIZE(kCondition), 494 kCondition}, 495 {{al, r0, r0}, 496 "al r0 r0", 497 "Condition_al_r0_r0", 498 ARRAY_SIZE(kCondition), 499 kCondition}, 500 {{al, r0, r0}, "al r0 r0", "RdIsRn_al_r0_r0", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 501 {{al, r1, r1}, "al r1 r1", "RdIsRn_al_r1_r1", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 502 {{al, r2, r2}, "al r2 r2", "RdIsRn_al_r2_r2", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 503 {{al, r3, r3}, "al r3 r3", "RdIsRn_al_r3_r3", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 504 {{al, r4, r4}, "al r4 r4", "RdIsRn_al_r4_r4", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 505 {{al, r5, r5}, "al r5 r5", "RdIsRn_al_r5_r5", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 506 {{al, r6, r6}, "al r6 r6", "RdIsRn_al_r6_r6", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 507 {{al, r7, r7}, "al r7 r7", "RdIsRn_al_r7_r7", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 508 {{al, r8, r8}, "al r8 r8", "RdIsRn_al_r8_r8", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 509 {{al, r9, r9}, "al r9 r9", "RdIsRn_al_r9_r9", ARRAY_SIZE(kRdIsRn), kRdIsRn}, 510 {{al, r10, r10}, 511 "al r10 r10", 512 "RdIsRn_al_r10_r10", 513 ARRAY_SIZE(kRdIsRn), 514 kRdIsRn}, 515 {{al, r11, r11}, 516 "al r11 r11", 517 "RdIsRn_al_r11_r11", 518 ARRAY_SIZE(kRdIsRn), 519 kRdIsRn}, 520 {{al, r12, r12}, 521 "al r12 r12", 522 "RdIsRn_al_r12_r12", 523 ARRAY_SIZE(kRdIsRn), 524 kRdIsRn}, 525 {{al, r14, r14}, 526 "al r14 r14", 527 "RdIsRn_al_r14_r14", 528 ARRAY_SIZE(kRdIsRn), 529 kRdIsRn}, 530 {{al, r1, r8}, 531 "al r1 r8", 532 "RdIsNotRn_al_r1_r8", 533 ARRAY_SIZE(kRdIsNotRn), 534 kRdIsNotRn}, 535 {{al, r7, r4}, 536 "al r7 r4", 537 "RdIsNotRn_al_r7_r4", 538 ARRAY_SIZE(kRdIsNotRn), 539 kRdIsNotRn}, 540 {{al, r14, r10}, 541 "al r14 r10", 542 "RdIsNotRn_al_r14_r10", 543 ARRAY_SIZE(kRdIsNotRn), 544 kRdIsNotRn}, 545 {{al, r10, r6}, 546 "al r10 r6", 547 "RdIsNotRn_al_r10_r6", 548 ARRAY_SIZE(kRdIsNotRn), 549 kRdIsNotRn}, 550 {{al, r6, r5}, 551 "al r6 r5", 552 "RdIsNotRn_al_r6_r5", 553 ARRAY_SIZE(kRdIsNotRn), 554 kRdIsNotRn}, 555 {{al, r12, r2}, 556 "al r12 r2", 557 "RdIsNotRn_al_r12_r2", 558 ARRAY_SIZE(kRdIsNotRn), 559 kRdIsNotRn}, 560 {{al, r0, r11}, 561 "al r0 r11", 562 "RdIsNotRn_al_r0_r11", 563 ARRAY_SIZE(kRdIsNotRn), 564 kRdIsNotRn}, 565 {{al, r10, r14}, 566 "al r10 r14", 567 "RdIsNotRn_al_r10_r14", 568 ARRAY_SIZE(kRdIsNotRn), 569 kRdIsNotRn}, 570 {{al, r0, r5}, 571 "al r0 r5", 572 "RdIsNotRn_al_r0_r5", 573 ARRAY_SIZE(kRdIsNotRn), 574 kRdIsNotRn}, 575 {{al, r0, r3}, 576 "al r0 r3", 577 "RdIsNotRn_al_r0_r3", 578 ARRAY_SIZE(kRdIsNotRn), 579 kRdIsNotRn}}; 580 581// We record all inputs to the instructions as outputs. This way, we also check 582// that what shouldn't change didn't change. 583struct TestResult { 584 size_t output_size; 585 const Inputs* outputs; 586}; 587 588// These headers each contain an array of `TestResult` with the reference output 589// values. The reference arrays are names `kReference{mnemonic}`. 590#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-cmn.h" 591#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-cmp.h" 592#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-mov.h" 593#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-movs.h" 594#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-mvn.h" 595#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-mvns.h" 596#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-teq.h" 597#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-tst.h" 598#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-sxtb.h" 599#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-sxtb16.h" 600#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-sxth.h" 601#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-uxtb.h" 602#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-uxtb16.h" 603#include "aarch32/traces/simulator-cond-rd-operand-rn-t32-uxth.h" 604 605 606// The maximum number of errors to report in detail for each test. 607const unsigned kErrorReportLimit = 8; 608 609typedef void (MacroAssembler::*Fn)(Condition cond, 610 Register rd, 611 const Operand& op); 612 613void TestHelper(Fn instruction, 614 const char* mnemonic, 615 const TestResult reference[]) { 616 SETUP(); 617 masm.UseT32(); 618 START(); 619 620 // Data to compare to `reference`. 621 TestResult* results[ARRAY_SIZE(kTests)]; 622 623 // Test cases for memory bound instructions may allocate a buffer and save its 624 // address in this array. 625 byte* scratch_memory_buffers[ARRAY_SIZE(kTests)]; 626 627 // Generate a loop for each element in `kTests`. Each loop tests one specific 628 // instruction. 629 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) { 630 // Allocate results on the heap for this test. 631 results[i] = new TestResult; 632 results[i]->outputs = new Inputs[kTests[i].input_size]; 633 results[i]->output_size = kTests[i].input_size; 634 635 size_t input_stride = sizeof(kTests[i].inputs[0]) * kTests[i].input_size; 636 VIXL_ASSERT(IsUint32(input_stride)); 637 638 scratch_memory_buffers[i] = NULL; 639 640 Label loop; 641 UseScratchRegisterScope scratch_registers(&masm); 642 // Include all registers from r0 ro r12. 643 scratch_registers.Include(RegisterList(0x1fff)); 644 645 // Values to pass to the macro-assembler. 646 Condition cond = kTests[i].operands.cond; 647 Register rd = kTests[i].operands.rd; 648 Register rn = kTests[i].operands.rn; 649 Operand op(rn); 650 scratch_registers.Exclude(rd); 651 scratch_registers.Exclude(rn); 652 653 // Allocate reserved registers for our own use. 654 Register input_ptr = scratch_registers.Acquire(); 655 Register input_end = scratch_registers.Acquire(); 656 Register result_ptr = scratch_registers.Acquire(); 657 658 // Initialize `input_ptr` to the first element and `input_end` the address 659 // after the array. 660 __ Mov(input_ptr, Operand::From(kTests[i].inputs)); 661 __ Add(input_end, input_ptr, static_cast<uint32_t>(input_stride)); 662 __ Mov(result_ptr, Operand::From(results[i]->outputs)); 663 __ Bind(&loop); 664 665 { 666 UseScratchRegisterScope temp_registers(&masm); 667 Register nzcv_bits = temp_registers.Acquire(); 668 Register saved_q_bit = temp_registers.Acquire(); 669 // Save the `Q` bit flag. 670 __ Mrs(saved_q_bit, APSR); 671 __ And(saved_q_bit, saved_q_bit, QFlag); 672 // Set the `NZCV` and `Q` flags together. 673 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 674 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 675 __ Msr(APSR_nzcvq, nzcv_bits); 676 } 677 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd))); 678 __ Ldr(rn, MemOperand(input_ptr, offsetof(Inputs, rn))); 679 680 (masm.*instruction)(cond, rd, op); 681 682 { 683 UseScratchRegisterScope temp_registers(&masm); 684 Register nzcv_bits = temp_registers.Acquire(); 685 __ Mrs(nzcv_bits, APSR); 686 // Only record the NZCV bits. 687 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 688 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 689 } 690 __ Str(rd, MemOperand(result_ptr, offsetof(Inputs, rd))); 691 __ Str(rn, MemOperand(result_ptr, offsetof(Inputs, rn))); 692 693 // Advance the result pointer. 694 __ Add(result_ptr, result_ptr, Operand::From(sizeof(kTests[i].inputs[0]))); 695 // Loop back until `input_ptr` is lower than `input_base`. 696 __ Add(input_ptr, input_ptr, Operand::From(sizeof(kTests[i].inputs[0]))); 697 __ Cmp(input_ptr, input_end); 698 __ B(ne, &loop); 699 } 700 701 END(); 702 703 RUN(); 704 705 if (Test::generate_test_trace()) { 706 // Print the results. 707 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) { 708 printf("const Inputs kOutputs_%s_%s[] = {\n", 709 mnemonic, 710 kTests[i].identifier); 711 for (size_t j = 0; j < results[i]->output_size; j++) { 712 printf(" { "); 713 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 714 printf(", "); 715 printf("0x%08" PRIx32, results[i]->outputs[j].rd); 716 printf(", "); 717 printf("0x%08" PRIx32, results[i]->outputs[j].rn); 718 printf(" },\n"); 719 } 720 printf("};\n"); 721 } 722 printf("const TestResult kReference%s[] = {\n", mnemonic); 723 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) { 724 printf(" {\n"); 725 printf(" ARRAY_SIZE(kOutputs_%s_%s),\n", 726 mnemonic, 727 kTests[i].identifier); 728 printf(" kOutputs_%s_%s,\n", mnemonic, kTests[i].identifier); 729 printf(" },\n"); 730 } 731 printf("};\n"); 732 } else if (kCheckSimulatorTestResults) { 733 // Check the results. 734 unsigned total_error_count = 0; 735 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) { 736 bool instruction_has_errors = false; 737 for (size_t j = 0; j < kTests[i].input_size; j++) { 738 uint32_t apsr = results[i]->outputs[j].apsr; 739 uint32_t rd = results[i]->outputs[j].rd; 740 uint32_t rn = results[i]->outputs[j].rn; 741 uint32_t apsr_input = kTests[i].inputs[j].apsr; 742 uint32_t rd_input = kTests[i].inputs[j].rd; 743 uint32_t rn_input = kTests[i].inputs[j].rn; 744 uint32_t apsr_ref = reference[i].outputs[j].apsr; 745 uint32_t rd_ref = reference[i].outputs[j].rd; 746 uint32_t rn_ref = reference[i].outputs[j].rn; 747 748 if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref)) && 749 (++total_error_count <= kErrorReportLimit)) { 750 // Print the instruction once even if it triggered multiple failures. 751 if (!instruction_has_errors) { 752 printf("Error(s) when testing \"%s %s\":\n", 753 mnemonic, 754 kTests[i].operands_description); 755 instruction_has_errors = true; 756 } 757 // Print subsequent errors. 758 printf(" Input: "); 759 printf("0x%08" PRIx32, apsr_input); 760 printf(", "); 761 printf("0x%08" PRIx32, rd_input); 762 printf(", "); 763 printf("0x%08" PRIx32, rn_input); 764 printf("\n"); 765 printf(" Expected: "); 766 printf("0x%08" PRIx32, apsr_ref); 767 printf(", "); 768 printf("0x%08" PRIx32, rd_ref); 769 printf(", "); 770 printf("0x%08" PRIx32, rn_ref); 771 printf("\n"); 772 printf(" Found: "); 773 printf("0x%08" PRIx32, apsr); 774 printf(", "); 775 printf("0x%08" PRIx32, rd); 776 printf(", "); 777 printf("0x%08" PRIx32, rn); 778 printf("\n\n"); 779 } 780 } 781 } 782 783 if (total_error_count > kErrorReportLimit) { 784 printf("%u other errors follow.\n", 785 total_error_count - kErrorReportLimit); 786 } 787 VIXL_CHECK(total_error_count == 0); 788 } else { 789 VIXL_WARNING("Assembled the code, but did not run anything.\n"); 790 } 791 792 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) { 793 delete[] results[i]->outputs; 794 delete results[i]; 795 delete[] scratch_memory_buffers[i]; 796 } 797 798 TEARDOWN(); 799} 800 801// Instantiate tests for each instruction in the list. 802// TODO: Remove this limitation by having a sandboxing mechanism. 803#if defined(VIXL_HOST_POINTER_32) 804#define TEST(mnemonic) \ 805 void Test_##mnemonic() { \ 806 TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \ 807 } \ 808 Test test_##mnemonic("AARCH32_SIMULATOR_COND_RD_OPERAND_RN_T32_" #mnemonic, \ 809 &Test_##mnemonic); 810#else 811#define TEST(mnemonic) \ 812 void Test_##mnemonic() { \ 813 VIXL_WARNING("This test can only run on a 32-bit host.\n"); \ 814 USE(TestHelper); \ 815 } \ 816 Test test_##mnemonic("AARCH32_SIMULATOR_COND_RD_OPERAND_RN_T32_" #mnemonic, \ 817 &Test_##mnemonic); 818#endif 819 820FOREACH_INSTRUCTION(TEST) 821#undef TEST 822 823} // namespace 824#endif 825 826} // namespace aarch32 827} // namespace vixl 828