1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_MSM_MDP_H_
20#define _UAPI_MSM_MDP_H_
21#include <linux/types.h>
22#include <linux/fb.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define MSMFB_IOCTL_MAGIC 'm'
25#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
26#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
27#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
30#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
31#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
32#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
35#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
36#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135,   struct mdp_overlay)
37#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137,   struct msmfb_overlay_data)
40#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
41#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138,   struct mdp_page_protection)
42#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139,   struct mdp_page_protection)
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140,   struct mdp_overlay)
45#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
46#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142,   struct msmfb_overlay_blt)
47#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144,   struct mdp_histogram_start_req)
50#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
51#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int)
52#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147,   struct msmfb_overlay_3d)
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148,   struct msmfb_mixer_info_req)
55#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149,   struct msmfb_overlay_data)
56#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
57#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
60#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153,   struct msmfb_data)
61#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154,   struct msmfb_data)
62#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
65#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
66#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
67#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync)
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163)
70#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164,   struct mdp_display_commit)
71#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata)
72#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167,   unsigned int)
75#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
76#define MSMFB_OVERLAY_PREPARE _IOWR(MSMFB_IOCTL_MAGIC, 169,   struct mdp_overlay_list)
77#define MSMFB_REG_READ _IOWR(MSMFB_IOCTL_MAGIC, 64, struct msmfb_reg_access)
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79#define MSMFB_REG_WRITE _IOW(MSMFB_IOCTL_MAGIC, 65, struct msmfb_reg_access)
80#define MSMFB_SECURE _IOWR(MSMFB_IOCTL_MAGIC, 170, struct msmfb_secure_config)
81#define FB_TYPE_3D_PANEL 0x10101010
82#define MDP_IMGTYPE2_START 0x10000
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84#define MSMFB_DRIVER_VERSION 0xF9E8D701
85#define MDSS_GET_MAJOR(rev) ((rev) >> 28)
86#define MDSS_GET_MINOR(rev) (((rev) >> 16) & 0xFFF)
87#define MDSS_GET_STEP(rev) ((rev) & 0xFFFF)
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89#define MDSS_GET_MAJOR_MINOR(rev) ((rev) >> 16)
90#define IS_MDSS_MAJOR_MINOR_SAME(rev1, rev2)   (MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2)))
91#define MDSS_MDP_REV(major, minor, step)   ((((major) & 0x000F) << 28) |   (((minor) & 0x0FFF) << 16) |   ((step) & 0xFFFF))
92#define MDSS_MDP_HW_REV_100 MDSS_MDP_REV(1, 0, 0)
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94#define MDSS_MDP_HW_REV_101 MDSS_MDP_REV(1, 1, 0)
95#define MDSS_MDP_HW_REV_101_1 MDSS_MDP_REV(1, 1, 1)
96#define MDSS_MDP_HW_REV_101_2 MDSS_MDP_REV(1, 1, 2)
97#define MDSS_MDP_HW_REV_102 MDSS_MDP_REV(1, 2, 0)
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99#define MDSS_MDP_HW_REV_102_1 MDSS_MDP_REV(1, 2, 1)
100#define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0)
101#define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1)
102#define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0)
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104enum {
105 NOTIFY_UPDATE_START,
106 NOTIFY_UPDATE_STOP,
107 NOTIFY_UPDATE_POWER_OFF,
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109};
110enum {
111 NOTIFY_TYPE_NO_UPDATE,
112 NOTIFY_TYPE_SUSPEND,
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114 NOTIFY_TYPE_UPDATE,
115 NOTIFY_TYPE_BL_UPDATE,
116};
117enum {
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119 MDP_RGB_565,
120 MDP_XRGB_8888,
121 MDP_Y_CBCR_H2V2,
122 MDP_Y_CBCR_H2V2_ADRENO,
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124 MDP_ARGB_8888,
125 MDP_RGB_888,
126 MDP_Y_CRCB_H2V2,
127 MDP_YCRYCB_H2V1,
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129 MDP_CBYCRY_H2V1,
130 MDP_Y_CRCB_H2V1,
131 MDP_Y_CBCR_H2V1,
132 MDP_Y_CRCB_H1V2,
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134 MDP_Y_CBCR_H1V2,
135 MDP_RGBA_8888,
136 MDP_BGRA_8888,
137 MDP_RGBX_8888,
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139 MDP_Y_CRCB_H2V2_TILE,
140 MDP_Y_CBCR_H2V2_TILE,
141 MDP_Y_CR_CB_H2V2,
142 MDP_Y_CR_CB_GH2V2,
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144 MDP_Y_CB_CR_H2V2,
145 MDP_Y_CRCB_H1V1,
146 MDP_Y_CBCR_H1V1,
147 MDP_YCRCB_H1V1,
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149 MDP_YCBCR_H1V1,
150 MDP_BGR_565,
151 MDP_BGR_888,
152 MDP_Y_CBCR_H2V2_VENUS,
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154 MDP_BGRX_8888,
155 MDP_RGBA_8888_TILE,
156 MDP_ARGB_8888_TILE,
157 MDP_ABGR_8888_TILE,
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159 MDP_BGRA_8888_TILE,
160 MDP_RGBX_8888_TILE,
161 MDP_XRGB_8888_TILE,
162 MDP_XBGR_8888_TILE,
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164 MDP_BGRX_8888_TILE,
165 MDP_YCBYCR_H2V1,
166 MDP_RGB_565_TILE,
167 MDP_BGR_565_TILE,
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169 MDP_IMGTYPE_LIMIT,
170 MDP_RGB_BORDERFILL,
171 MDP_FB_FORMAT = MDP_IMGTYPE2_START,
172 MDP_IMGTYPE_LIMIT2
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174};
175enum {
176 PMEM_IMG,
177 FB_IMG,
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179};
180enum {
181 HSIC_HUE = 0,
182 HSIC_SAT,
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184 HSIC_INT,
185 HSIC_CON,
186 NUM_HSIC_PARAM,
187};
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189#define MDSS_MDP_ROT_ONLY 0x80
190#define MDSS_MDP_RIGHT_MIXER 0x100
191#define MDSS_MDP_DUAL_PIPE 0x200
192#define MDP_ROT_NOP 0
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194#define MDP_FLIP_LR 0x1
195#define MDP_FLIP_UD 0x2
196#define MDP_ROT_90 0x4
197#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
200#define MDP_DITHER 0x8
201#define MDP_BLUR 0x10
202#define MDP_BLEND_FG_PREMULT 0x20000
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204#define MDP_IS_FG 0x40000
205#define MDP_SOLID_FILL 0x00000020
206#define MDP_VPU_PIPE 0x00000040
207#define MDP_DEINTERLACE 0x80000000
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209#define MDP_SHARPENING 0x40000000
210#define MDP_NO_DMA_BARRIER_START 0x20000000
211#define MDP_NO_DMA_BARRIER_END 0x10000000
212#define MDP_NO_BLIT 0x08000000
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214#define MDP_BLIT_WITH_DMA_BARRIERS 0x000
215#define MDP_BLIT_WITH_NO_DMA_BARRIERS   (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
216#define MDP_BLIT_SRC_GEM 0x04000000
217#define MDP_BLIT_DST_GEM 0x02000000
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219#define MDP_BLIT_NON_CACHED 0x01000000
220#define MDP_OV_PIPE_SHARE 0x00800000
221#define MDP_DEINTERLACE_ODD 0x00400000
222#define MDP_OV_PLAY_NOWAIT 0x00200000
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224#define MDP_SOURCE_ROTATED_90 0x00100000
225#define MDP_OVERLAY_PP_CFG_EN 0x00080000
226#define MDP_BACKEND_COMPOSITION 0x00040000
227#define MDP_BORDERFILL_SUPPORTED 0x00010000
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229#define MDP_SECURE_OVERLAY_SESSION 0x00008000
230#define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000
231#define MDP_OV_PIPE_FORCE_DMA 0x00004000
232#define MDP_MEMORY_ID_TYPE_FB 0x00001000
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234#define MDP_BWC_EN 0x00000400
235#define MDP_DECIMATION_EN 0x00000800
236#define MDP_TRANSP_NOP 0xffffffff
237#define MDP_ALPHA_NOP 0xff
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239#define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
240#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
241#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
242#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
245#define MDP_FB_PAGE_PROTECTION_INVALID (5)
246#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
247struct mdp_rect {
248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249 uint32_t x;
250 uint32_t y;
251 uint32_t w;
252 uint32_t h;
253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254};
255struct mdp_img {
256 uint32_t width;
257 uint32_t height;
258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259 uint32_t format;
260 uint32_t offset;
261 int memory_id;
262 uint32_t priv;
263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264};
265#define MDP_CCS_RGB2YUV 0
266#define MDP_CCS_YUV2RGB 1
267#define MDP_CCS_SIZE 9
268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269#define MDP_BV_SIZE 3
270struct mdp_ccs {
271 int direction;
272 uint16_t ccs[MDP_CCS_SIZE];
273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274 uint16_t bv[MDP_BV_SIZE];
275};
276struct mdp_csc {
277 int id;
278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279 uint32_t csc_mv[9];
280 uint32_t csc_pre_bv[3];
281 uint32_t csc_post_bv[3];
282 uint32_t csc_pre_lv[6];
283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284 uint32_t csc_post_lv[6];
285};
286#define MDP_BLIT_REQ_VERSION 2
287struct color {
288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289 uint32_t r;
290 uint32_t g;
291 uint32_t b;
292 uint32_t alpha;
293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294};
295struct mdp_blit_req {
296 struct mdp_img src;
297 struct mdp_img dst;
298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299 struct mdp_rect src_rect;
300 struct mdp_rect dst_rect;
301 struct color const_color;
302 uint32_t alpha;
303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304 uint32_t transp_mask;
305 uint32_t flags;
306 int sharpening_strength;
307};
308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309struct mdp_blit_req_list {
310 uint32_t count;
311 struct mdp_blit_req req[];
312};
313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314#define MSMFB_DATA_VERSION 2
315struct msmfb_data {
316 uint32_t offset;
317 int memory_id;
318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319 int id;
320 uint32_t flags;
321 uint32_t priv;
322 uint32_t iova;
323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324};
325#define MSMFB_NEW_REQUEST -1
326struct msmfb_overlay_data {
327 uint32_t id;
328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329 struct msmfb_data data;
330 uint32_t version_key;
331 struct msmfb_data plane1_data;
332 struct msmfb_data plane2_data;
333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334 struct msmfb_data dst_data;
335};
336struct msmfb_img {
337 uint32_t width;
338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339 uint32_t height;
340 uint32_t format;
341};
342#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344struct msmfb_writeback_data {
345 struct msmfb_data buf_info;
346 struct msmfb_img img;
347};
348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349#define MDP_PP_OPS_ENABLE 0x1
350#define MDP_PP_OPS_READ 0x2
351#define MDP_PP_OPS_WRITE 0x4
352#define MDP_PP_OPS_DISABLE 0x8
353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354#define MDP_PP_IGC_FLAG_ROM0 0x10
355#define MDP_PP_IGC_FLAG_ROM1 0x20
356#define MDP_PP_PA_HUE_ENABLE 0x10
357#define MDP_PP_PA_SAT_ENABLE 0x20
358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359#define MDP_PP_PA_VAL_ENABLE 0x40
360#define MDP_PP_PA_CONT_ENABLE 0x80
361#define MDP_PP_PA_SIX_ZONE_ENABLE 0x100
362#define MDP_PP_PA_SKIN_ENABLE 0x200
363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364#define MDP_PP_PA_SKY_ENABLE 0x400
365#define MDP_PP_PA_FOL_ENABLE 0x800
366#define MDP_PP_PA_HUE_MASK 0x1000
367#define MDP_PP_PA_SAT_MASK 0x2000
368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369#define MDP_PP_PA_VAL_MASK 0x4000
370#define MDP_PP_PA_CONT_MASK 0x8000
371#define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000
372#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000
373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374#define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000
375#define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000
376#define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000
377#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000
378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
379#define MDP_PP_PA_MEM_PROTECT_EN 0x400000
380#define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000
381#define MDSS_PP_DSPP_CFG 0x000
382#define MDSS_PP_SSPP_CFG 0x100
383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
384#define MDSS_PP_LM_CFG 0x200
385#define MDSS_PP_WB_CFG 0x300
386#define MDSS_PP_ARG_MASK 0x3C00
387#define MDSS_PP_ARG_NUM 4
388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
389#define MDSS_PP_ARG_SHIFT 10
390#define MDSS_PP_LOCATION_MASK 0x0300
391#define MDSS_PP_LOGICAL_MASK 0x00FF
392#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
394#define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
395#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
396#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
397struct mdp_qseed_cfg {
398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
399 uint32_t table_num;
400 uint32_t ops;
401 uint32_t len;
402 uint32_t *data;
403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
404};
405struct mdp_sharp_cfg {
406 uint32_t flags;
407 uint32_t strength;
408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
409 uint32_t edge_thr;
410 uint32_t smooth_thr;
411 uint32_t noise_thr;
412};
413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
414struct mdp_qseed_cfg_data {
415 uint32_t block;
416 struct mdp_qseed_cfg qseed_data;
417};
418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
419#define MDP_OVERLAY_PP_CSC_CFG 0x1
420#define MDP_OVERLAY_PP_QSEED_CFG 0x2
421#define MDP_OVERLAY_PP_PA_CFG 0x4
422#define MDP_OVERLAY_PP_IGC_CFG 0x8
423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
424#define MDP_OVERLAY_PP_SHARP_CFG 0x10
425#define MDP_OVERLAY_PP_HIST_CFG 0x20
426#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40
427#define MDP_OVERLAY_PP_PA_V2_CFG 0x80
428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
429#define MDP_CSC_FLAG_ENABLE 0x1
430#define MDP_CSC_FLAG_YUV_IN 0x2
431#define MDP_CSC_FLAG_YUV_OUT 0x4
432struct mdp_csc_cfg {
433/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
434 uint32_t flags;
435 uint32_t csc_mv[9];
436 uint32_t csc_pre_bv[3];
437 uint32_t csc_post_bv[3];
438/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
439 uint32_t csc_pre_lv[6];
440 uint32_t csc_post_lv[6];
441};
442struct mdp_csc_cfg_data {
443/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
444 uint32_t block;
445 struct mdp_csc_cfg csc_data;
446};
447struct mdp_pa_cfg {
448/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
449 uint32_t flags;
450 uint32_t hue_adj;
451 uint32_t sat_adj;
452 uint32_t val_adj;
453/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
454 uint32_t cont_adj;
455};
456struct mdp_pa_mem_col_cfg {
457 uint32_t color_adjust_p0;
458/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
459 uint32_t color_adjust_p1;
460 uint32_t hue_region;
461 uint32_t sat_region;
462 uint32_t val_region;
463/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
464};
465#define MDP_SIX_ZONE_LUT_SIZE 384
466struct mdp_pa_v2_data {
467 uint32_t flags;
468/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
469 uint32_t global_hue_adj;
470 uint32_t global_sat_adj;
471 uint32_t global_val_adj;
472 uint32_t global_cont_adj;
473/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
474 struct mdp_pa_mem_col_cfg skin_cfg;
475 struct mdp_pa_mem_col_cfg sky_cfg;
476 struct mdp_pa_mem_col_cfg fol_cfg;
477 uint32_t six_zone_len;
478/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
479 uint32_t six_zone_thresh;
480 uint32_t *six_zone_curve_p0;
481 uint32_t *six_zone_curve_p1;
482};
483/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
484struct mdp_igc_lut_data {
485 uint32_t block;
486 uint32_t len, ops;
487 uint32_t *c0_c1_data;
488/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
489 uint32_t *c2_data;
490};
491struct mdp_histogram_cfg {
492 uint32_t ops;
493/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
494 uint32_t block;
495 uint8_t frame_cnt;
496 uint8_t bit_mask;
497 uint16_t num_bins;
498/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
499};
500struct mdp_hist_lut_data {
501 uint32_t block;
502 uint32_t ops;
503/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
504 uint32_t len;
505 uint32_t *data;
506};
507struct mdp_overlay_pp_params {
508/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
509 uint32_t config_ops;
510 struct mdp_csc_cfg csc_cfg;
511 struct mdp_qseed_cfg qseed_cfg[2];
512 struct mdp_pa_cfg pa_cfg;
513/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
514 struct mdp_pa_v2_data pa_v2_cfg;
515 struct mdp_igc_lut_data igc_cfg;
516 struct mdp_sharp_cfg sharp_cfg;
517 struct mdp_histogram_cfg hist_cfg;
518/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
519 struct mdp_hist_lut_data hist_lut_cfg;
520};
521enum mdss_mdp_blend_op {
522 BLEND_OP_NOT_DEFINED = 0,
523/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
524 BLEND_OP_OPAQUE,
525 BLEND_OP_PREMULTIPLIED,
526 BLEND_OP_COVERAGE,
527 BLEND_OP_MAX,
528/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
529};
530#define MAX_PLANES 4
531struct mdp_scale_data {
532 uint8_t enable_pxl_ext;
533/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
534 int init_phase_x[MAX_PLANES];
535 int phase_step_x[MAX_PLANES];
536 int init_phase_y[MAX_PLANES];
537 int phase_step_y[MAX_PLANES];
538/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
539 int num_ext_pxls_left[MAX_PLANES];
540 int num_ext_pxls_right[MAX_PLANES];
541 int num_ext_pxls_top[MAX_PLANES];
542 int num_ext_pxls_btm[MAX_PLANES];
543/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
544 int left_ftch[MAX_PLANES];
545 int left_rpt[MAX_PLANES];
546 int right_ftch[MAX_PLANES];
547 int right_rpt[MAX_PLANES];
548/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
549 int top_rpt[MAX_PLANES];
550 int btm_rpt[MAX_PLANES];
551 int top_ftch[MAX_PLANES];
552 int btm_ftch[MAX_PLANES];
553/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
554 uint32_t roi_w[MAX_PLANES];
555};
556struct mdp_overlay {
557 struct msmfb_img src;
558/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
559 struct mdp_rect src_rect;
560 struct mdp_rect dst_rect;
561 uint32_t z_order;
562 uint32_t is_fg;
563/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
564 uint32_t alpha;
565 uint32_t blend_op;
566 uint32_t transp_mask;
567 uint32_t flags;
568/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
569 uint32_t id;
570 uint8_t priority;
571 uint32_t user_data[6];
572 uint32_t bg_color;
573/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
574 uint8_t horz_deci;
575 uint8_t vert_deci;
576 struct mdp_overlay_pp_params overlay_pp_cfg;
577 struct mdp_scale_data scale;
578/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
579};
580struct msmfb_overlay_3d {
581 uint32_t is_3d;
582 uint32_t width;
583/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
584 uint32_t height;
585};
586struct msmfb_overlay_blt {
587 uint32_t enable;
588/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
589 uint32_t offset;
590 uint32_t width;
591 uint32_t height;
592 uint32_t bpp;
593/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
594};
595struct mdp_histogram {
596 uint32_t frame_cnt;
597 uint32_t bin_cnt;
598/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
599 uint32_t *r;
600 uint32_t *g;
601 uint32_t *b;
602};
603/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
604#define MISR_CRC_BATCH_SIZE 32
605enum {
606 DISPLAY_MISR_EDP,
607 DISPLAY_MISR_DSI0,
608/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
609 DISPLAY_MISR_DSI1,
610 DISPLAY_MISR_HDMI,
611 DISPLAY_MISR_LCDC,
612 DISPLAY_MISR_MDP,
613/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
614 DISPLAY_MISR_ATV,
615 DISPLAY_MISR_DSI_CMD,
616 DISPLAY_MISR_MAX
617};
618/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
619enum {
620 MISR_OP_NONE,
621 MISR_OP_SFM,
622 MISR_OP_MFM,
623/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
624 MISR_OP_BM,
625 MISR_OP_MAX
626};
627struct mdp_misr {
628/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
629 uint32_t block_id;
630 uint32_t frame_count;
631 uint32_t crc_op_mode;
632 uint32_t crc_value[MISR_CRC_BATCH_SIZE];
633/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
634};
635enum {
636 MDP_BLOCK_RESERVED = 0,
637 MDP_BLOCK_OVERLAY_0,
638/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
639 MDP_BLOCK_OVERLAY_1,
640 MDP_BLOCK_VG_1,
641 MDP_BLOCK_VG_2,
642 MDP_BLOCK_RGB_1,
643/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
644 MDP_BLOCK_RGB_2,
645 MDP_BLOCK_DMA_P,
646 MDP_BLOCK_DMA_S,
647 MDP_BLOCK_DMA_E,
648/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
649 MDP_BLOCK_OVERLAY_2,
650 MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
651 MDP_LOGICAL_BLOCK_DISP_1,
652 MDP_LOGICAL_BLOCK_DISP_2,
653/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
654 MDP_BLOCK_MAX,
655};
656struct mdp_histogram_start_req {
657 uint32_t block;
658/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
659 uint8_t frame_cnt;
660 uint8_t bit_mask;
661 uint16_t num_bins;
662};
663/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
664struct mdp_histogram_data {
665 uint32_t block;
666 uint32_t bin_cnt;
667 uint32_t *c0;
668/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
669 uint32_t *c1;
670 uint32_t *c2;
671 uint32_t *extra_info;
672};
673/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
674struct mdp_pcc_coeff {
675 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
676};
677struct mdp_pcc_cfg_data {
678/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
679 uint32_t block;
680 uint32_t ops;
681 struct mdp_pcc_coeff r, g, b;
682};
683/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
684#define MDP_GAMUT_TABLE_NUM 8
685enum {
686 mdp_lut_igc,
687 mdp_lut_pgc,
688/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
689 mdp_lut_hist,
690 mdp_lut_max,
691};
692struct mdp_ar_gc_lut_data {
693/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
694 uint32_t x_start;
695 uint32_t slope;
696 uint32_t offset;
697};
698/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
699struct mdp_pgc_lut_data {
700 uint32_t block;
701 uint32_t flags;
702 uint8_t num_r_stages;
703/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
704 uint8_t num_g_stages;
705 uint8_t num_b_stages;
706 struct mdp_ar_gc_lut_data *r_data;
707 struct mdp_ar_gc_lut_data *g_data;
708/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
709 struct mdp_ar_gc_lut_data *b_data;
710};
711struct mdp_lut_cfg_data {
712 uint32_t lut_type;
713/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
714 union {
715 struct mdp_igc_lut_data igc_lut_data;
716 struct mdp_pgc_lut_data pgc_lut_data;
717 struct mdp_hist_lut_data hist_lut_data;
718/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
719 } data;
720};
721struct mdp_bl_scale_data {
722 uint32_t min_lvl;
723/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
724 uint32_t scale;
725};
726struct mdp_pa_cfg_data {
727 uint32_t block;
728/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
729 struct mdp_pa_cfg pa_data;
730};
731struct mdp_pa_v2_cfg_data {
732 uint32_t block;
733/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
734 struct mdp_pa_v2_data pa_v2_data;
735};
736struct mdp_dither_cfg_data {
737 uint32_t block;
738/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
739 uint32_t flags;
740 uint32_t g_y_depth;
741 uint32_t r_cr_depth;
742 uint32_t b_cb_depth;
743/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
744};
745struct mdp_gamut_cfg_data {
746 uint32_t block;
747 uint32_t flags;
748/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
749 uint32_t gamut_first;
750 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
751 uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
752 uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
753/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
754 uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
755};
756struct mdp_calib_config_data {
757 uint32_t ops;
758/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
759 uint32_t addr;
760 uint32_t data;
761};
762struct mdp_calib_config_buffer {
763/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
764 uint32_t ops;
765 uint32_t size;
766 uint32_t *buffer;
767};
768/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
769struct mdp_calib_dcm_state {
770 uint32_t ops;
771 uint32_t dcm_state;
772};
773/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
774enum {
775 DCM_UNINIT,
776 DCM_UNBLANK,
777 DCM_ENTER,
778/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
779 DCM_EXIT,
780 DCM_BLANK,
781 DTM_ENTER,
782 DTM_EXIT,
783/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
784};
785#define MDSS_PP_SPLIT_LEFT_ONLY 0x10000000
786#define MDSS_PP_SPLIT_RIGHT_ONLY 0x20000000
787#define MDSS_PP_SPLIT_MASK 0x30000000
788/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
789#define MDSS_MAX_BL_BRIGHTNESS 255
790#define AD_BL_LIN_LEN 256
791#define AD_BL_ATT_LUT_LEN 33
792#define MDSS_AD_MODE_AUTO_BL 0x0
793/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
794#define MDSS_AD_MODE_AUTO_STR 0x1
795#define MDSS_AD_MODE_TARG_STR 0x3
796#define MDSS_AD_MODE_MAN_STR 0x7
797#define MDSS_AD_MODE_CALIB 0xF
798/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
799#define MDP_PP_AD_INIT 0x10
800#define MDP_PP_AD_CFG 0x20
801struct mdss_ad_init {
802 uint32_t asym_lut[33];
803/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
804 uint32_t color_corr_lut[33];
805 uint8_t i_control[2];
806 uint16_t black_lvl;
807 uint16_t white_lvl;
808/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
809 uint8_t var;
810 uint8_t limit_ampl;
811 uint8_t i_dither;
812 uint8_t slope_max;
813/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
814 uint8_t slope_min;
815 uint8_t dither_ctl;
816 uint8_t format;
817 uint8_t auto_size;
818/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
819 uint16_t frame_w;
820 uint16_t frame_h;
821 uint8_t logo_v;
822 uint8_t logo_h;
823/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
824 uint32_t alpha;
825 uint32_t alpha_base;
826 uint32_t bl_lin_len;
827 uint32_t bl_att_len;
828/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
829 uint32_t *bl_lin;
830 uint32_t *bl_lin_inv;
831 uint32_t *bl_att_lut;
832};
833/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
834#define MDSS_AD_BL_CTRL_MODE_EN 1
835#define MDSS_AD_BL_CTRL_MODE_DIS 0
836struct mdss_ad_cfg {
837 uint32_t mode;
838/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
839 uint32_t al_calib_lut[33];
840 uint16_t backlight_min;
841 uint16_t backlight_max;
842 uint16_t backlight_scale;
843/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
844 uint16_t amb_light_min;
845 uint16_t filter[2];
846 uint16_t calib[4];
847 uint8_t strength_limit;
848/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
849 uint8_t t_filter_recursion;
850 uint16_t stab_itr;
851 uint32_t bl_ctrl_mode;
852};
853/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
854struct mdss_ad_init_cfg {
855 uint32_t ops;
856 union {
857 struct mdss_ad_init init;
858/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
859 struct mdss_ad_cfg cfg;
860 } params;
861};
862struct mdss_ad_input {
863/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
864 uint32_t mode;
865 union {
866 uint32_t amb_light;
867 uint32_t strength;
868/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
869 uint32_t calib_bl;
870 } in;
871 uint32_t output;
872};
873/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
874#define MDSS_CALIB_MODE_BL 0x1
875struct mdss_calib_cfg {
876 uint32_t ops;
877 uint32_t calib_mask;
878/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
879};
880enum {
881 mdp_op_pcc_cfg,
882 mdp_op_csc_cfg,
883/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
884 mdp_op_lut_cfg,
885 mdp_op_qseed_cfg,
886 mdp_bl_scale_cfg,
887 mdp_op_pa_cfg,
888/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
889 mdp_op_pa_v2_cfg,
890 mdp_op_dither_cfg,
891 mdp_op_gamut_cfg,
892 mdp_op_calib_cfg,
893/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
894 mdp_op_ad_cfg,
895 mdp_op_ad_input,
896 mdp_op_calib_mode,
897 mdp_op_calib_buffer,
898/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
899 mdp_op_calib_dcm_state,
900 mdp_op_max,
901};
902enum {
903/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
904 WB_FORMAT_NV12,
905 WB_FORMAT_RGB_565,
906 WB_FORMAT_RGB_888,
907 WB_FORMAT_xRGB_8888,
908/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
909 WB_FORMAT_ARGB_8888,
910 WB_FORMAT_BGRA_8888,
911 WB_FORMAT_BGRX_8888,
912 WB_FORMAT_ARGB_8888_INPUT_ALPHA
913/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
914};
915struct msmfb_mdp_pp {
916 uint32_t op;
917 union {
918/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
919 struct mdp_pcc_cfg_data pcc_cfg_data;
920 struct mdp_csc_cfg_data csc_cfg_data;
921 struct mdp_lut_cfg_data lut_cfg_data;
922 struct mdp_qseed_cfg_data qseed_cfg_data;
923/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
924 struct mdp_bl_scale_data bl_scale_data;
925 struct mdp_pa_cfg_data pa_cfg_data;
926 struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
927 struct mdp_dither_cfg_data dither_cfg_data;
928/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
929 struct mdp_gamut_cfg_data gamut_cfg_data;
930 struct mdp_calib_config_data calib_cfg;
931 struct mdss_ad_init_cfg ad_init_cfg;
932 struct mdss_calib_cfg mdss_calib_cfg;
933/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
934 struct mdss_ad_input ad_input;
935 struct mdp_calib_config_buffer calib_buffer;
936 struct mdp_calib_dcm_state calib_dcm;
937 } data;
938/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
939};
940#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
941enum {
942 metadata_op_none,
943/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
944 metadata_op_base_blend,
945 metadata_op_frame_rate,
946 metadata_op_vic,
947 metadata_op_wb_format,
948/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
949 metadata_op_wb_secure,
950 metadata_op_get_caps,
951 metadata_op_crc,
952 metadata_op_max
953/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
954};
955struct mdp_blend_cfg {
956 uint32_t is_premultiplied;
957};
958/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
959struct mdp_mixer_cfg {
960 uint32_t writeback_format;
961 uint32_t alpha;
962};
963/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
964struct mdss_hw_caps {
965 uint32_t mdp_rev;
966 uint8_t rgb_pipes;
967 uint8_t vig_pipes;
968/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
969 uint8_t dma_pipes;
970 uint8_t max_smp_cnt;
971 uint8_t smp_per_pipe;
972 uint32_t features;
973/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
974};
975struct msmfb_metadata {
976 uint32_t op;
977 uint32_t flags;
978/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
979 union {
980 struct mdp_misr misr_request;
981 struct mdp_blend_cfg blend_cfg;
982 struct mdp_mixer_cfg mixer_cfg;
983/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
984 uint32_t panel_frame_rate;
985 uint32_t video_info_code;
986 struct mdss_hw_caps caps;
987 uint8_t secure_en;
988/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
989 } data;
990};
991#define MDP_MAX_FENCE_FD 32
992#define MDP_BUF_SYNC_FLAG_WAIT 1
993/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
994#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10
995struct mdp_buf_sync {
996 uint32_t flags;
997 uint32_t acq_fen_fd_cnt;
998/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
999 uint32_t session_id;
1000 int *acq_fen_fd;
1001 int *rel_fen_fd;
1002 int *retire_fen_fd;
1003/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1004};
1005struct mdp_async_blit_req_list {
1006 struct mdp_buf_sync sync;
1007 uint32_t count;
1008/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1009 struct mdp_blit_req req[];
1010};
1011#define MDP_DISPLAY_COMMIT_OVERLAY 1
1012struct mdp_display_commit {
1013/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1014 uint32_t flags;
1015 uint32_t wait_for_finish;
1016 struct fb_var_screeninfo var;
1017 struct mdp_rect l_roi;
1018/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1019 struct mdp_rect r_roi;
1020};
1021struct mdp_overlay_list {
1022 uint32_t num_overlays;
1023/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1024 struct mdp_overlay **overlay_list;
1025 uint32_t flags;
1026 uint32_t processed_overlays;
1027};
1028/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1029struct mdp_page_protection {
1030 uint32_t page_protection;
1031};
1032struct mdp_mixer_info {
1033/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1034 int pndx;
1035 int pnum;
1036 int ptype;
1037 int mixer_num;
1038/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1039 int z_order;
1040};
1041#define MAX_PIPE_PER_MIXER 4
1042struct msmfb_mixer_info_req {
1043/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1044 int mixer_num;
1045 int cnt;
1046 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
1047};
1048/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1049struct msmfb_secure_config {
1050 uint8_t enable;
1051 uint32_t fd;
1052};
1053/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1054struct msmfb_reg_access {
1055 uint8_t address;
1056 uint8_t use_hs_mode;
1057 size_t buffer_size;
1058/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1059 void __user *buffer;
1060};
1061enum {
1062 DISPLAY_SUBSYSTEM_ID,
1063/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1064 ROTATOR_SUBSYSTEM_ID,
1065};
1066enum {
1067 MDP_IOMMU_DOMAIN_CP,
1068/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1069 MDP_IOMMU_DOMAIN_NS,
1070};
1071enum {
1072 MDP_WRITEBACK_MIRROR_OFF,
1073/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1074 MDP_WRITEBACK_MIRROR_ON,
1075 MDP_WRITEBACK_MIRROR_PAUSE,
1076 MDP_WRITEBACK_MIRROR_RESUME,
1077};
1078/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
1079#endif
1080