1/* 2 * Copyright (C) 2010 The Android Open Source Project 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28#ifndef CPU_FEATURES_H 29#define CPU_FEATURES_H 30 31#include <sys/cdefs.h> 32#include <stdint.h> 33 34__BEGIN_DECLS 35 36/* A list of valid values returned by android_getCpuFamily(). 37 * They describe the CPU Architecture of the current process. 38 */ 39typedef enum { 40 ANDROID_CPU_FAMILY_UNKNOWN = 0, 41 ANDROID_CPU_FAMILY_ARM, 42 ANDROID_CPU_FAMILY_X86, 43 ANDROID_CPU_FAMILY_MIPS, 44 ANDROID_CPU_FAMILY_ARM64, 45 ANDROID_CPU_FAMILY_X86_64, 46 ANDROID_CPU_FAMILY_MIPS64, 47 48 ANDROID_CPU_FAMILY_MAX /* do not remove */ 49 50} AndroidCpuFamily; 51 52/* Return the CPU family of the current process. 53 * 54 * Note that this matches the bitness of the current process. I.e. when 55 * running a 32-bit binary on a 64-bit capable CPU, this will return the 56 * 32-bit CPU family value. 57 */ 58extern AndroidCpuFamily android_getCpuFamily(void); 59 60/* Return a bitmap describing a set of optional CPU features that are 61 * supported by the current device's CPU. The exact bit-flags returned 62 * depend on the value returned by android_getCpuFamily(). See the 63 * documentation for the ANDROID_CPU_*_FEATURE_* flags below for details. 64 */ 65extern uint64_t android_getCpuFeatures(void); 66 67/* The list of feature flags for ANDROID_CPU_FAMILY_ARM that can be 68 * recognized by the library (see note below for 64-bit ARM). Value details 69 * are: 70 * 71 * VFPv2: 72 * CPU supports the VFPv2 instruction set. Many, but not all, ARMv6 CPUs 73 * support these instructions. VFPv2 is a subset of VFPv3 so this will 74 * be set whenever VFPv3 is set too. 75 * 76 * ARMv7: 77 * CPU supports the ARMv7-A basic instruction set. 78 * This feature is mandated by the 'armeabi-v7a' ABI. 79 * 80 * VFPv3: 81 * CPU supports the VFPv3-D16 instruction set, providing hardware FPU 82 * support for single and double precision floating point registers. 83 * Note that only 16 FPU registers are available by default, unless 84 * the D32 bit is set too. This feature is also mandated by the 85 * 'armeabi-v7a' ABI. 86 * 87 * VFP_D32: 88 * CPU VFP optional extension that provides 32 FPU registers, 89 * instead of 16. Note that ARM mandates this feature is the 'NEON' 90 * feature is implemented by the CPU. 91 * 92 * NEON: 93 * CPU FPU supports "ARM Advanced SIMD" instructions, also known as 94 * NEON. Note that this mandates the VFP_D32 feature as well, per the 95 * ARM Architecture specification. 96 * 97 * VFP_FP16: 98 * Half-width floating precision VFP extension. If set, the CPU 99 * supports instructions to perform floating-point operations on 100 * 16-bit registers. This is part of the VFPv4 specification, but 101 * not mandated by any Android ABI. 102 * 103 * VFP_FMA: 104 * Fused multiply-accumulate VFP instructions extension. Also part of 105 * the VFPv4 specification, but not mandated by any Android ABI. 106 * 107 * NEON_FMA: 108 * Fused multiply-accumulate NEON instructions extension. Optional 109 * extension from the VFPv4 specification, but not mandated by any 110 * Android ABI. 111 * 112 * IDIV_ARM: 113 * Integer division available in ARM mode. Only available 114 * on recent CPUs (e.g. Cortex-A15). 115 * 116 * IDIV_THUMB2: 117 * Integer division available in Thumb-2 mode. Only available 118 * on recent CPUs (e.g. Cortex-A15). 119 * 120 * iWMMXt: 121 * Optional extension that adds MMX registers and operations to an 122 * ARM CPU. This is only available on a few XScale-based CPU designs 123 * sold by Marvell. Pretty rare in practice. 124 * 125 * AES: 126 * CPU supports AES instructions. These instructions are only 127 * available for 32-bit applications running on ARMv8 CPU. 128 * 129 * CRC32: 130 * CPU supports CRC32 instructions. These instructions are only 131 * available for 32-bit applications running on ARMv8 CPU. 132 * 133 * SHA2: 134 * CPU supports SHA2 instructions. These instructions are only 135 * available for 32-bit applications running on ARMv8 CPU. 136 * 137 * SHA1: 138 * CPU supports SHA1 instructions. These instructions are only 139 * available for 32-bit applications running on ARMv8 CPU. 140 * 141 * PMULL: 142 * CPU supports 64-bit PMULL and PMULL2 instructions. These 143 * instructions are only available for 32-bit applications 144 * running on ARMv8 CPU. 145 * 146 * If you want to tell the compiler to generate code that targets one of 147 * the feature set above, you should probably use one of the following 148 * flags (for more details, see technical note at the end of this file): 149 * 150 * -mfpu=vfp 151 * -mfpu=vfpv2 152 * These are equivalent and tell GCC to use VFPv2 instructions for 153 * floating-point operations. Use this if you want your code to 154 * run on *some* ARMv6 devices, and any ARMv7-A device supported 155 * by Android. 156 * 157 * Generated code requires VFPv2 feature. 158 * 159 * -mfpu=vfpv3-d16 160 * Tell GCC to use VFPv3 instructions (using only 16 FPU registers). 161 * This should be generic code that runs on any CPU that supports the 162 * 'armeabi-v7a' Android ABI. Note that no ARMv6 CPU supports this. 163 * 164 * Generated code requires VFPv3 feature. 165 * 166 * -mfpu=vfpv3 167 * Tell GCC to use VFPv3 instructions with 32 FPU registers. 168 * Generated code requires VFPv3|VFP_D32 features. 169 * 170 * -mfpu=neon 171 * Tell GCC to use VFPv3 instructions with 32 FPU registers, and 172 * also support NEON intrinsics (see <arm_neon.h>). 173 * Generated code requires VFPv3|VFP_D32|NEON features. 174 * 175 * -mfpu=vfpv4-d16 176 * Generated code requires VFPv3|VFP_FP16|VFP_FMA features. 177 * 178 * -mfpu=vfpv4 179 * Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32 features. 180 * 181 * -mfpu=neon-vfpv4 182 * Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32|NEON|NEON_FMA 183 * features. 184 * 185 * -mcpu=cortex-a7 186 * -mcpu=cortex-a15 187 * Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32| 188 * NEON|NEON_FMA|IDIV_ARM|IDIV_THUMB2 189 * This flag implies -mfpu=neon-vfpv4. 190 * 191 * -mcpu=iwmmxt 192 * Allows the use of iWMMXt instrinsics with GCC. 193 * 194 * IMPORTANT NOTE: These flags should only be tested when 195 * android_getCpuFamily() returns ANDROID_CPU_FAMILY_ARM, i.e. this is a 196 * 32-bit process. 197 * 198 * When running a 64-bit ARM process on an ARMv8 CPU, 199 * android_getCpuFeatures() will return a different set of bitflags 200 */ 201enum { 202 ANDROID_CPU_ARM_FEATURE_ARMv7 = (1 << 0), 203 ANDROID_CPU_ARM_FEATURE_VFPv3 = (1 << 1), 204 ANDROID_CPU_ARM_FEATURE_NEON = (1 << 2), 205 ANDROID_CPU_ARM_FEATURE_LDREX_STREX = (1 << 3), 206 ANDROID_CPU_ARM_FEATURE_VFPv2 = (1 << 4), 207 ANDROID_CPU_ARM_FEATURE_VFP_D32 = (1 << 5), 208 ANDROID_CPU_ARM_FEATURE_VFP_FP16 = (1 << 6), 209 ANDROID_CPU_ARM_FEATURE_VFP_FMA = (1 << 7), 210 ANDROID_CPU_ARM_FEATURE_NEON_FMA = (1 << 8), 211 ANDROID_CPU_ARM_FEATURE_IDIV_ARM = (1 << 9), 212 ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 = (1 << 10), 213 ANDROID_CPU_ARM_FEATURE_iWMMXt = (1 << 11), 214 ANDROID_CPU_ARM_FEATURE_AES = (1 << 12), 215 ANDROID_CPU_ARM_FEATURE_PMULL = (1 << 13), 216 ANDROID_CPU_ARM_FEATURE_SHA1 = (1 << 14), 217 ANDROID_CPU_ARM_FEATURE_SHA2 = (1 << 15), 218 ANDROID_CPU_ARM_FEATURE_CRC32 = (1 << 16), 219}; 220 221/* The bit flags corresponding to the output of android_getCpuFeatures() 222 * when android_getCpuFamily() returns ANDROID_CPU_FAMILY_ARM64. Value details 223 * are: 224 * 225 * FP: 226 * CPU has Floating-point unit. 227 * 228 * ASIMD: 229 * CPU has Advanced SIMD unit. 230 * 231 * AES: 232 * CPU supports AES instructions. 233 * 234 * CRC32: 235 * CPU supports CRC32 instructions. 236 * 237 * SHA2: 238 * CPU supports SHA2 instructions. 239 * 240 * SHA1: 241 * CPU supports SHA1 instructions. 242 * 243 * PMULL: 244 * CPU supports 64-bit PMULL and PMULL2 instructions. 245 */ 246enum { 247 ANDROID_CPU_ARM64_FEATURE_FP = (1 << 0), 248 ANDROID_CPU_ARM64_FEATURE_ASIMD = (1 << 1), 249 ANDROID_CPU_ARM64_FEATURE_AES = (1 << 2), 250 ANDROID_CPU_ARM64_FEATURE_PMULL = (1 << 3), 251 ANDROID_CPU_ARM64_FEATURE_SHA1 = (1 << 4), 252 ANDROID_CPU_ARM64_FEATURE_SHA2 = (1 << 5), 253 ANDROID_CPU_ARM64_FEATURE_CRC32 = (1 << 6), 254}; 255 256/* The bit flags corresponding to the output of android_getCpuFeatures() 257 * when android_getCpuFamily() returns ANDROID_CPU_FAMILY_X86 or 258 * ANDROID_CPU_FAMILY_X86_64. 259 */ 260enum { 261 ANDROID_CPU_X86_FEATURE_SSSE3 = (1 << 0), 262 ANDROID_CPU_X86_FEATURE_POPCNT = (1 << 1), 263 ANDROID_CPU_X86_FEATURE_MOVBE = (1 << 2), 264 ANDROID_CPU_X86_FEATURE_SSE4_1 = (1 << 3), 265 ANDROID_CPU_X86_FEATURE_SSE4_2 = (1 << 4), 266}; 267 268/* The bit flags corresponding to the output of android_getCpuFeatures() 269 * when android_getCpuFamily() returns ANDROID_CPU_FAMILY_MIPS 270 * or ANDROID_CPU_FAMILY_MIPS64. Values are: 271 * 272 * R6: 273 * CPU executes MIPS Release 6 instructions natively, and 274 * supports obsoleted R1..R5 instructions only via kernel traps. 275 * 276 * MSA: 277 * CPU supports Mips SIMD Architecture instructions. 278 */ 279enum { 280 ANDROID_CPU_MIPS_FEATURE_R6 = (1 << 0), 281 ANDROID_CPU_MIPS_FEATURE_MSA = (1 << 1), 282}; 283 284 285/* Return the number of CPU cores detected on this device. */ 286extern int android_getCpuCount(void); 287 288/* The following is used to force the CPU count and features 289 * mask in sandboxed processes. Under 4.1 and higher, these processes 290 * cannot access /proc, which is the only way to get information from 291 * the kernel about the current hardware (at least on ARM). 292 * 293 * It _must_ be called only once, and before any android_getCpuXXX 294 * function, any other case will fail. 295 * 296 * This function return 1 on success, and 0 on failure. 297 */ 298extern int android_setCpu(int cpu_count, 299 uint64_t cpu_features); 300 301#ifdef __arm__ 302/* Retrieve the ARM 32-bit CPUID value from the kernel. 303 * Note that this cannot work on sandboxed processes under 4.1 and 304 * higher, unless you called android_setCpuArm() before. 305 */ 306extern uint32_t android_getCpuIdArm(void); 307 308/* An ARM-specific variant of android_setCpu() that also allows you 309 * to set the ARM CPUID field. 310 */ 311extern int android_setCpuArm(int cpu_count, 312 uint64_t cpu_features, 313 uint32_t cpu_id); 314#endif 315 316__END_DECLS 317 318#endif /* CPU_FEATURES_H */ 319