| 861d7af1cb33483902796f5b29ce496e4a322e94 |
|
17-Jan-2017 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use a bitmask-based loop in si_decompress_textures
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| a131dacb1443039b284aef3ba0a47e2ba20a13a6 |
|
13-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add CP DMA flags for greater control over synchronization
for L2 prefetch
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| c81a89f66277fe7d9cb2353f39ccdae31efe2a12 |
|
10-Dec-2016 |
Grazvydas Ignotas <notasas@gmail.com> |
radeonsi: fix release build unused variable warnings
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f2b0c66c3c012023433874b6e28f8cc8c3f64139 |
|
02-Dec-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: properly declare context sampler states
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 72d1669ed2e943998324db48068936351cf9f9c1 |
|
11-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: check for !is_linear in do_hardware_msaa_resolve
We don't want opt4Space here.
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 00baaa4752ab7e721218a2840cf0952d8c7c6eca |
|
03-Nov-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix an assertion failure in si_decompress_sampler_color_textures
This fixes a crash in Deus Ex: Mankind Divided. Release builds were
unaffected, so it's not too serious.
Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7786f8c63564f1eb421a8636cdbd15c471ec8632 |
|
27-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: add enum radeon_micro_mode
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| bf4d102ea3419ade6759bf9c3ad9d40c7f9b3c27 |
|
26-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: add radeon_surf::is_linear
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| c66a550385b4937b2aaba8484aeaa41cf77399b7 |
|
26-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: don't call u_format helpers if we have that info already
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 692f2640ab0c4c923a5ba12ff8526d2d1a3eefb1 |
|
26-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levels
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| d4d9ec55c589156df4edc227a86b4a8c41048d58 |
|
11-Oct-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement TC-compatible HTILE
so that decompress blits aren't needed and depth texturing needs less
memory bandwidth.
Z16 and Z24 are promoted to Z32_FLOAT by the driver, because TC-compatible
HTILE only supports Z32_FLOAT. This doubles memory footprint for Z16.
The format promotion is not visible to state trackers.
This is part of TC-compatible renderbuffer compression, which has 3 parts:
DCC, HTILE, FMASK. Only TC-compatible FMASK compression is missing now.
I don't see a measurable increase in performance though.
(I tested Talos Principle and DiRT: Showdown, the latter is improved by
0.5%, which is almost noise, and it originally used layered Z16,
so at least we know that Z16 promoted to Z32F isn't slower now)
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 21de3be8e62b2b093569a99550e6356ed2f106b4 |
|
22-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: fix texture format reinterpretation with DCC
DCC is limited in how texture formats can be reinterpreted using texture
views. If we get a view format that is incompatible with the initial
texture format with respect to DCC, disable DCC.
There is a new piglit which tests all format combinations.
What works and what doesn't was deduced by looking at the piglit failures.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 5ee3cac1380fec6971e9d25267589a586da0ecd8 |
|
18-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: increase performance for DRI PRIME offloading if 2nd GPU is CIK or VI
SDMA is much faster for tiled->linear blits from VRAM to GTT.
I have Bonaire in my second PCIe slot.
$ glxinfo | grep OpenGL.renderer
OpenGL renderer string: Gallium 0.4 on AMD TONGA ...
$ DRI_PRIME=1 glxinfo | grep OpenGL.renderer
OpenGL renderer string: Gallium 0.4 on AMD BONAIRE ...
Without SDMA:
$ DRI_PRIME=1 glxgears
8796 frames in 5.0 seconds = 1759.074 FPS
8899 frames in 5.0 seconds = 1779.672 FPS
With SDMA:
$ DRI_PRIME=1 glxgears
12765 frames in 5.0 seconds = 2552.788 FPS
12888 frames in 5.0 seconds = 2577.495 FPS
The 1st GPU is irrelevant. The improvement should be much lower at 60 fps,
but definitely measurable.
SI will get this once we add SDMA blit support for it.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| a6b5845a0d7547198037a2e5ea5c7d3f6f5f9f26 |
|
11-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use current context for DCC feedback-loop decompress, fixes Elemental
This is just a workaround. The problem is described in the code.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96541
v2: say that it's only between the current context and aux_context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7df15389afea467163b8edc09a61bf1f9b3000fa |
|
09-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: handle render_condition_enable for clear_rt/ds
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| a909210131494a6a131855d7d344b61b81fbf40e |
|
09-Aug-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium: add render_condition_enable param to clear_render_target/depth_stencil
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 65d48fcf8c0821365e0e81347894326847039328 |
|
10-Jul-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: silence Coverity warning
Coverity's analysis is too weak to understand that
r600_init_flushed_depth(_, _, NULL) only returns true when
flushed_depth_texture was assigned a non-NULL value.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 1a0a8efccedbbdffb86c77d3f02d95b4b8dc908e |
|
29-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: decompress to flushed depth texture when required
v2: s/dirty_level_mask/stencil_dirty_level_mask/ in stencil case
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 4b7961da770f7a90ab7bbe4ca7dfd0cb1c6a5b43 |
|
30-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: extract DB->CB copy logic into its own function
Also clean up some of the looping.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f2eb34f82f074284b691d568d26426a1f633d5f0 |
|
30-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
gallium/radeon: replace is_flushing_texture with db_compatible
This is a left-over of when I considered generalizing the separate stencil
support. I do prefer the new name since it emphasizes what flushing vs.
non-flushing means from a functional point-of-view, namely special handling
of the texture format.
v2: adjust r600_init_color_surface as well
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 065eeb79f706d10340044447cc5821e64063ea9e |
|
01-Jul-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: correctly mark levels of 3D textures as fully decompressed
Account for the fact that max_layer is minified for higher levels.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 49e3c74cdd0da5abd6cad1fb14af6cc0d85d76c9 |
|
21-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: add a heuristic enabling DCC for scanout surfaces (v2)
DCC for displayable surfaces is allocated in a separate buffer and is
enabled or disabled based on PS invocations from 2 frames ago (to let
queries go idle) and the number of slow clears from the current frame.
At least an equivalent of 5 fullscreen draws or slow clears must be done
to enable DCC. (PS invocations / (width * height) + num_slow_clears >= 5)
Pipeline statistic queries are always active if a color buffer that can
have separate DCC is bound, even if separate DCC is disabled. That means
the window color buffer is always monitored and DCC is enabled only when
the situation is right.
The tracking of per-texture queries in r600_common_context is quite ugly,
but I don't see a better way.
The first fast clear always enables DCC. DCC decompression can disable it.
A later fast clear can enable it again. Enable/disable typically happens
only once per frame.
The impact is expected to be negligible because games usually don't have
a high level of overdraw. DCC usually activates when too much blending
is happening (smoke rendering) or when testing glClear performance and
CMASK isn't supported (Stoney).
v2: rename stuff, add assertions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 3eacbc52d51789f7c58dfe5ca1317962eb9d1a6a |
|
21-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: boolean -> bool, TRUE -> true, FALSE -> false
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 70a25478fec653673569f5fb81170207d68f5112 |
|
10-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use u_blitter for mipmap generation
This reduces time spend in glGenerateMipmap by a half.
v2: don't decompress the levels to be overwritten
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 4eea710b0d050275b532dbc117da97f569e5fb1e |
|
08-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: try to hit direct hw MSAA resolve by changing micro mode in clear
We could also do MSAA resolve in a compute shader like Vulkan and remove
these workarounds.
v2: comment the magic numbers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 373060652c889bb85d5a4673405d77ee75fb6fdc |
|
08-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: clarify the MSAA resolve limitation with scanout
this is the correct hw requirement
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 95288277d5853eff5a52e8cc33610a27ce9241f5 |
|
08-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
Revert "radeonsi: allow direct hw MSAA resolve for scanout surfaces"
This reverts commit ffd54d1936fcd07424265b780e1d049222a01e94.
No, it doesn't work. The test case is "glxgears -samples 2".
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7c6e88b6430b3a805f982c7f8b34d1f79a8fc09c |
|
06-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: allow MSAA resolving into a texture that has DCC enabled
Since DCC is enabled almost everywhere now, it's important not to disable
this fast path.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| ffd54d1936fcd07424265b780e1d049222a01e94 |
|
05-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: allow direct hw MSAA resolve for scanout surfaces
No idea why this was disabled, but it works fine.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 4be46c7d9dbeaff9dede941ee6518f68ad0c5f75 |
|
06-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't allocate DCC for the temporary MSAA resolve surface
Allocating it has no effect, but it adds overhead (useless DCC clear).
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| aa7fe7044328039903993dde6edb32b7953ae9b0 |
|
03-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add per-level dcc_enabled flags
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 031b57bc2f4065ed86973900c611dfdad721e41f |
|
03-Jun-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: move enabled_mask out of si_descriptors
This mask is irrelevant for the generic descriptor set handling, and having it
outside simplifies subsequent changes slightly.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 6b449783f6bab09ad9e66723095e4b1038e04ec7 |
|
05-Jun-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use hw MSAA resolve for non-trivial resolves
This improves MSAA resolve performance.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 35818129a676502415a5f502ccd2759646066921 |
|
31-May-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Decompress DCC textures in a render feedback loop.
By using a counter to quickly reject textures that are not
bound to a framebuffer, the performance impact when binding
sampler_views/images is not too large.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| d5882bb0df87aeb94cddc9f00e4105907e35e81f |
|
31-May-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: do GL-compliant integer resolves
The GL spec has been clarified and the new rule says we should just
copy 1 sample. u_blitter does the right thing.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 9983efca769c1ade44c04275e31c7056d6ae2abd |
|
30-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use the hw MSAA resolving if formats are compatible
This allows resolving RGBA into RGBX.
This should improve HL2 Lost Coast performance.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f564b61d33fd8fd23211e1762e2b04c25495b8fd |
|
22-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rework clear_buffer flags
Changes:
- don't flush DB for fast color clears
- don't flush any caches for initial clears
- remove the flag from si_copy_buffer, always assume shader coherency
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7a215a3e274e7c793ab9c015004f5323cf85a50c |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: expclear must be disabled on first Z/S clear
The documentation and the HW team say so.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 01a3bb5d8bcdbcf5b27fadc6299c2d768c5c888a |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: move blend choice out of loop in si_blit_decompress_color
It does not depend on the level or layer.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 450ff0f0d5d603bb36ca3fbd9c871c9e8553baab |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: use level mask for early out in si_blit_decompress_color
Mostly for consistency with the other decompress functions, but note that
in the non-DCC decompress case, the function can now early-out in slightly
more (albeit probably rare) cases.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 0ff05b55c62d0a809f3beb46ac587d4952ded59a |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: si_blit_decompress_depth is only used for staging
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 0b70fc2db4555fb572fcb3695bf570f4720dbb81 |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: only decompress the required ZS planes from si_blit
This happens to "fix" a rendering bug in KotOR2, because it avoids a still
not quite understood bug with MSAA fast stencil clear decompress. For the
stencil clear bug, I have sent a piglit test (arb_texture_multisample-stencil-clear).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93767
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| def53a0b3dd5e66f556b29fba06f55ff7f8b0a0e |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: decompress Z & S planes in one pass
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| dc6fc2f390300dbd78cb29eed8a545908588b441 |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: early out of si_blit_decompress_depth_in_place based on dirty mask
Avoid dirtying the db_render_state atom when possible.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| d14d6c3f583d1e543945f7f4a38cfcbb823506ce |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: use MIN2 instead of expanded ?: operator
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 159f182a5728338cff2362a3edf2aad1dc0d35e0 |
|
22-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: fix brace style
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 3acaefb1bbf329059ab7e8d1ffa2b99b516e0f50 |
|
19-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: shorten slot masks to 32 bits
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 061ce9399a08f3edd4f5af16afd36bb14d58c864 |
|
19-Mar-2016 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: split texture decompression for compute shaders
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 2ca5566ed7847f5a56d055fd6530382c55012663 |
|
10-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move scissor and viewport states into gallium/radeon
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f3eebb84ebd4c1dd7bd9b69b0b65273635443740 |
|
07-Apr-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement and rely on set_active_query_state
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 9d2693f58ad27464aabf556e7d6bd4c4eb0fd591 |
|
06-Apr-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: expand the compressed color and depth texture masks to 64 bits
This is in preparation of raising the number of exposed sampler views to 32
bits, which will raise the total number of sampler views to 33 for the
polygon stipple texture. That texture should never be compressed (and it's
certainly not a depth texture), but this approach seems cleaner to me than
special-casing the last slot in all affected code paths.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 515fb2c09c51ada05db80a3ee337bc7265edfdd3 |
|
08-Feb-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: decompress shader images
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 59c5508b9ab357c47aa07dfec6d74fec9d0843aa |
|
09-Mar-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: update compressed_colortex_masks when a cmask is created or disabled
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| da68a9b21501f4dbff6789362aec40f5221425c9 |
|
08-Feb-2016 |
Nicolai Hähnle <nicolai.haehnle@amd.com> |
radeonsi: move si_decompress_textures to si_blit.c
Since it is all about calling into blitter functions, it makes more
sense here. This change also reduces the size of the interfaces between
.c files.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f18fc70d6f62719e4fae2f93f2d563894bc1437f |
|
24-Feb-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: disable DCC on handle export if expecting write access
This should be okay except that sampler views and images are not re-set.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 1e48ec7571cb36b4ee5660f8066c7905a3432969 |
|
21-Oct-2015 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: add DCC decompression (v2)
This is currently not needed but will be necessary when we have
features that do not work with DCC enabled, such as image stores
and sharing non-scanout surfaces.
v2: Marek: rebase, remove decompression from si_flush_resource (not needed)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| b744ac9f44099e1b50d335dc9bdc0950ab7ec374 |
|
21-Feb-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: allocate DCC in the same backing buffer as the texture
To allow sharing textures with DCC enabled.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 970b979da1639d57e89169f96cc0064db9dae43a |
|
01-Mar-2016 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: eliminate fast color clear before sharing
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7aedbbacae6d3ec3d06735fff2eb662964773ad2 |
|
06-Feb-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: put image, fmask, and sampler descriptors into one array
The texture slot is expanded to 16 dwords containing 2 descriptors.
Those can be:
- Image and fmask, or
- Image and sampler state
By carefully choosing the locations, we can put all three into one slot,
with the fmask and sampler state being mutually exclusive.
This improves shaders in 2 ways:
- 2 user SGPRs are unused, shaders can use them as temporary registers now
- each pair of descriptors is always on the same cache line
v2: cosmetic changes: add back v8i32, don't load a sampler state & fmask
at the same time
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f6360de8c02a52e29c2f6f65b94fd981ffd3851f |
|
15-Jan-2016 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use all SPI color formats
because not using SPI_SHADER_32_ABGR doubles fill rate.
We should also get optimal performance if alpha isn't needed or blending
isn't enabled.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 1a24f443b492972eec8f01ffb36d0ae300acd7c8 |
|
10-Dec-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement fast stencil clear
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 6eff5415e46fb43619b543368fa427334d267a71 |
|
07-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
gallium/radeon: simplify disabling render condition for u_blitter
just disable it by not setting the predication bit
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f7757100f22f0d22eb8c9f232915b9d9a28cc781 |
|
03-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add glClearBufferSubData acceleration
8-bit and 16-bit clears which are not aligned to dwords are done in software.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 19773f98055ec6976b5f5c2d0d83245f96206ec4 |
|
06-Nov-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add SI_SAVE_FRAGMENT_STATE blitter flag
Buffer clears via transform feedback won't set this.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| e82c527f1fc2f8ddc64954ecd06b0de3cea92e93 |
|
24-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: allow copying between compatible compressed and uncompressed formats
which is where a block in src maps to a pixel in dst and vice versa.
e.g. DXT1 <-> R32G32_UINT
DXT5 <-> R32G32B32A32_UINT
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 235d38584cd47faa2837cd66ebdc770f295f47c4 |
|
22-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: properly check if DCC is enabled and allocated
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 6529daca391912246c13e6f76e885026d2ce88be |
|
24-Oct-2015 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Implement DCC fast clear.
Uses the DCC buffer instead of the CMASK buffer. The ELIMINATE_FAST_CLEAR
still works. Furthermore, with DCC compression we can directly clear
to a limited set of colors such that we do not need a postprocessing step.
v2 Marek: check dcc_buffer && dirty_level_mask in set_sampler_view
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| bb77467df9863c522c8d8550e295e2ad7bbef37c |
|
21-Oct-2015 |
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> |
radeonsi: Disable operations that do not work with DCC.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| edf6a4537c5febbe38780819df30cbfffc74c329 |
|
22-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only apply the SNORM blit workaround to *8_SNORM
Like the comment says. This fixes DCC, which doesn't like blitting RG16
as RGBA8.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 9b54ce3362f117b4d46497b578211bb26554dd78 |
|
07-Oct-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: support thread-safe shaders shared by multiple contexts
The "current" shader pointer is moved from the CSO to the context, so that
the CSO is mostly immutable.
The only drawback is that the "current" pointer isn't saved when unbinding
a shader and it must be looked up when the shader is bound again.
This is also a prerequisite for multithreaded shader compilation.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| c23c92c965f72f9a0b160834d06a2d631b736081 |
|
06-Sep-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only do depth-only or stencil-only in-place decompression
instead of always doing both.
Usually, only depth is needed, so stencil decompression is useless.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| e21418f221f645397847c867b5f368ad0753e6fe |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert stencil ref state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 74aa64876b54bc2d0088bc9ed2d390eaa2b73349 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: convert sample mask state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 0c2eed0edec877584c9362bd9cb9004ff10a8b91 |
|
29-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: avoid redundant CB and DB register updates
The main idea is to avoid setting CB_COLORi_INFO = 0 for i>0 repeatedly
when those colorbuffers aren't used. This is mainly for glamor.
Same for DB. Z_INFO and STENCIL_INFO need to be cleared only once.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 8a97528b3a97a430a887e9044b938b349585f4ab |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: optimize viewport states
same as scissors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f6a10f60b75821c20ce7cf338b519b92ed0330fc |
|
28-Aug-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: optimize scissor states
- convert 16 states to 1 atom
- only emit 1 scissor if VIEWPORT_INDEX isn't written
- use only one packet when emitting consecutive scissors
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| ab0643225e2718884eea874b67b55eb4aa936e53 |
|
08-Nov-2014 |
Marek Olšák <marek.olsak@amd.com> |
util/u_blitter: implement alpha blending for pipe->blit
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 3206d4ed44e761186fee3c679801e57f8ce923cb |
|
09-Aug-2015 |
Grazvydas Ignotas <notasas@gmail.com> |
gallium/radeon: use helper functions to mark atoms dirty
This is analogous to r300_mark_atom_dirty() used by r300, and will
be used by later patches. For common radeon code, appropriate helper
is called through a function pointer.
No functional changes.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 30509788641a413742098f21a4ee0087b1f86e18 |
|
30-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: copy *8_SNORM bits exactly in resource_copy_region
Disabling the FP16 mode didn't help.
If needed, we can use this trick for blits too, but not for scaled blits.
+ 4 piglits
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f9c4953f99e75e45bc4f0f07315ee643b62b0c23 |
|
28-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: early exit in si_clear if there's nothing to do
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| d1f43a7e5b889b30106c4db55ec1caac1ed6ca4a |
|
18-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add code for creating, binding and destroying tessellation shaders
This doesn't do anything yet.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 46b2b3bda8d962fce02838e09c742ac06fbec45f |
|
16-Jul-2015 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: don't change pipe_resource in resource_copy_region
Copied from r600g. pipe_resource can be shared by multiple threads, so we
shouldn't change it.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7e5064360c03b8dbdd60298b46e1595418c6cea3 |
|
25-Jun-2015 |
Dave Airlie <airlied@redhat.com> |
radeonsi: add support for viewport array (v3)
This isn't pretty and I'd suggest it the pm4 interface builder
could be tweaked to do this more efficently, but I'd need
guidance on how that would look.
This seems to pass the few piglit tests I threw at it.
v2: handle passing layer/viewport index to fragment shader.
fix crash in blit changes,
add support to io_get_unique_index for layer/viewport index
update docs.
v3: avoid looking up viewport index and layer in es (Marek).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| edf18da85dd3b1865c4faaba650a8fa371b7103c |
|
29-Dec-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: only flush the right set of caches for CP DMA operations
That's either framebuffer caches or caches for shader resources.
The motivation is that framebuffer caches need to be flushed very rarely
here.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 884f1654e22c2845b388560b297a7c440a68e594 |
|
16-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move DB registers from draw_vbo into new db_render_state
It's called db_misc_state in r600g.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| d13d2fd16132f351ec7c8184f165faeac3b31bb4 |
|
06-Sep-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: add debug option which forces DMA for copy_region and blit
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| a10c8db715baa8e12f5267ef2fc59dbb7d191f8d |
|
23-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement EXPCLEAR optimization for depth
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 573313c94e6925598edb5769885fb973cf628e11 |
|
23-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement fast depth clear
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 63cb4077e6e7ad761f4aade0095d05d7c06f9f6f |
|
23-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move DB_RENDER_CONTROL into draw_vbo
So that I can add fast depth clear.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| db51ab6d6ada69287dfe3a671ecc1b338917e7aa |
|
18-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use r600_draw_rectangle from r600g
Rectangles are easier than triangles for the rasterizer.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7792f9858b60fd9f9f037f1aa15dd21cba30f2c4 |
|
17-Aug-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: save scissor state and sample mask for u_blitter
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| a9528cef6b6ff4875c9d125a60b7309a2ad24766 |
|
26-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: switch all occurences of array_size to util_max_layer
This fixes 3D texture support in all these cases, because array_size is 1
with 3D textures and depth0 actually contains the "array size".
util_max_layer is universal and returns the last layer index for any texture
target.
A lot of the cases below can't actually be hit with 3D textures, but let's
be consistent.
This fixes a failure in:
piglit layered-rendering/clear-color-all-types 3d single_level
for r600g and radeonsi, which was caused by an incorrect CMASK size
calculation.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 1635ded8287377836b2cc7c8466cb3b3c2c658f4 |
|
18-Jun-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: add support for fine-grained sampler view updates
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| dd46841bc9685b48c972ebe5f5cf92770cf025fd |
|
18-Jun-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move sampler descriptors from IB to memory
Sampler descriptors are now represented by si_descriptors.
This also adds support for fine-grained sampler state updates and
the border color update is now isolated in a separate function.
Border colors have been broken if texturing from multiple shader stages is
used. This patch doesn't change that.
BTW, blitting already makes use of fine-grained state updates.
u_blitter uses 2 textures at most, so we only have to save 2.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
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| ee2a818d3306170ba18f44342aa759c2892a293f |
|
07-Jul-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: rename definitions of shader limits
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 370184e813b25b463ad3dc9ca814231c98b95864 |
|
03-Jul-2014 |
Michel Dänzer <michel.daenzer@amd.com> |
Revert "radeonsi: Use dma_copy when possible for si_blit."
This reverts commit 5d5c20920e0e570742a497aa047e99a2fa3c04f2.
Caused visual corruption, see e.g.
https://bugs.freedesktop.org/show_bug.cgi?id=80827#c1
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 5d5c20920e0e570742a497aa047e99a2fa3c04f2 |
|
28-May-2014 |
Axel Davy <axel.davy@ens.fr> |
radeonsi: Use dma_copy when possible for si_blit.
This improves GLX DRI3 GPU offloading significantly on CPU
bound benchmarks particularly.
No performance impact for DRI2 GPU offloading.
v2: Add missing tests
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák<marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| cf05f9bf016c544fe15b7ac724f78d7524ce61de |
|
04-Jun-2014 |
Grigori Goronzy <greg@chown.ath.cx> |
radeonsi: add sampling of 4:2:2 subsampled textures
This makes 4:2:2 video surfaces work in VDPAU.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| d2261918202697febed0de18f66416e273001088 |
|
02-Jun-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: don't use hardware MSAA resolve if dst is fast-cleared
It doesn't work and our docs say so too.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 0423513c6195c5fbe36462e8818c606731c959a0 |
|
02-Jun-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: BlitFramebuffer should follow render condition
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| a38e1fd78ba406abe6c6dfd665804ec0d8f98172 |
|
06-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: implement fast color clear
This works for both multi-sample and single-sample color buffers.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 6a5499b9d972ee6ef0ffc7e2a867113259985c7b |
|
04-Mar-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: move framebuffer-related state to a new struct si_framebuffer
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 9855477e903e00f7457adb15594048416444b992 |
|
09-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
r600g,radeonsi: consolidate create_surface and surface_destroy
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| b9aa8ed009c22e4ef5df49dc7785f08fd3dbe836 |
|
11-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: inline util_blitter_copy_texture
This will be used for changing texture properties without modifying
pipe_resource like r600g, but not in this series. For now, this change
allows consolidation of pipe_surface functions.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| f7176d700f265ed3c3fdec5a09cbfbe2c93c7e2f |
|
11-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: remove useless psbox variable from resource_copy_region
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 404b29d765e2fe4d2bf80d17063e5672d2d59ca1 |
|
21-Nov-2013 |
Michel Dänzer <michel.daenzer@amd.com> |
radeonsi: Initial geometry shader support
Partly based on the corresponding r600g work by Vadim Girlin and Dave
Airlie.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7209703432ef88daf7ec67b7eeb80577fcb60ef7 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: cleanup includes, add missing license
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 62d55c0a2d96cf482f955bc841006c2ac1e0d867 |
|
22-Jan-2014 |
Marek Olšák <marek.olsak@amd.com> |
radeonsi: use queries from r600g
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 8662e66bf237a820a704df112718be599136098b |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename the commonly occurring rctx/r600 variables.
The "r" stands for R600.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 7b7eb4dd1f94357538da1ad17410ffb59d5bf258 |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si remaining identifiers in si_blit.c.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 45578def716f17e4588c6567a5fb3b6dc9569aec |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for functions in si_pipe.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 280c360c0287608227466c6f366606ef5bd62cfa |
|
07-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for functions in si.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 238aeabce0e5cfd850279a68fe0c816adc175294 |
|
11-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Rename r600->si for structs in si_pipe.h.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|
| 786af2f963925df2c2a6fb60b29a83e8340f03c7 |
|
04-Jan-2014 |
Andreas Hartmetz <ahartmetz@gmail.com> |
radeonsi: Apply si_* file naming scheme.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
/external/mesa3d/src/gallium/drivers/radeonsi/si_blit.c
|