29a7d73c9ceccc56c3b913b0655849702bd0f7fd |
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05-Apr-2017 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Bump the batch space estimate Commit f938354362655a378d474c5f79c52cea9852ab91 recently increased the alignment on vertex buffer data from 32 to 64. This caused us to consume a bit more batch than we were before and we now go over the estimate by a small amount on certain blits on gen8+. This commit bumps then gen8 batch estimate by a bit to compensate. Haswell and older still seems to be well within the limit. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100582 Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit c9c39812b91c8104bc0bea16053312547846249c)
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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04df217ac07847e7f020a180ac2951ed17209645 |
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01-Apr-2017 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Align vertex buffers to 64B Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit f938354362655a378d474c5f79c52cea9852ab91) [Emil Velikov: brw_state_batch has different signature] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/mesa/drivers/dri/i965/genX_blorp_exec.c
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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e7a8f2e908e89877fd98faf1837d350e69cca7de |
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20-Feb-2017 |
Jason Ekstrand <jason.ekstrand@intel.com> |
intel/blorp: Explicitly flush all allocated state Found by inspection. However, I expect it fixes real bugs when using blorp from Vulkan on little-core platforms. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 075ed20614e91110322aadff44dbd4c1ca2422e8)
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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d940b91f947326bba4aeb775c32915208833817b |
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19-Jan-2017 |
Topi Pohjolainen <topi.pohjolainen@intel.com> |
i965/blorp: Add also depth and stencil buffers to render cache v2 (Jason, Curro): Add stencil also even though it is not enabled yet. Cc: 17.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (cherry picked from commit ba6399df9462d78eda2a5de7c2940d8cf9d27f95)
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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9577977266068b1b3666e0265bd0d6dcb1563572 |
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16-Jan-2017 |
Topi Pohjolainen <topi.pohjolainen@intel.com> |
i965/blorp: Make post draw flush more explicit Blits do not need any special treatment as the target buffer object is added to render cache just as one does for normal draw. Color clears and resolves in turn require explicit "end of pipe synchronization". It is not clear what this means exactly but the assumption is that render cache flush with command stream stall should be sufficient. Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 180653c357d19ca88f7895f59874a58fac99cc53)
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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4e6445caa96f66736b47b257a59dc922e31b7cf6 |
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17-Jan-2017 |
Topi Pohjolainen <topi.pohjolainen@intel.com> |
i965/blorp: Use the render cache mechanism instead of explicit flushing by replacing brw_emit_mi_flush() with brw_render_cache_set_check_flush(). The latter splits the flush in two: brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_RENDER_TARGET_FLUSH | PIPE_CONTROL_CS_STALL); brw_emit_pipe_control_flush(brw, PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | PIPE_CONTROL_CONST_CACHE_INVALIDATE); instead of int flags = PIPE_CONTROL_NO_WRITE | PIPE_CONTROL_RENDER_TARGET_FLUSH; if (brw->gen >= 6) { flags |= PIPE_CONTROL_INSTRUCTION_INVALIDATE | PIPE_CONTROL_CONST_CACHE_INVALIDATE | PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL; } brw_emit_pipe_control_flush(brw, flags); v2 (Jason): Check that destination exists before trying to add to render cache. Depth clears and resolves don't have it. Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 4840a53e902b0f2b9841d9dbb90e479a3688153d)
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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7a2b65a1d749fd6dcc31d47205445dabace0d265 |
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15-Jan-2017 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Make BLORP disable the NP Z PMA stall fix. This may fix GPU hangs on Gen8. I don't know if it does though. Cc: mesa-stable@lists.freedesktop.org Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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f03bac1fc7e34aeefc1a6adb11d733b9fda8d3ac |
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02-Jan-2017 |
Iago Toral Quiroga <itoral@igalia.com> |
i965: Make intel_bachbuffer_reloc() take a batchbuffer argument Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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a814e18c96ccc70473103cf08a675265f0d1b3c9 |
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13-Sep-2016 |
Jason Ekstrand <jason@jlekstrand.net> |
intel/blorp: Stop setting 3DSTATE_DRAWING_RECTANGLE The Vulkan driver sets 3DSTATE_DRAWING_RECTANGLE once to MAX_INT x MAX_INT at the GPU initialization time and never sets it again. The GL driver sets it every time the framebuffer changes. Originally, blorp set it to the size of the drawing area but meant we had to set it back in the Vulkan driver. Instead, we can easily just do that in the GL driver's blorp_exec implementation and not set it in blorp core. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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b56f509ee0d6fcf85eb01aecfdcc66fb784fee97 |
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13-Sep-2016 |
Jason Ekstrand <jason@jlekstrand.net> |
intel/blorp: Emit 3DSTATE_MULTISAMPLE directly Previously, we relied on a driver hook for 3DSTATE_MULTISAMPLE. However, now that Vulkan and GL use the same sample positions, we can set up 3DSTATE_MULTISAMPLE directly in blorp and delete the driver hook. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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cb780c9ccf7b7c68943b3e3f4850a60cd4f703e1 |
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24-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
intel/blorp: Rework alloc_binding_table The original blorp_alloc_binding_table helper was supposed to return the binding table offset and map along with the surface state maps. This isn't quite what we want, however. What we really want is the binding table offsets, surface state offsets, and surface state maps. In the GL driver, the binding table map *is* an array of surface state offsets. However, in Vulkan, this isn't quite true as the entries in the binding table are surface state offsets combined with another binding table block offset. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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348509269ead23cb7f953c174d400e6e3d17d723 |
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19-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965: Move blorp into src/intel/blorp At this point, blorp is completely driver agnostic and can be safely moved into its own folder. Soon, we hope to start using it for doing blits in the Vulkan driver. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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8bd35d8bd2bff51b39baf559efd9f3a0e20fd2b0 |
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19-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Remove the remaining brw prefixes from the blorp.h API Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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71dc2e0106f4da2c697ec6ad23fc09e960a63bdf |
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19-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Make blorp_addres::buffer a void* The Vulkan driver doesn't use libdrm so we don't want to bake that in. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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bc159ff0f7364970dbcb4c73d47c57ddb1aa8303 |
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18-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Add an "exec" function pointer to blorp_context Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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cf14b5247869dec60821a86a4698be6d9e417ae3 |
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18-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Move the guts of brw_blorp_exec into genX_blorp_exec.c Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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28ae664e3b12a21c20d8e2c40b14942f35391581 |
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18-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Pull the guts of blorp_exec into a driver-agnostic header Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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9a842c61fe0e8f267072864fd7b916358e21d3f5 |
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17-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp/exec: Refactor to use a new blorp_batch struct This gets rid of brw_context throughout the core of the state setup code. Instead, it is replaced with blorp_batch which contains a pointer to the blorp_context and a void* that the driver can use for its own blorp data. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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4e7bddf8a3ee89852cb6c1e82afc68280864cb93 |
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18-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Add a helper for allocating binding tables and surface states Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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1367af159e6791c230f08ba77311f532f6aede07 |
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18-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Shorten binding table index enum names Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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da2a078deb8e18364c67cf7767169b46bb8634e5 |
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18-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp/genX: Add a blorp_surface_reloc helper Previously, we passed the buffer address (as per the latest offset from the kernel) to ISL to use when it filled out the surface state. We then called drm_intel_bo_emit_reloc() to add the relocation to the list. The newly added blorp_surface_reloc helper adds the relocation to the list and then writes the buffer address directly into the surface state. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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ac08bc8ac220f22333536a9f881fde1e5607148e |
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18-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Use blorp_address in brw_blorp_surface instead of bo+offset Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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33cc1f6bb4a41571d0f8041bf79b37d674f5602c |
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17-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Pull emit_surface_state into genX_blorp_exec.c Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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6d2f8f8f5ff52afd965ff94eab6cd5832a16ca6b |
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17-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Add driver mocs settings to the context Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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9c380b639f47742de1cdaceeb534facc936e3d62 |
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17-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp/genX: Move emit_urb_config into another helper Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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28991c9601f9ad3c4f4e11da44a26c8ee0427021 |
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17-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Use gen6_upload_urb Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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3e4b43d11d5303a84aba79874664cd6514831bb2 |
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17-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp/genX: Pull emit_3dstate_multisample into a helper Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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becd434d14d7227575482803c27516818f55b61e |
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17-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp/genX: Add helpers for allocating various bits of state This pulls most of the brw-specific bits into helpers with generic names. Later, those will become the driver hooks for generic code. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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a9033d1dc1fd7c4701fb5c4402280a530e93a189 |
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20-Aug-2016 |
Matt Turner <mattst88@gmail.com> |
i965: Remove comment within a comment.
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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16a9fcbbb688537ac2e8f952e683d63eb7c688e8 |
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10-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Use genxml for gen8-9 state setup Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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e198983c6119aa93b089d7883a9ec400ba52e7bb |
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09-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Use genxml for gen7 state setup Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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344841fcba83b3b9ac487435d7ef22975c230034 |
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11-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Add genxml-based vertex setup helpers Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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7b035fd0c97939a65825f6e1b467b0d741382bc5 |
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11-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Add a helper for emitting surface states The new helper emits surface states and the binding table in one go. It's nice to have it pulled out of the main blorp_exec function. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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48f13545dd14ea639e51cdcb0482c76e9b2a117c |
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11-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Add genxml-based sampler state emit function Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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eb655c4fc26cb29c6e6d8dc13315f166fb627dc8 |
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11-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965/blorp: Add genxml-based dynamic state emit functions Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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c8bc1ae96a2980f33cf770b909ab9d7e830e95bc |
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08-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965: Move gen6_blorp.c to a file that gets recompiled per-gen At the moment, it's only used for gen6 but that will change soon. We use the genX prefix for recompiled things in the Vulkan driver. It isn't great, but it seems to have worked ok. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/genX_blorp_exec.c
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