| 9a9331faeba996d6c85e6e2a6355ccfc22c6cab6 |
|
09-Dec-2016 |
Rodolph Perfetta <rodolph.perfetta@arm.com> |
Allow conditional inclusion of A32, T32 and A64.
The 'target_arch' option has been replace by 'target' which can be any
combination of aarch32, aarch64, a32, t32, a64.
Change-Id: Id5cd052276747cd718551f562b74f79443b91869
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| e99f34dd95e54fb15605a022309175ed8020bf2c |
|
21-Dec-2016 |
Georgia Kouveli <georgia.kouveli@arm.com> |
Check for unpredictable CLZ.
Change-Id: I2f8799efc32bd2aae3c3d9c604d389511eab8987
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 942e3b7b1d381454c8f17c31c8a3ccbe568512f7 |
|
30-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Add unpredictable conditions for mov.
Change-Id: I193cc0ec2ba3882805496f6d2efb6a73161f98a6
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| b323da089731b39a34ad0a77d20f0a96c1c1a1bc |
|
02-Dec-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Ensure that all used labels are bound.
Change-Id: I95c1a9c2d91c91303ac10898ca556e6e798403e5
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| d17e348e16bf0d6eca4f9ea0e935c7544098d045 |
|
23-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Add unpredictable conditions for ADC_i, ADC_r, ADC_rr, ADD_ADR, ADD_i, ADD_r, ADD_rr, ADD_SP_i, ADD_SP_r, ADR and MOV_i.
Change-Id: I2d0255c352881d855b375db65794ee7f282b1cfe
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 989663e3cb7be8ac458d71f8e8d99afd29b13a39 |
|
24-Nov-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Rename operand-aarch32.{h,cc} to operands-aarch32.{h,cc}
We were inconsistent in naming this file between the AArch64 and AArch32
targets, let's go with what AArch64 calls is and pluralize operand.
Change-Id: Id2581255e4aa398f2c6fa81e5abce1f4b9b8a364
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 39b5e60b78f447c4af8c18f12281ed7ab9c33c82 |
|
18-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Fix assembler for instructions with an operand like [<Rn>, imm].
Change-Id: Iff2f0f8a6bd67886cb8b658b606514a9845796f7
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 9fcf6d6dd240d7f40f187965c981749eb4eaa94b |
|
17-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Fix assembler for instructions with an operand like "[PC, #imm]".
Change-Id: If6a945b9ef2ae08639efe1e85fef9e7d28340c25
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| c0ee83fd133e93d3967d8347ad2bf2a218524348 |
|
18-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Use IsOffset, IsPreIndex and IsPostIndex.
Change-Id: Ib7fd5e55689954c12ce90cf2bb605528a3ea057c
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 7827144797ee5ebfa0b574f45ad8ff235f919304 |
|
08-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Allow a label which is in the veneer pool to be bound with 'bind'.
Change-Id: I1e0d03498ec86ed23d94ef1db2d2adc5b73ef984
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 60241a544be0ebf48347789bf0ec268414364627 |
|
10-Nov-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Specify NOLINT disabled directives.
Remain:
src/aarch32/operand-aarch32.h:207: Operand(float) VIXL_NO_RETURN_IN_DEBUG_MODE { // NOLINT
src/aarch32/operand-aarch32.h:210: Operand(double) VIXL_NO_RETURN_IN_DEBUG_MODE { // NOLINT
which can't be specified due to a linter bug.
Change-Id: I5cf55e18772564363a9d895ef83481381ae96635
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| e42218c6ca969b7d4032da978fb05f06641df100 |
|
19-Oct-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
Make bind and place more consistent.
Change-Id: I1743511e3c6f995f05cded38347a015c198b1fb9
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 3fac43c1a101f98f116e752b80abc122d32b83ac |
|
31-Oct-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Mark methods as `override` when compiling with C++11
This patch introduces a VIXL_OVERRIDE macro. When building with gcc
-std=c++11, we now enable the `-Wsuggest-override` warning so that we do
not forget to add them in the future.
Change-Id: I0f402599019ba9de1a7a654e9499f00a07f00201
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 120cafb9da939e107413e7158897ad73b83d55bf |
|
30-Aug-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Correctly assemble VCLE and VCLT
VCLE and VCLT are aliases for VCGE and VCGT, however the source operands
have to be commuted. The assembler did not do this.
Change-Id: Icfa437ed417d9e234510fcab6034aa983d53e744
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 8ee2cef99dc4fae4129430834d2778d97cb5e076 |
|
12-Sep-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Revert "Correctly assemble VCLE and VCLT"
This reverts commit 702351b9ba0640958e17eed2ee041278294899b1.
Change-Id: Ic625aeecd276ebd582afd60005f8b1b2eea65f55
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 702351b9ba0640958e17eed2ee041278294899b1 |
|
30-Aug-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Correctly assemble VCLE and VCLT
VCLE and VCLT are aliases for VCGE and VCGT, however the source operands
have to be commuted. The assembler did not do this.
Change-Id: Ia660ddce3c7a8aeaaf636b393b1df2b710d37c63
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 8885c17bce593f82cf90c086da242e52943c50ef |
|
24-Aug-2016 |
Vincent Belliard <vincent.belliard@arm.com> |
forbid direct use of assembler from the macro-assembler
Change-Id: Ic00c9c72e9aed7efaab72a6fd6838bbd0bda6531
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 78973f258039f6e96eba85f1b5ecdb14b3c51dbb |
|
10-Aug-2016 |
Pierre Langlois <pierre.langlois@arm.com> |
Correctly include C headers
This patch refactors VIXL to use `extern` block when including C header
that do not have a C++ counterpart.
Change-Id: I203d7d107755dbac3e5f4cf8d2f196f70dea1e07
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| 10dae1a549308bddc1931f29754d6a4459f70c9b |
|
27-Jul-2016 |
Jacob Bramley <jacob.bramley@arm.com> |
AArch32: Improve the API for selecting the ISA.
Specifically, replace SetT32(false) with SetA32(), and SetT32(true) with
SetT32(). This also adds a parameterised SetInstructionSet(...) helper, and
allows the instruction set to be set in the constructors.
Change-Id: I82609823a4b2af908b38c0a4240ff239561f7507
/external/vixl/src/aarch32/assembler-aarch32.cc
|
| d3832965c62a8ad461b9ea9eb0994ca6b0a3da2c |
|
04-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Update naming to `aarch32` and `aarch64`.
Change-Id: I40a929b1095ee3e1b2ca5ef879c7006d8b59acc9
/external/vixl/src/aarch32/assembler-aarch32.cc
|