History log of /frameworks/rs/cpu_ref/rsCpuIntrinsics_neon_Blur.S
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
5a1f196d68d54513c081958adf4ce3dcafed9ea2 21-Apr-2016 Simon Hosie <simon.hosie@arm.com> Refactor ARM Blur prefill logic.

Refactor the prefill logic for ARM (and improve documentation along the way) so
as to fix some cases where data is read outside of the source image, and to
minimise the remaining cases which must fall back to the C implementation.

Change-Id: I3d06416b40c48dea06258e9f7bb5ddc246d7c710
/frameworks/rs/cpu_ref/rsCpuIntrinsics_neon_Blur.S
e0bb9e833075eb665ac10b70c8b5bc8edf0e93a9 27-Aug-2015 Simon Hosie <simon.hosie@arm.com> Clarify vertical fetch loop in Blur assembly.

Change-Id: I50a12af2535c66e90ca847abde07f51fa910dc6d
/frameworks/rs/cpu_ref/rsCpuIntrinsics_neon_Blur.S
e2af295f94c8fb17ba51d0e6a199d5ca265f92da 24-Aug-2015 Chih-Hung Hsieh <chh@google.com> Rename some instructions to compile with llvm and gas.

* Rename .irep to .irp
* Rename "cmp x2, #-8" to "cmn x2, #8"
* Replace "vmov.s32" with "vmov"
* Replace "LSL #COMPONENT_SHIFT" with "LSL #(COMPONENT_SHIFT)"
* Nested .irp in *_Blur.S still cannot be compiled with llvm,
so -no-integrated-as is required.
* Verified before and after objdump binary codes are identical.

BUG: 23217766

Change-Id: I3c0d2eed44b79a39e3efcba3afadc3a14ca07874
/frameworks/rs/cpu_ref/rsCpuIntrinsics_neon_Blur.S
bfc23288e830aa3689d24f803561d98174c524e3 22-Oct-2014 Jason Sams <jsams@google.com> Enable ASM path for blur intrinsic when clipped

Fix minor clipping bug in ASM code where the start offset was
added twice.

Change-Id: I6d831478b4a7da8460e70015151dbadf16bd7096
/frameworks/rs/cpu_ref/rsCpuIntrinsics_neon_Blur.S
28c034238b8891398da625b070279c34185b3494 20-Sep-2014 Simon Hosie <simon.hosie@arm.com> Subrectangle bug fixes to ARM Blur assembly.

Correctly sweep the ends of the initial convolution window where that window
overlaps one or both sides of the source image.

Change-Id: I4e3d2bfa7eb22ce29af2615bf324a69561f7e4d6
/frameworks/rs/cpu_ref/rsCpuIntrinsics_neon_Blur.S
446788007efe0a673d0366284026adfa17b36fed 20-Feb-2014 Simon Hosie <simon.hosie@arm.com> Optimisations to blur intrinsic.

Try to keep all data in-register whereever possible, and use only a minimal
circular buffer on the stack when necessary. Implementations in AArch32 and
AArch64 NEON.

Change-Id: If3dd4932a94ee1cadde46e298b8f6bf14b6c2bdc
/frameworks/rs/cpu_ref/rsCpuIntrinsics_neon_Blur.S