Lines Matching refs:PM

126 bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
133 if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Context))
203 PM.add(Printer);
205 PM.add(createGCInfoDeleter());
215 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
221 if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Ctx))
224 addCodeEmitter(PM, OptLevel, JCE);
225 PM.add(createGCInfoDeleter());
235 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
241 if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Ctx))
270 PM.add(Printer);
275 static void printNoVerify(PassManagerBase &PM, const char *Banner) {
277 PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
280 static void printAndVerify(PassManagerBase &PM,
283 PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
286 PM.add(createMachineVerifierPass(Banner));
292 bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
302 PM.add(createTypeBasedAliasAnalysisPass());
303 PM.add(createBasicAliasAnalysisPass());
308 PM.add(createVerifierPass());
312 PM.add(createLoopStrengthReducePass(getTargetLowering()));
314 PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &dbgs()));
317 PM.add(createGCLoweringPass());
320 PM.add(createUnreachableBlockEliminationPass());
332 PM.add(createSjLjEHPass(getTargetLowering()));
337 PM.add(createDwarfEHPass(this));
340 PM.add(createLowerInvokePass(getTargetLowering()));
343 PM.add(createUnreachableBlockEliminationPass());
348 PM.add(createCodeGenPreparePass(getTargetLowering()));
350 PM.add(createStackProtectorPass(getTargetLowering()));
352 addPreISel(PM, OptLevel);
355 PM.add(createPrintFunctionPass("\n\n"
362 PM.add(createVerifierPass());
371 PM.add(MMI);
375 PM.add(new MachineFunctionAnalysis(*this, OptLevel));
383 if (addInstSelector(PM, OptLevel))
387 printAndVerify(PM, "After Instruction Selection");
390 PM.add(createExpandISelPseudosPass());
394 PM.add(createTailDuplicatePass(true));
395 printAndVerify(PM, "After Pre-RegAlloc TailDuplicate");
401 PM.add(createOptimizePHIsPass());
405 PM.add(createLocalStackSlotAllocationPass());
413 PM.add(createDeadMachineInstructionElimPass());
414 printAndVerify(PM, "After codegen DCE pass");
417 PM.add(createMachineLICMPass());
419 PM.add(createMachineCSEPass());
421 PM.add(createMachineSinkingPass());
422 printAndVerify(PM, "After Machine LICM, CSE and Sinking passes");
424 PM.add(createPeepholeOptimizerPass());
425 printAndVerify(PM, "After codegen peephole optimization pass");
429 if (addPreRegAlloc(PM, OptLevel))
430 printAndVerify(PM, "After PreRegAlloc passes");
433 PM.add(createRegisterAllocator(OptLevel));
434 printAndVerify(PM, "After Register Allocation");
441 PM.add(createStackSlotColoringPass(false));
445 PM.add(createMachineLICMPass(false));
447 printAndVerify(PM, "After StackSlotColoring and postra Machine LICM");
451 if (addPostRegAlloc(PM, OptLevel))
452 printAndVerify(PM, "After PostRegAlloc passes");
454 PM.add(createExpandPostRAPseudosPass());
455 printAndVerify(PM, "After ExpandPostRAPseudos");
458 PM.add(createPrologEpilogCodeInserter());
459 printAndVerify(PM, "After PrologEpilogCodeInserter");
462 if (addPreSched2(PM, OptLevel))
463 printAndVerify(PM, "After PreSched2 passes");
467 PM.add(createPostRAScheduler(OptLevel));
468 printAndVerify(PM, "After PostRAScheduler");
473 PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
474 printNoVerify(PM, "After BranchFolding");
479 PM.add(createTailDuplicatePass(false));
480 printNoVerify(PM, "After TailDuplicate");
483 PM.add(createGCMachineCodeAnalysisPass());
486 PM.add(createGCInfoPrinter(dbgs()));
489 PM.add(createCodePlacementOptPass());
490 printNoVerify(PM, "After CodePlacementOpt");
493 if (addPreEmitPass(PM, OptLevel))
494 printNoVerify(PM, "After PreEmit passes");