1//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the LLVMTargetMachine class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/Target/TargetMachine.h"
15#include "llvm/PassManager.h"
16#include "llvm/Analysis/Passes.h"
17#include "llvm/Analysis/Verifier.h"
18#include "llvm/Assembly/PrintModulePass.h"
19#include "llvm/CodeGen/AsmPrinter.h"
20#include "llvm/CodeGen/MachineFunctionAnalysis.h"
21#include "llvm/CodeGen/MachineModuleInfo.h"
22#include "llvm/CodeGen/GCStrategy.h"
23#include "llvm/CodeGen/Passes.h"
24#include "llvm/Target/TargetLowering.h"
25#include "llvm/Target/TargetOptions.h"
26#include "llvm/MC/MCAsmInfo.h"
27#include "llvm/MC/MCInstrInfo.h"
28#include "llvm/MC/MCStreamer.h"
29#include "llvm/MC/MCSubtargetInfo.h"
30#include "llvm/Target/TargetData.h"
31#include "llvm/Target/TargetInstrInfo.h"
32#include "llvm/Target/TargetLowering.h"
33#include "llvm/Target/TargetLoweringObjectFile.h"
34#include "llvm/Target/TargetRegisterInfo.h"
35#include "llvm/Target/TargetSubtargetInfo.h"
36#include "llvm/Transforms/Scalar.h"
37#include "llvm/ADT/OwningPtr.h"
38#include "llvm/Support/CommandLine.h"
39#include "llvm/Support/Debug.h"
40#include "llvm/Support/FormattedStream.h"
41#include "llvm/Support/TargetRegistry.h"
42using namespace llvm;
43
44namespace llvm {
45  bool EnableFastISel;
46}
47
48static cl::opt<bool> DisablePostRA("disable-post-ra", cl::Hidden,
49    cl::desc("Disable Post Regalloc"));
50static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden,
51    cl::desc("Disable branch folding"));
52static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hidden,
53    cl::desc("Disable tail duplication"));
54static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidden,
55    cl::desc("Disable pre-register allocation tail duplication"));
56static cl::opt<bool> DisableCodePlace("disable-code-place", cl::Hidden,
57    cl::desc("Disable code placement"));
58static cl::opt<bool> DisableSSC("disable-ssc", cl::Hidden,
59    cl::desc("Disable Stack Slot Coloring"));
60static cl::opt<bool> DisableMachineDCE("disable-machine-dce", cl::Hidden,
61    cl::desc("Disable Machine Dead Code Elimination"));
62static cl::opt<bool> DisableMachineLICM("disable-machine-licm", cl::Hidden,
63    cl::desc("Disable Machine LICM"));
64static cl::opt<bool> DisableMachineCSE("disable-machine-cse", cl::Hidden,
65    cl::desc("Disable Machine Common Subexpression Elimination"));
66static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm",
67    cl::Hidden,
68    cl::desc("Disable Machine LICM"));
69static cl::opt<bool> DisableMachineSink("disable-machine-sink", cl::Hidden,
70    cl::desc("Disable Machine Sinking"));
71static cl::opt<bool> DisableLSR("disable-lsr", cl::Hidden,
72    cl::desc("Disable Loop Strength Reduction Pass"));
73static cl::opt<bool> DisableCGP("disable-cgp", cl::Hidden,
74    cl::desc("Disable Codegen Prepare"));
75static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
76    cl::desc("Print LLVM IR produced by the loop-reduce pass"));
77static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
78    cl::desc("Print LLVM IR input to isel pass"));
79static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
80    cl::desc("Dump garbage collector data"));
81static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
82    cl::desc("Show encoding in .s output"));
83static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
84    cl::desc("Show instruction structure in .s output"));
85static cl::opt<bool> EnableMCLogging("enable-mc-api-logging", cl::Hidden,
86    cl::desc("Enable MC API logging"));
87static cl::opt<bool> VerifyMachineCode("verify-machineinstrs", cl::Hidden,
88    cl::desc("Verify generated machine code"),
89    cl::init(getenv("LLVM_VERIFY_MACHINEINSTRS")!=NULL));
90
91static cl::opt<cl::boolOrDefault>
92AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
93           cl::init(cl::BOU_UNSET));
94
95static bool getVerboseAsm() {
96  switch (AsmVerbose) {
97  default:
98  case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
99  case cl::BOU_TRUE:  return true;
100  case cl::BOU_FALSE: return false;
101  }
102}
103
104// Enable or disable FastISel. Both options are needed, because
105// FastISel is enabled by default with -fast, and we wish to be
106// able to enable or disable fast-isel independently from -O0.
107static cl::opt<cl::boolOrDefault>
108EnableFastISelOption("fast-isel", cl::Hidden,
109  cl::desc("Enable the \"fast\" instruction selector"));
110
111LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
112                                     StringRef CPU, StringRef FS,
113                                     Reloc::Model RM, CodeModel::Model CM)
114  : TargetMachine(T, Triple, CPU, FS) {
115  CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM);
116  AsmInfo = T.createMCAsmInfo(Triple);
117  // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
118  // and if the old one gets included then MCAsmInfo will be NULL and
119  // we'll crash later.
120  // Provide the user with a useful error message about what's wrong.
121  assert(AsmInfo && "MCAsmInfo not initialized."
122         "Make sure you include the correct TargetSelect.h"
123         "and that InitializeAllTargetMCs() is being invoked!");
124}
125
126bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
127                                            formatted_raw_ostream &Out,
128                                            CodeGenFileType FileType,
129                                            CodeGenOpt::Level OptLevel,
130                                            bool DisableVerify) {
131  // Add common CodeGen passes.
132  MCContext *Context = 0;
133  if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Context))
134    return true;
135  assert(Context != 0 && "Failed to get MCContext");
136
137  if (hasMCSaveTempLabels())
138    Context->setAllowTemporaryLabels(false);
139
140  const MCAsmInfo &MAI = *getMCAsmInfo();
141  const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
142  OwningPtr<MCStreamer> AsmStreamer;
143
144  switch (FileType) {
145  default: return true;
146  case CGFT_AssemblyFile: {
147    MCInstPrinter *InstPrinter =
148      getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI, STI);
149
150    // Create a code emitter if asked to show the encoding.
151    MCCodeEmitter *MCE = 0;
152    MCAsmBackend *MAB = 0;
153    if (ShowMCEncoding) {
154      const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
155      MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), STI, *Context);
156      MAB = getTarget().createMCAsmBackend(getTargetTriple());
157    }
158
159    MCStreamer *S = getTarget().createAsmStreamer(*Context, Out,
160                                                  getVerboseAsm(),
161                                                  hasMCUseLoc(),
162                                                  hasMCUseCFI(),
163                                                  InstPrinter,
164                                                  MCE, MAB,
165                                                  ShowMCInst);
166    AsmStreamer.reset(S);
167    break;
168  }
169  case CGFT_ObjectFile: {
170    // Create the code emitter for the target if it exists.  If not, .o file
171    // emission fails.
172    MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), STI,
173                                                         *Context);
174    MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());
175    if (MCE == 0 || MAB == 0)
176      return true;
177
178    AsmStreamer.reset(getTarget().createMCObjectStreamer(getTargetTriple(),
179                                                         *Context, *MAB, Out,
180                                                         MCE, hasMCRelaxAll(),
181                                                         hasMCNoExecStack()));
182    AsmStreamer.get()->InitSections();
183    break;
184  }
185  case CGFT_Null:
186    // The Null output is intended for use for performance analysis and testing,
187    // not real users.
188    AsmStreamer.reset(createNullStreamer(*Context));
189    break;
190  }
191
192  if (EnableMCLogging)
193    AsmStreamer.reset(createLoggingStreamer(AsmStreamer.take(), errs()));
194
195  // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
196  FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
197  if (Printer == 0)
198    return true;
199
200  // If successful, createAsmPrinter took ownership of AsmStreamer.
201  AsmStreamer.take();
202
203  PM.add(Printer);
204
205  PM.add(createGCInfoDeleter());
206  return false;
207}
208
209/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
210/// get machine code emitted.  This uses a JITCodeEmitter object to handle
211/// actually outputting the machine code and resolving things like the address
212/// of functions.  This method should returns true if machine code emission is
213/// not supported.
214///
215bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
216                                                   JITCodeEmitter &JCE,
217                                                   CodeGenOpt::Level OptLevel,
218                                                   bool DisableVerify) {
219  // Add common CodeGen passes.
220  MCContext *Ctx = 0;
221  if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Ctx))
222    return true;
223
224  addCodeEmitter(PM, OptLevel, JCE);
225  PM.add(createGCInfoDeleter());
226
227  return false; // success!
228}
229
230/// addPassesToEmitMC - Add passes to the specified pass manager to get
231/// machine code emitted with the MCJIT. This method returns true if machine
232/// code is not supported. It fills the MCContext Ctx pointer which can be
233/// used to build custom MCStreamer.
234///
235bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
236                                          MCContext *&Ctx,
237                                          raw_ostream &Out,
238                                          CodeGenOpt::Level OptLevel,
239                                          bool DisableVerify) {
240  // Add common CodeGen passes.
241  if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Ctx))
242    return true;
243
244  if (hasMCSaveTempLabels())
245    Ctx->setAllowTemporaryLabels(false);
246
247  // Create the code emitter for the target if it exists.  If not, .o file
248  // emission fails.
249  const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
250  MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(),STI, *Ctx);
251  MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());
252  if (MCE == 0 || MAB == 0)
253    return true;
254
255  OwningPtr<MCStreamer> AsmStreamer;
256  AsmStreamer.reset(getTarget().createMCObjectStreamer(getTargetTriple(), *Ctx,
257                                                       *MAB, Out, MCE,
258                                                       hasMCRelaxAll(),
259                                                       hasMCNoExecStack()));
260  AsmStreamer.get()->InitSections();
261
262  // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
263  FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
264  if (Printer == 0)
265    return true;
266
267  // If successful, createAsmPrinter took ownership of AsmStreamer.
268  AsmStreamer.take();
269
270  PM.add(Printer);
271
272  return false; // success!
273}
274
275static void printNoVerify(PassManagerBase &PM, const char *Banner) {
276  if (PrintMachineCode)
277    PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
278}
279
280static void printAndVerify(PassManagerBase &PM,
281                           const char *Banner) {
282  if (PrintMachineCode)
283    PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
284
285  if (VerifyMachineCode)
286    PM.add(createMachineVerifierPass(Banner));
287}
288
289/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for both
290/// emitting to assembly files or machine code output.
291///
292bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
293                                               CodeGenOpt::Level OptLevel,
294                                               bool DisableVerify,
295                                               MCContext *&OutContext) {
296  // Standard LLVM-Level Passes.
297
298  // Basic AliasAnalysis support.
299  // Add TypeBasedAliasAnalysis before BasicAliasAnalysis so that
300  // BasicAliasAnalysis wins if they disagree. This is intended to help
301  // support "obvious" type-punning idioms.
302  PM.add(createTypeBasedAliasAnalysisPass());
303  PM.add(createBasicAliasAnalysisPass());
304
305  // Before running any passes, run the verifier to determine if the input
306  // coming from the front-end and/or optimizer is valid.
307  if (!DisableVerify)
308    PM.add(createVerifierPass());
309
310  // Run loop strength reduction before anything else.
311  if (OptLevel != CodeGenOpt::None && !DisableLSR) {
312    PM.add(createLoopStrengthReducePass(getTargetLowering()));
313    if (PrintLSR)
314      PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &dbgs()));
315  }
316
317  PM.add(createGCLoweringPass());
318
319  // Make sure that no unreachable blocks are instruction selected.
320  PM.add(createUnreachableBlockEliminationPass());
321
322  // Turn exception handling constructs into something the code generators can
323  // handle.
324  switch (getMCAsmInfo()->getExceptionHandlingType()) {
325  case ExceptionHandling::SjLj:
326    // SjLj piggy-backs on dwarf for this bit. The cleanups done apply to both
327    // Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
328    // catch info can get misplaced when a selector ends up more than one block
329    // removed from the parent invoke(s). This could happen when a landing
330    // pad is shared by multiple invokes and is also a target of a normal
331    // edge from elsewhere.
332    PM.add(createSjLjEHPass(getTargetLowering()));
333    // FALLTHROUGH
334  case ExceptionHandling::DwarfCFI:
335  case ExceptionHandling::ARM:
336  case ExceptionHandling::Win64:
337    PM.add(createDwarfEHPass(this));
338    break;
339  case ExceptionHandling::None:
340    PM.add(createLowerInvokePass(getTargetLowering()));
341
342    // The lower invoke pass may create unreachable code. Remove it.
343    PM.add(createUnreachableBlockEliminationPass());
344    break;
345  }
346
347  if (OptLevel != CodeGenOpt::None && !DisableCGP)
348    PM.add(createCodeGenPreparePass(getTargetLowering()));
349
350  PM.add(createStackProtectorPass(getTargetLowering()));
351
352  addPreISel(PM, OptLevel);
353
354  if (PrintISelInput)
355    PM.add(createPrintFunctionPass("\n\n"
356                                   "*** Final LLVM Code input to ISel ***\n",
357                                   &dbgs()));
358
359  // All passes which modify the LLVM IR are now complete; run the verifier
360  // to ensure that the IR is valid.
361  if (!DisableVerify)
362    PM.add(createVerifierPass());
363
364  // Standard Lower-Level Passes.
365
366  // Install a MachineModuleInfo class, which is an immutable pass that holds
367  // all the per-module stuff we're generating, including MCContext.
368  MachineModuleInfo *MMI = new MachineModuleInfo(*getMCAsmInfo(),
369                                                 *getRegisterInfo(),
370                                     &getTargetLowering()->getObjFileLowering());
371  PM.add(MMI);
372  OutContext = &MMI->getContext(); // Return the MCContext specifically by-ref.
373
374  // Set up a MachineFunction for the rest of CodeGen to work on.
375  PM.add(new MachineFunctionAnalysis(*this, OptLevel));
376
377  // Enable FastISel with -fast, but allow that to be overridden.
378  if (EnableFastISelOption == cl::BOU_TRUE ||
379      (OptLevel == CodeGenOpt::None && EnableFastISelOption != cl::BOU_FALSE))
380    EnableFastISel = true;
381
382  // Ask the target for an isel.
383  if (addInstSelector(PM, OptLevel))
384    return true;
385
386  // Print the instruction selected machine code...
387  printAndVerify(PM, "After Instruction Selection");
388
389  // Expand pseudo-instructions emitted by ISel.
390  PM.add(createExpandISelPseudosPass());
391
392  // Pre-ra tail duplication.
393  if (OptLevel != CodeGenOpt::None && !DisableEarlyTailDup) {
394    PM.add(createTailDuplicatePass(true));
395    printAndVerify(PM, "After Pre-RegAlloc TailDuplicate");
396  }
397
398  // Optimize PHIs before DCE: removing dead PHI cycles may make more
399  // instructions dead.
400  if (OptLevel != CodeGenOpt::None)
401    PM.add(createOptimizePHIsPass());
402
403  // If the target requests it, assign local variables to stack slots relative
404  // to one another and simplify frame index references where possible.
405  PM.add(createLocalStackSlotAllocationPass());
406
407  if (OptLevel != CodeGenOpt::None) {
408    // With optimization, dead code should already be eliminated. However
409    // there is one known exception: lowered code for arguments that are only
410    // used by tail calls, where the tail calls reuse the incoming stack
411    // arguments directly (see t11 in test/CodeGen/X86/sibcall.ll).
412    if (!DisableMachineDCE)
413      PM.add(createDeadMachineInstructionElimPass());
414    printAndVerify(PM, "After codegen DCE pass");
415
416    if (!DisableMachineLICM)
417      PM.add(createMachineLICMPass());
418    if (!DisableMachineCSE)
419      PM.add(createMachineCSEPass());
420    if (!DisableMachineSink)
421      PM.add(createMachineSinkingPass());
422    printAndVerify(PM, "After Machine LICM, CSE and Sinking passes");
423
424    PM.add(createPeepholeOptimizerPass());
425    printAndVerify(PM, "After codegen peephole optimization pass");
426  }
427
428  // Run pre-ra passes.
429  if (addPreRegAlloc(PM, OptLevel))
430    printAndVerify(PM, "After PreRegAlloc passes");
431
432  // Perform register allocation.
433  PM.add(createRegisterAllocator(OptLevel));
434  printAndVerify(PM, "After Register Allocation");
435
436  // Perform stack slot coloring and post-ra machine LICM.
437  if (OptLevel != CodeGenOpt::None) {
438    // FIXME: Re-enable coloring with register when it's capable of adding
439    // kill markers.
440    if (!DisableSSC)
441      PM.add(createStackSlotColoringPass(false));
442
443    // Run post-ra machine LICM to hoist reloads / remats.
444    if (!DisablePostRAMachineLICM)
445      PM.add(createMachineLICMPass(false));
446
447    printAndVerify(PM, "After StackSlotColoring and postra Machine LICM");
448  }
449
450  // Run post-ra passes.
451  if (addPostRegAlloc(PM, OptLevel))
452    printAndVerify(PM, "After PostRegAlloc passes");
453
454  PM.add(createExpandPostRAPseudosPass());
455  printAndVerify(PM, "After ExpandPostRAPseudos");
456
457  // Insert prolog/epilog code.  Eliminate abstract frame index references...
458  PM.add(createPrologEpilogCodeInserter());
459  printAndVerify(PM, "After PrologEpilogCodeInserter");
460
461  // Run pre-sched2 passes.
462  if (addPreSched2(PM, OptLevel))
463    printAndVerify(PM, "After PreSched2 passes");
464
465  // Second pass scheduler.
466  if (OptLevel != CodeGenOpt::None && !DisablePostRA) {
467    PM.add(createPostRAScheduler(OptLevel));
468    printAndVerify(PM, "After PostRAScheduler");
469  }
470
471  // Branch folding must be run after regalloc and prolog/epilog insertion.
472  if (OptLevel != CodeGenOpt::None && !DisableBranchFold) {
473    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
474    printNoVerify(PM, "After BranchFolding");
475  }
476
477  // Tail duplication.
478  if (OptLevel != CodeGenOpt::None && !DisableTailDuplicate) {
479    PM.add(createTailDuplicatePass(false));
480    printNoVerify(PM, "After TailDuplicate");
481  }
482
483  PM.add(createGCMachineCodeAnalysisPass());
484
485  if (PrintGCInfo)
486    PM.add(createGCInfoPrinter(dbgs()));
487
488  if (OptLevel != CodeGenOpt::None && !DisableCodePlace) {
489    PM.add(createCodePlacementOptPass());
490    printNoVerify(PM, "After CodePlacementOpt");
491  }
492
493  if (addPreEmitPass(PM, OptLevel))
494    printNoVerify(PM, "After PreEmit passes");
495
496  return false;
497}
498