Searched defs:MinVT (Results 1 - 6 of 6) sorted by relevance

/external/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1591 MVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32); local
1592 if (VT.bitsLT(MinVT))
1593 VT = MinVT;
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1026 EVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32); local
1027 if (VT.bitsLT(MinVT))
1028 VT = MinVT;
2005 EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits); local
2006 if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
2008 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreZExt);
2009 SDValue C = DAG.getConstant(C1.trunc(MinBits), MinVT);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1467 EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits); local
1468 if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
1470 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreExt);
1471 SDValue C = DAG.getConstant(C1.trunc(MinBits), dl, MinVT);
H A DDAGCombiner.cpp6340 EVT MinVT = N0.getValueType(); local
6348 Op = DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT.getScalarType());
6363 return DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT.getScalarType());
13098 EVT MinVT = SVT; local
13106 MinVT = (!FoundMinVT || OpSVT.bitsLE(MinVT)) ? OpSVT : MinVT;
13117 Opnds.append(NumElts, DAG.getUNDEF(MinVT));
13126 DAG.getNode(ISD::TRUNCATE, SDLoc(N), MinVT, Op.getOperand(i)));
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86ISelLowering.cpp1537 EVT MinVT = getRegisterType(Context, ReturnMVT); local
1538 return VT.bitsLT(MinVT) ? MinVT : VT;
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2273 EVT MinVT = getRegisterType(Context, ReturnMVT); local
2274 return VT.bitsLT(MinVT) ? MinVT : VT;
4586 MVT MinVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; local
4588 if (OpVT.getSizeInBits() < MinVT.getStoreSizeInBits())
4589 WideOpVT = MinVT;
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